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authorFredrik Höglund <fredrik@kde.org>2013-09-21 11:15:36 -0400
committerAlex Deucher <alexander.deucher@amd.com>2014-06-13 12:22:16 -0400
commit8bae42769da2346f7b3c783980f038826e09e84c (patch)
treec513eea2bce640da972e1f74e006439c27eac41d
parentbc1dfff04a5d4064ba0db1fab13f84ab4f333d2b (diff)
drm/radeon: use pixel formats instead of depth/bpp
This disambiguates depth 16 formats, such as ARGB1555 and ARGB4444, and depth 32 formats such as ARGB2101010 and ARGB8888. This patch also adds support for depth 30 (XRGB2101010) framebuffers. Signed-off-by: Fredrik Höglund <fredrik@kde.org> Reviewed-by: Mario Kleiner <mario.kleiner.de@gmail.com> Tested-by: Mario Kleiner <mario.kleiner.de@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/radeon/atombios_crtc.c89
1 files changed, 73 insertions, 16 deletions
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 26c12a3fe430..b91f79ebbda1 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -1174,33 +1174,69 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc,
1174 radeon_bo_get_tiling_flags(rbo, &tiling_flags, NULL); 1174 radeon_bo_get_tiling_flags(rbo, &tiling_flags, NULL);
1175 radeon_bo_unreserve(rbo); 1175 radeon_bo_unreserve(rbo);
1176 1176
1177 switch (target_fb->bits_per_pixel) { 1177 switch (target_fb->pixel_format) {
1178 case 8: 1178 case DRM_FORMAT_C8:
1179 fb_format = (EVERGREEN_GRPH_DEPTH(EVERGREEN_GRPH_DEPTH_8BPP) | 1179 fb_format = (EVERGREEN_GRPH_DEPTH(EVERGREEN_GRPH_DEPTH_8BPP) |
1180 EVERGREEN_GRPH_FORMAT(EVERGREEN_GRPH_FORMAT_INDEXED)); 1180 EVERGREEN_GRPH_FORMAT(EVERGREEN_GRPH_FORMAT_INDEXED));
1181 break; 1181 break;
1182 case 15: 1182 case DRM_FORMAT_XRGB4444:
1183 case DRM_FORMAT_ARGB4444:
1184 fb_format = (EVERGREEN_GRPH_DEPTH(EVERGREEN_GRPH_DEPTH_16BPP) |
1185 EVERGREEN_GRPH_FORMAT(EVERGREEN_GRPH_FORMAT_ARGB4444));
1186#ifdef __BIG_ENDIAN
1187 fb_swap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_8IN16);
1188#endif
1189 break;
1190 case DRM_FORMAT_XRGB1555:
1191 case DRM_FORMAT_ARGB1555:
1183 fb_format = (EVERGREEN_GRPH_DEPTH(EVERGREEN_GRPH_DEPTH_16BPP) | 1192 fb_format = (EVERGREEN_GRPH_DEPTH(EVERGREEN_GRPH_DEPTH_16BPP) |
1184 EVERGREEN_GRPH_FORMAT(EVERGREEN_GRPH_FORMAT_ARGB1555)); 1193 EVERGREEN_GRPH_FORMAT(EVERGREEN_GRPH_FORMAT_ARGB1555));
1194#ifdef __BIG_ENDIAN
1195 fb_swap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_8IN16);
1196#endif
1185 break; 1197 break;
1186 case 16: 1198 case DRM_FORMAT_BGRX5551:
1199 case DRM_FORMAT_BGRA5551:
1200 fb_format = (EVERGREEN_GRPH_DEPTH(EVERGREEN_GRPH_DEPTH_16BPP) |
1201 EVERGREEN_GRPH_FORMAT(EVERGREEN_GRPH_FORMAT_BGRA5551));
1202#ifdef __BIG_ENDIAN
1203 fb_swap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_8IN16);
1204#endif
1205 break;
1206 case DRM_FORMAT_RGB565:
1187 fb_format = (EVERGREEN_GRPH_DEPTH(EVERGREEN_GRPH_DEPTH_16BPP) | 1207 fb_format = (EVERGREEN_GRPH_DEPTH(EVERGREEN_GRPH_DEPTH_16BPP) |
1188 EVERGREEN_GRPH_FORMAT(EVERGREEN_GRPH_FORMAT_ARGB565)); 1208 EVERGREEN_GRPH_FORMAT(EVERGREEN_GRPH_FORMAT_ARGB565));
1189#ifdef __BIG_ENDIAN 1209#ifdef __BIG_ENDIAN
1190 fb_swap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_8IN16); 1210 fb_swap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_8IN16);
1191#endif 1211#endif
1192 break; 1212 break;
1193 case 24: 1213 case DRM_FORMAT_XRGB8888:
1194 case 32: 1214 case DRM_FORMAT_ARGB8888:
1195 fb_format = (EVERGREEN_GRPH_DEPTH(EVERGREEN_GRPH_DEPTH_32BPP) | 1215 fb_format = (EVERGREEN_GRPH_DEPTH(EVERGREEN_GRPH_DEPTH_32BPP) |
1196 EVERGREEN_GRPH_FORMAT(EVERGREEN_GRPH_FORMAT_ARGB8888)); 1216 EVERGREEN_GRPH_FORMAT(EVERGREEN_GRPH_FORMAT_ARGB8888));
1197#ifdef __BIG_ENDIAN 1217#ifdef __BIG_ENDIAN
1198 fb_swap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_8IN32); 1218 fb_swap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_8IN32);
1199#endif 1219#endif
1200 break; 1220 break;
1221 case DRM_FORMAT_XRGB2101010:
1222 case DRM_FORMAT_ARGB2101010:
1223 fb_format = (EVERGREEN_GRPH_DEPTH(EVERGREEN_GRPH_DEPTH_32BPP) |
1224 EVERGREEN_GRPH_FORMAT(EVERGREEN_GRPH_FORMAT_ARGB2101010));
1225#ifdef __BIG_ENDIAN
1226 fb_swap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_8IN32);
1227#endif
1228 break;
1229 case DRM_FORMAT_BGRX1010102:
1230 case DRM_FORMAT_BGRA1010102:
1231 fb_format = (EVERGREEN_GRPH_DEPTH(EVERGREEN_GRPH_DEPTH_32BPP) |
1232 EVERGREEN_GRPH_FORMAT(EVERGREEN_GRPH_FORMAT_BGRA1010102));
1233#ifdef __BIG_ENDIAN
1234 fb_swap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_8IN32);
1235#endif
1236 break;
1201 default: 1237 default:
1202 DRM_ERROR("Unsupported screen depth %d\n", 1238 DRM_ERROR("Unsupported screen format %s\n",
1203 target_fb->bits_per_pixel); 1239 drm_get_format_name(target_fb->pixel_format));
1204 return -EINVAL; 1240 return -EINVAL;
1205 } 1241 }
1206 1242
@@ -1433,18 +1469,30 @@ static int avivo_crtc_do_set_base(struct drm_crtc *crtc,
1433 radeon_bo_get_tiling_flags(rbo, &tiling_flags, NULL); 1469 radeon_bo_get_tiling_flags(rbo, &tiling_flags, NULL);
1434 radeon_bo_unreserve(rbo); 1470 radeon_bo_unreserve(rbo);
1435 1471
1436 switch (target_fb->bits_per_pixel) { 1472 switch (target_fb->pixel_format) {
1437 case 8: 1473 case DRM_FORMAT_C8:
1438 fb_format = 1474 fb_format =
1439 AVIVO_D1GRPH_CONTROL_DEPTH_8BPP | 1475 AVIVO_D1GRPH_CONTROL_DEPTH_8BPP |
1440 AVIVO_D1GRPH_CONTROL_8BPP_INDEXED; 1476 AVIVO_D1GRPH_CONTROL_8BPP_INDEXED;
1441 break; 1477 break;
1442 case 15: 1478 case DRM_FORMAT_XRGB4444:
1479 case DRM_FORMAT_ARGB4444:
1480 fb_format =
1481 AVIVO_D1GRPH_CONTROL_DEPTH_16BPP |
1482 AVIVO_D1GRPH_CONTROL_16BPP_ARGB4444;
1483#ifdef __BIG_ENDIAN
1484 fb_swap = R600_D1GRPH_SWAP_ENDIAN_16BIT;
1485#endif
1486 break;
1487 case DRM_FORMAT_XRGB1555:
1443 fb_format = 1488 fb_format =
1444 AVIVO_D1GRPH_CONTROL_DEPTH_16BPP | 1489 AVIVO_D1GRPH_CONTROL_DEPTH_16BPP |
1445 AVIVO_D1GRPH_CONTROL_16BPP_ARGB1555; 1490 AVIVO_D1GRPH_CONTROL_16BPP_ARGB1555;
1491#ifdef __BIG_ENDIAN
1492 fb_swap = R600_D1GRPH_SWAP_ENDIAN_16BIT;
1493#endif
1446 break; 1494 break;
1447 case 16: 1495 case DRM_FORMAT_RGB565:
1448 fb_format = 1496 fb_format =
1449 AVIVO_D1GRPH_CONTROL_DEPTH_16BPP | 1497 AVIVO_D1GRPH_CONTROL_DEPTH_16BPP |
1450 AVIVO_D1GRPH_CONTROL_16BPP_RGB565; 1498 AVIVO_D1GRPH_CONTROL_16BPP_RGB565;
@@ -1452,8 +1500,8 @@ static int avivo_crtc_do_set_base(struct drm_crtc *crtc,
1452 fb_swap = R600_D1GRPH_SWAP_ENDIAN_16BIT; 1500 fb_swap = R600_D1GRPH_SWAP_ENDIAN_16BIT;
1453#endif 1501#endif
1454 break; 1502 break;
1455 case 24: 1503 case DRM_FORMAT_XRGB8888:
1456 case 32: 1504 case DRM_FORMAT_ARGB8888:
1457 fb_format = 1505 fb_format =
1458 AVIVO_D1GRPH_CONTROL_DEPTH_32BPP | 1506 AVIVO_D1GRPH_CONTROL_DEPTH_32BPP |
1459 AVIVO_D1GRPH_CONTROL_32BPP_ARGB8888; 1507 AVIVO_D1GRPH_CONTROL_32BPP_ARGB8888;
@@ -1461,9 +1509,18 @@ static int avivo_crtc_do_set_base(struct drm_crtc *crtc,
1461 fb_swap = R600_D1GRPH_SWAP_ENDIAN_32BIT; 1509 fb_swap = R600_D1GRPH_SWAP_ENDIAN_32BIT;
1462#endif 1510#endif
1463 break; 1511 break;
1512 case DRM_FORMAT_XRGB2101010:
1513 case DRM_FORMAT_ARGB2101010:
1514 fb_format =
1515 AVIVO_D1GRPH_CONTROL_DEPTH_32BPP |
1516 AVIVO_D1GRPH_CONTROL_32BPP_ARGB2101010;
1517#ifdef __BIG_ENDIAN
1518 fb_swap = R600_D1GRPH_SWAP_ENDIAN_32BIT;
1519#endif
1520 break;
1464 default: 1521 default:
1465 DRM_ERROR("Unsupported screen depth %d\n", 1522 DRM_ERROR("Unsupported screen format %s\n",
1466 target_fb->bits_per_pixel); 1523 drm_get_format_name(target_fb->pixel_format));
1467 return -EINVAL; 1524 return -EINVAL;
1468 } 1525 }
1469 1526