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authorBen Skeggs <bskeggs@redhat.com>2014-06-13 04:28:47 -0400
committerBen Skeggs <bskeggs@redhat.com>2014-06-17 00:41:40 -0400
commit86899b39b53bfcfb0c01151c52d4b1272306fc92 (patch)
tree2b218f8dc9f5fc977cfb803afdc31278e5c2c526
parent0c9483b28bbb17e833db47f65d7fde4f5453d3f1 (diff)
drm/gk104/fb/ram: fixups from an earlier search+replace
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
-rw-r--r--drivers/gpu/drm/nouveau/core/subdev/fb/ramnve0.c76
1 files changed, 38 insertions, 38 deletions
diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/ramnve0.c b/drivers/gpu/drm/nouveau/core/subdev/fb/ramnve0.c
index 84c7efbc4f38..1ad3ea503133 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/fb/ramnve0.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/fb/ramnve0.c
@@ -262,8 +262,8 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq)
262 struct nve0_ram *ram = (void *)pfb->ram; 262 struct nve0_ram *ram = (void *)pfb->ram;
263 struct nve0_ramfuc *fuc = &ram->fuc; 263 struct nve0_ramfuc *fuc = &ram->fuc;
264 struct nouveau_ram_data *next = ram->base.next; 264 struct nouveau_ram_data *next = ram->base.next;
265 int vc = !(next->bios.ramcfg_11_02_08); 265 int vc = !next->bios.ramcfg_11_02_08;
266 int mv = !(next->bios.ramcfg_11_02_04); 266 int mv = !next->bios.ramcfg_11_02_04;
267 u32 mask, data; 267 u32 mask, data;
268 268
269 ram_mask(fuc, 0x10f808, 0x40000000, 0x40000000); 269 ram_mask(fuc, 0x10f808, 0x40000000, 0x40000000);
@@ -370,8 +370,8 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq)
370 } 370 }
371 } 371 }
372 372
373 if ( (next->bios.ramcfg_11_02_40) || 373 if (next->bios.ramcfg_11_02_40 ||
374 (next->bios.ramcfg_11_07_10)) { 374 next->bios.ramcfg_11_07_10) {
375 ram_mask(fuc, 0x132040, 0x00010000, 0x00010000); 375 ram_mask(fuc, 0x132040, 0x00010000, 0x00010000);
376 ram_nsec(fuc, 20000); 376 ram_nsec(fuc, 20000);
377 } 377 }
@@ -417,7 +417,7 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq)
417 ram_mask(fuc, 0x10f694, 0xff00ff00, data); 417 ram_mask(fuc, 0x10f694, 0xff00ff00, data);
418 } 418 }
419 419
420 if (ram->mode == 2 && (next->bios.ramcfg_11_08_10)) 420 if (ram->mode == 2 && next->bios.ramcfg_11_08_10)
421 data = 0x00000080; 421 data = 0x00000080;
422 else 422 else
423 data = 0x00000000; 423 data = 0x00000000;
@@ -425,13 +425,13 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq)
425 425
426 mask = 0x00070000; 426 mask = 0x00070000;
427 data = 0x00000000; 427 data = 0x00000000;
428 if (!(next->bios.ramcfg_11_02_80)) 428 if (!next->bios.ramcfg_11_02_80)
429 data |= 0x03000000; 429 data |= 0x03000000;
430 if (!(next->bios.ramcfg_11_02_40)) 430 if (!next->bios.ramcfg_11_02_40)
431 data |= 0x00002000; 431 data |= 0x00002000;
432 if (!(next->bios.ramcfg_11_07_10)) 432 if (!next->bios.ramcfg_11_07_10)
433 data |= 0x00004000; 433 data |= 0x00004000;
434 if (!(next->bios.ramcfg_11_07_08)) 434 if (!next->bios.ramcfg_11_07_08)
435 data |= 0x00000003; 435 data |= 0x00000003;
436 else 436 else
437 data |= 0x74000000; 437 data |= 0x74000000;
@@ -486,7 +486,7 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq)
486 486
487 data = mask = 0x00000000; 487 data = mask = 0x00000000;
488 if (NOTE00(ramcfg_02_03 != 0)) { 488 if (NOTE00(ramcfg_02_03 != 0)) {
489 data |= (next->bios.ramcfg_11_02_03) << 8; 489 data |= next->bios.ramcfg_11_02_03 << 8;
490 mask |= 0x00000300; 490 mask |= 0x00000300;
491 } 491 }
492 if (NOTE00(ramcfg_01_10)) { 492 if (NOTE00(ramcfg_01_10)) {
@@ -498,7 +498,7 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq)
498 498
499 data = mask = 0x00000000; 499 data = mask = 0x00000000;
500 if (NOTE00(timing_30_07 != 0)) { 500 if (NOTE00(timing_30_07 != 0)) {
501 data |= (next->bios.timing_20_30_07) << 28; 501 data |= next->bios.timing_20_30_07 << 28;
502 mask |= 0x70000000; 502 mask |= 0x70000000;
503 } 503 }
504 if (NOTE00(ramcfg_01_01)) { 504 if (NOTE00(ramcfg_01_01)) {
@@ -510,7 +510,7 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq)
510 510
511 data = mask = 0x00000000; 511 data = mask = 0x00000000;
512 if (NOTE00(timing_30_07 != 0)) { 512 if (NOTE00(timing_30_07 != 0)) {
513 data |= (next->bios.timing_20_30_07) << 28; 513 data |= next->bios.timing_20_30_07 << 28;
514 mask |= 0x70000000; 514 mask |= 0x70000000;
515 } 515 }
516 if (NOTE00(ramcfg_01_02)) { 516 if (NOTE00(ramcfg_01_02)) {
@@ -522,16 +522,16 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq)
522 522
523 mask = 0x33f00000; 523 mask = 0x33f00000;
524 data = 0x00000000; 524 data = 0x00000000;
525 if (!(next->bios.ramcfg_11_01_04)) 525 if (!next->bios.ramcfg_11_01_04)
526 data |= 0x20200000; 526 data |= 0x20200000;
527 if (!(next->bios.ramcfg_11_07_80)) 527 if (!next->bios.ramcfg_11_07_80)
528 data |= 0x12800000; 528 data |= 0x12800000;
529 /*XXX: see note above about there probably being some condition 529 /*XXX: see note above about there probably being some condition
530 * for the 10f824 stuff that uses ramcfg 3... 530 * for the 10f824 stuff that uses ramcfg 3...
531 */ 531 */
532 if ( (next->bios.ramcfg_11_03_f0)) { 532 if (next->bios.ramcfg_11_03_f0) {
533 if (next->bios.rammap_11_08_0c) { 533 if (next->bios.rammap_11_08_0c) {
534 if (!(next->bios.ramcfg_11_07_80)) 534 if (!next->bios.ramcfg_11_07_80)
535 mask |= 0x00000020; 535 mask |= 0x00000020;
536 else 536 else
537 data |= 0x00000020; 537 data |= 0x00000020;
@@ -563,7 +563,7 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq)
563 ram_wait(fuc, 0x100710, 0x80000000, 0x80000000, 200000); 563 ram_wait(fuc, 0x100710, 0x80000000, 0x80000000, 200000);
564 } 564 }
565 565
566 data = (next->bios.timing_20_30_07) << 8; 566 data = next->bios.timing_20_30_07 << 8;
567 if (next->bios.ramcfg_11_01_01) 567 if (next->bios.ramcfg_11_01_01)
568 data |= 0x80000000; 568 data |= 0x80000000;
569 ram_mask(fuc, 0x100778, 0x00000700, data); 569 ram_mask(fuc, 0x100778, 0x00000700, data);
@@ -588,7 +588,7 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq)
588 ram_wr32(fuc, 0x10f310, 0x00000001); /* REFRESH */ 588 ram_wr32(fuc, 0x10f310, 0x00000001); /* REFRESH */
589 ram_wr32(fuc, 0x10f210, 0x80000000); /* REFRESH_AUTO = 1 */ 589 ram_wr32(fuc, 0x10f210, 0x80000000); /* REFRESH_AUTO = 1 */
590 590
591 if ((next->bios.ramcfg_11_08_10) && (ram->mode == 2) /*XXX*/) { 591 if (next->bios.ramcfg_11_08_10 && (ram->mode == 2) /*XXX*/) {
592 u32 temp = ram_mask(fuc, 0x10f294, 0xff000000, 0x24000000); 592 u32 temp = ram_mask(fuc, 0x10f294, 0xff000000, 0x24000000);
593 nve0_ram_train(fuc, 0xbc0e0000, 0xa4010000); /*XXX*/ 593 nve0_ram_train(fuc, 0xbc0e0000, 0xa4010000); /*XXX*/
594 ram_nsec(fuc, 1000); 594 ram_nsec(fuc, 1000);
@@ -621,8 +621,8 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq)
621 data = ram_rd32(fuc, 0x10f978); 621 data = ram_rd32(fuc, 0x10f978);
622 data &= ~0x00046144; 622 data &= ~0x00046144;
623 data |= 0x0000000b; 623 data |= 0x0000000b;
624 if (!(next->bios.ramcfg_11_07_08)) { 624 if (!next->bios.ramcfg_11_07_08) {
625 if (!(next->bios.ramcfg_11_07_04)) 625 if (!next->bios.ramcfg_11_07_04)
626 data |= 0x0000200c; 626 data |= 0x0000200c;
627 else 627 else
628 data |= 0x00000000; 628 data |= 0x00000000;
@@ -636,11 +636,11 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq)
636 ram_wr32(fuc, 0x10f830, data); 636 ram_wr32(fuc, 0x10f830, data);
637 } 637 }
638 638
639 if (!(next->bios.ramcfg_11_07_08)) { 639 if (!next->bios.ramcfg_11_07_08) {
640 data = 0x88020000; 640 data = 0x88020000;
641 if ( (next->bios.ramcfg_11_07_04)) 641 if ( next->bios.ramcfg_11_07_04)
642 data |= 0x10000000; 642 data |= 0x10000000;
643 if (!(next->bios.rammap_11_08_10)) 643 if (!next->bios.rammap_11_08_10)
644 data |= 0x00080000; 644 data |= 0x00080000;
645 } else { 645 } else {
646 data = 0xa40e0000; 646 data = 0xa40e0000;
@@ -689,8 +689,8 @@ nve0_ram_calc_sddr3(struct nouveau_fb *pfb, u32 freq)
689 const u32 runk0 = ram->fN1 << 16; 689 const u32 runk0 = ram->fN1 << 16;
690 const u32 runk1 = ram->fN1; 690 const u32 runk1 = ram->fN1;
691 struct nouveau_ram_data *next = ram->base.next; 691 struct nouveau_ram_data *next = ram->base.next;
692 int vc = !(next->bios.ramcfg_11_02_08); 692 int vc = !next->bios.ramcfg_11_02_08;
693 int mv = !(next->bios.ramcfg_11_02_04); 693 int mv = !next->bios.ramcfg_11_02_04;
694 u32 mask, data; 694 u32 mask, data;
695 695
696 ram_mask(fuc, 0x10f808, 0x40000000, 0x40000000); 696 ram_mask(fuc, 0x10f808, 0x40000000, 0x40000000);
@@ -705,7 +705,7 @@ nve0_ram_calc_sddr3(struct nouveau_fb *pfb, u32 freq)
705 } 705 }
706 706
707 ram_mask(fuc, 0x10f200, 0x00000800, 0x00000000); 707 ram_mask(fuc, 0x10f200, 0x00000800, 0x00000000);
708 if ((next->bios.ramcfg_11_03_f0)) 708 if (next->bios.ramcfg_11_03_f0)
709 ram_mask(fuc, 0x10f808, 0x04000000, 0x04000000); 709 ram_mask(fuc, 0x10f808, 0x04000000, 0x04000000);
710 710
711 ram_wr32(fuc, 0x10f314, 0x00000001); /* PRECHARGE */ 711 ram_wr32(fuc, 0x10f314, 0x00000001); /* PRECHARGE */
@@ -761,7 +761,7 @@ nve0_ram_calc_sddr3(struct nouveau_fb *pfb, u32 freq)
761 761
762 ram_mask(fuc, 0x1373f4, 0x00000000, 0x00010010); 762 ram_mask(fuc, 0x1373f4, 0x00000000, 0x00010010);
763 data = ram_rd32(fuc, 0x1373ec) & ~0x00030000; 763 data = ram_rd32(fuc, 0x1373ec) & ~0x00030000;
764 data |= (next->bios.ramcfg_11_03_30) << 12; 764 data |= next->bios.ramcfg_11_03_30 << 16;
765 ram_wr32(fuc, 0x1373ec, data); 765 ram_wr32(fuc, 0x1373ec, data);
766 ram_mask(fuc, 0x1373f4, 0x00000003, 0x00000000); 766 ram_mask(fuc, 0x1373f4, 0x00000003, 0x00000000);
767 ram_mask(fuc, 0x1373f4, 0x00000010, 0x00000000); 767 ram_mask(fuc, 0x1373f4, 0x00000010, 0x00000000);
@@ -793,8 +793,8 @@ nve0_ram_calc_sddr3(struct nouveau_fb *pfb, u32 freq)
793 } 793 }
794 } 794 }
795 795
796 if ( (next->bios.ramcfg_11_02_40) || 796 if (next->bios.ramcfg_11_02_40 ||
797 (next->bios.ramcfg_11_07_10)) { 797 next->bios.ramcfg_11_07_10) {
798 ram_mask(fuc, 0x132040, 0x00010000, 0x00010000); 798 ram_mask(fuc, 0x132040, 0x00010000, 0x00010000);
799 ram_nsec(fuc, 20000); 799 ram_nsec(fuc, 20000);
800 } 800 }
@@ -810,13 +810,13 @@ nve0_ram_calc_sddr3(struct nouveau_fb *pfb, u32 freq)
810 810
811 mask = 0x00010000; 811 mask = 0x00010000;
812 data = 0x00000000; 812 data = 0x00000000;
813 if (!(next->bios.ramcfg_11_02_80)) 813 if (!next->bios.ramcfg_11_02_80)
814 data |= 0x03000000; 814 data |= 0x03000000;
815 if (!(next->bios.ramcfg_11_02_40)) 815 if (!next->bios.ramcfg_11_02_40)
816 data |= 0x00002000; 816 data |= 0x00002000;
817 if (!(next->bios.ramcfg_11_07_10)) 817 if (!next->bios.ramcfg_11_07_10)
818 data |= 0x00004000; 818 data |= 0x00004000;
819 if (!(next->bios.ramcfg_11_07_08)) 819 if (!next->bios.ramcfg_11_07_08)
820 data |= 0x00000003; 820 data |= 0x00000003;
821 else 821 else
822 data |= 0x14000000; 822 data |= 0x14000000;
@@ -844,16 +844,16 @@ nve0_ram_calc_sddr3(struct nouveau_fb *pfb, u32 freq)
844 844
845 mask = 0x33f00000; 845 mask = 0x33f00000;
846 data = 0x00000000; 846 data = 0x00000000;
847 if (!(next->bios.ramcfg_11_01_04)) 847 if (!next->bios.ramcfg_11_01_04)
848 data |= 0x20200000; 848 data |= 0x20200000;
849 if (!(next->bios.ramcfg_11_07_80)) 849 if (!next->bios.ramcfg_11_07_80)
850 data |= 0x12800000; 850 data |= 0x12800000;
851 /*XXX: see note above about there probably being some condition 851 /*XXX: see note above about there probably being some condition
852 * for the 10f824 stuff that uses ramcfg 3... 852 * for the 10f824 stuff that uses ramcfg 3...
853 */ 853 */
854 if ( (next->bios.ramcfg_11_03_f0)) { 854 if (next->bios.ramcfg_11_03_f0) {
855 if (next->bios.rammap_11_08_0c) { 855 if (next->bios.rammap_11_08_0c) {
856 if (!(next->bios.ramcfg_11_07_80)) 856 if (!next->bios.ramcfg_11_07_80)
857 mask |= 0x00000020; 857 mask |= 0x00000020;
858 else 858 else
859 data |= 0x00000020; 859 data |= 0x00000020;
@@ -876,7 +876,7 @@ nve0_ram_calc_sddr3(struct nouveau_fb *pfb, u32 freq)
876 data = next->bios.timing_20_2c_1fc0; 876 data = next->bios.timing_20_2c_1fc0;
877 ram_mask(fuc, 0x10f24c, 0x7f000000, data << 24); 877 ram_mask(fuc, 0x10f24c, 0x7f000000, data << 24);
878 878
879 ram_mask(fuc, 0x10f224, 0x001f0000, next->bios.timing_20_30_f8); 879 ram_mask(fuc, 0x10f224, 0x001f0000, next->bios.timing_20_30_f8 << 16);
880 880
881 ram_wr32(fuc, 0x10f090, 0x4000007f); 881 ram_wr32(fuc, 0x10f090, 0x4000007f);
882 ram_nsec(fuc, 1000); 882 ram_nsec(fuc, 1000);