diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-06-20 23:11:34 -0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-06-20 23:11:34 -0400 |
| commit | 85d45adef06caa988506686527a5fedf856dc550 (patch) | |
| tree | 8f7bdc8337639b7317a11edddb3dd291e60748d3 | |
| parent | eda0841094a3a232357ca10a24b40da461db3fcf (diff) | |
| parent | fdb9c3cd5124c9a6e4c824ed2bca5b4602e84a1a (diff) | |
Merge branch 'msm-fix' of git://codeaurora.org/quic/kernel/davidb/linux-msm
* 'msm-fix' of git://codeaurora.org/quic/kernel/davidb/linux-msm:
msm: timer: Fix DGT rate on 8960 and 8660
msm: timer: compensate for timer shift in msm_read_timer_count
msm: timer: Fix SMP build error
| -rw-r--r-- | arch/arm/mach-msm/timer.c | 14 |
1 files changed, 11 insertions, 3 deletions
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c index 38b95e949d13..63621f152c98 100644 --- a/arch/arm/mach-msm/timer.c +++ b/arch/arm/mach-msm/timer.c | |||
| @@ -23,6 +23,8 @@ | |||
| 23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
| 24 | 24 | ||
| 25 | #include <asm/mach/time.h> | 25 | #include <asm/mach/time.h> |
| 26 | #include <asm/hardware/gic.h> | ||
| 27 | |||
| 26 | #include <mach/msm_iomap.h> | 28 | #include <mach/msm_iomap.h> |
| 27 | #include <mach/cpu.h> | 29 | #include <mach/cpu.h> |
| 28 | 30 | ||
| @@ -55,10 +57,12 @@ enum timer_location { | |||
| 55 | #if defined(CONFIG_ARCH_QSD8X50) | 57 | #if defined(CONFIG_ARCH_QSD8X50) |
| 56 | #define DGT_HZ (19200000 / 4) /* 19.2 MHz / 4 by default */ | 58 | #define DGT_HZ (19200000 / 4) /* 19.2 MHz / 4 by default */ |
| 57 | #define MSM_DGT_SHIFT (0) | 59 | #define MSM_DGT_SHIFT (0) |
| 58 | #elif defined(CONFIG_ARCH_MSM7X30) || defined(CONFIG_ARCH_MSM8X60) || \ | 60 | #elif defined(CONFIG_ARCH_MSM7X30) |
| 59 | defined(CONFIG_ARCH_MSM8960) | ||
| 60 | #define DGT_HZ (24576000 / 4) /* 24.576 MHz (LPXO) / 4 by default */ | 61 | #define DGT_HZ (24576000 / 4) /* 24.576 MHz (LPXO) / 4 by default */ |
| 61 | #define MSM_DGT_SHIFT (0) | 62 | #define MSM_DGT_SHIFT (0) |
| 63 | #elif defined(CONFIG_ARCH_MSM8X60) || defined(CONFIG_ARCH_MSM8960) | ||
| 64 | #define DGT_HZ (27000000 / 4) /* 27 MHz (PXO) / 4 by default */ | ||
| 65 | #define MSM_DGT_SHIFT (0) | ||
| 62 | #else | 66 | #else |
| 63 | #define DGT_HZ 19200000 /* 19.2 MHz or 600 KHz after shift */ | 67 | #define DGT_HZ 19200000 /* 19.2 MHz or 600 KHz after shift */ |
| 64 | #define MSM_DGT_SHIFT (5) | 68 | #define MSM_DGT_SHIFT (5) |
| @@ -100,7 +104,11 @@ static cycle_t msm_read_timer_count(struct clocksource *cs) | |||
| 100 | { | 104 | { |
| 101 | struct msm_clock *clk = container_of(cs, struct msm_clock, clocksource); | 105 | struct msm_clock *clk = container_of(cs, struct msm_clock, clocksource); |
| 102 | 106 | ||
| 103 | return readl(clk->global_counter); | 107 | /* |
| 108 | * Shift timer count down by a constant due to unreliable lower bits | ||
| 109 | * on some targets. | ||
| 110 | */ | ||
| 111 | return readl(clk->global_counter) >> clk->shift; | ||
| 104 | } | 112 | } |
| 105 | 113 | ||
| 106 | static struct msm_clock *clockevent_to_clock(struct clock_event_device *evt) | 114 | static struct msm_clock *clockevent_to_clock(struct clock_event_device *evt) |
