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authorBen Skeggs <bskeggs@redhat.com>2011-05-24 00:37:41 -0400
committerBen Skeggs <bskeggs@redhat.com>2011-06-23 01:57:07 -0400
commit847adea2c701b519b43d8c958c5082a22eeba346 (patch)
treea16bdc1fd3bc21d98a712ece351ab129f2497658
parent068da16198ad09343b0c3647d26f81683921bc84 (diff)
drm/nvc0/gr: macro to determine fermi class, will use it in a few places
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
-rw-r--r--drivers/gpu/drm/nouveau/nvc0_graph.c13
-rw-r--r--drivers/gpu/drm/nouveau/nvc0_graph.h22
2 files changed, 29 insertions, 6 deletions
diff --git a/drivers/gpu/drm/nouveau/nvc0_graph.c b/drivers/gpu/drm/nouveau/nvc0_graph.c
index ca6db204d644..a57fba3da941 100644
--- a/drivers/gpu/drm/nouveau/nvc0_graph.c
+++ b/drivers/gpu/drm/nouveau/nvc0_graph.c
@@ -675,13 +675,10 @@ nvc0_graph_create(struct drm_device *dev)
675 struct drm_nouveau_private *dev_priv = dev->dev_private; 675 struct drm_nouveau_private *dev_priv = dev->dev_private;
676 struct nvc0_graph_priv *priv; 676 struct nvc0_graph_priv *priv;
677 int ret, gpc, i; 677 int ret, gpc, i;
678 u32 fermi;
678 679
679 switch (dev_priv->chipset) { 680 fermi = nvc0_graph_class(dev);
680 case 0xc0: 681 if (!fermi) {
681 case 0xc3:
682 case 0xc4:
683 break;
684 default:
685 NV_ERROR(dev, "PGRAPH: unsupported chipset, please report!\n"); 682 NV_ERROR(dev, "PGRAPH: unsupported chipset, please report!\n");
686 return 0; 683 return 0;
687 } 684 }
@@ -770,6 +767,10 @@ nvc0_graph_create(struct drm_device *dev)
770 NVOBJ_CLASS(dev, 0x9039, GR); /* M2MF */ 767 NVOBJ_CLASS(dev, 0x9039, GR); /* M2MF */
771 NVOBJ_MTHD (dev, 0x9039, 0x0500, nvc0_graph_mthd_page_flip); 768 NVOBJ_MTHD (dev, 0x9039, 0x0500, nvc0_graph_mthd_page_flip);
772 NVOBJ_CLASS(dev, 0x9097, GR); /* 3D */ 769 NVOBJ_CLASS(dev, 0x9097, GR); /* 3D */
770 if (fermi >= 0x9197)
771 NVOBJ_CLASS(dev, 0x9197, GR); /* 3D (NVC1-) */
772 if (fermi >= 0x9297)
773 NVOBJ_CLASS(dev, 0x9297, GR); /* 3D (NVC8-) */
773 NVOBJ_CLASS(dev, 0x90c0, GR); /* COMPUTE */ 774 NVOBJ_CLASS(dev, 0x90c0, GR); /* COMPUTE */
774 return 0; 775 return 0;
775 776
diff --git a/drivers/gpu/drm/nouveau/nvc0_graph.h b/drivers/gpu/drm/nouveau/nvc0_graph.h
index f5d184e0689d..2b667d4e88ca 100644
--- a/drivers/gpu/drm/nouveau/nvc0_graph.h
+++ b/drivers/gpu/drm/nouveau/nvc0_graph.h
@@ -72,4 +72,26 @@ struct nvc0_graph_chan {
72 72
73int nvc0_grctx_generate(struct nouveau_channel *); 73int nvc0_grctx_generate(struct nouveau_channel *);
74 74
75/* nvc0_graph.c uses this also to determine supported chipsets */
76static inline u32
77nvc0_graph_class(struct drm_device *dev)
78{
79 struct drm_nouveau_private *dev_priv = dev->dev_private;
80
81 switch (dev_priv->chipset) {
82 case 0xc0:
83 case 0xc3:
84 case 0xc4:
85 return 0x9097;
86#if 0
87 case 0xc1:
88 return 0x9197;
89 case 0xc8:
90 return 0x9297;
91#endif
92 default:
93 return 0;
94 }
95}
96
75#endif 97#endif