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authorH Hartley Sweeten <hartleys@visionengravers.com>2012-09-24 16:38:22 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2012-09-26 12:37:32 -0400
commit7f98961c0d4bdebc4508c59cead7f349e47feb7f (patch)
tree5606aa28eb75359fba0b1b1ffb0147e203549865
parent17553c88a21866333f4dfe15fe75591d80f02f76 (diff)
staging: comedi: s626: remove 'ChargeEnabled' from private data
This variable is never used in the driver. Just remove it. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Cc: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--drivers/staging/comedi/drivers/s626.c7
1 files changed, 0 insertions, 7 deletions
diff --git a/drivers/staging/comedi/drivers/s626.c b/drivers/staging/comedi/drivers/s626.c
index e67e1299d604..4eb1a6708bdf 100644
--- a/drivers/staging/comedi/drivers/s626.c
+++ b/drivers/staging/comedi/drivers/s626.c
@@ -98,7 +98,6 @@ struct s626_private {
98 /* Pointer to logical adrs of DMA buffer used to hold DAC data. */ 98 /* Pointer to logical adrs of DMA buffer used to hold DAC data. */
99 uint16_t Dacpol; /* Image of DAC polarity register. */ 99 uint16_t Dacpol; /* Image of DAC polarity register. */
100 uint8_t TrimSetpoint[12]; /* Images of TrimDAC setpoints */ 100 uint8_t TrimSetpoint[12]; /* Images of TrimDAC setpoints */
101 uint16_t ChargeEnabled; /* Image of MISC2 Battery */
102 /* Charge Enabled (0 or WRMISC2_CHARGE_ENABLE). */ 101 /* Charge Enabled (0 or WRMISC2_CHARGE_ENABLE). */
103 uint16_t WDInterval; /* Image of MISC2 watchdog interval control bits. */ 102 uint16_t WDInterval; /* Image of MISC2 watchdog interval control bits. */
104 uint32_t I2CAdrs; 103 uint32_t I2CAdrs;
@@ -2667,12 +2666,6 @@ static void s626_initialize(struct comedi_device *dev)
2667 for (chan = 0; chan < S626_DAC_CHANNELS; chan++) 2666 for (chan = 0; chan < S626_DAC_CHANNELS; chan++)
2668 SetDAC(dev, chan, 0); 2667 SetDAC(dev, chan, 0);
2669 2668
2670 /* Init image of WRMISC2 Battery Charger Enabled control bit.
2671 * This image is used when the state of the charger control bit,
2672 * which has no direct hardware readback mechanism, is queried.
2673 */
2674 devpriv->ChargeEnabled = 0;
2675
2676 /* Init image of watchdog timer interval in WRMISC2. This image 2669 /* Init image of watchdog timer interval in WRMISC2. This image
2677 * maintains the value of the control bits of MISC2 are 2670 * maintains the value of the control bits of MISC2 are
2678 * continuously reset to zero as long as the WD timer is disabled. 2671 * continuously reset to zero as long as the WD timer is disabled.