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authorBen Skeggs <bskeggs@redhat.com>2014-03-03 01:18:56 -0500
committerBen Skeggs <bskeggs@redhat.com>2014-03-26 00:08:12 -0400
commit7e1945334981e23e265ee208cd3da0de60f3bcfe (patch)
treea53975448575dd3a2d6f1e8cea40d810209f72ef
parent97af71fa406a347dddb59e01ac846f2ddab6bff9 (diff)
drm/gf100-/gf: split tpc state into its subunits
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/graph/ctxnv108.c24
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c42
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.h19
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc1.c47
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc4.c42
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd7.c32
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd9.c40
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c26
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c26
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/graph/nv108.c33
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c52
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h16
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/graph/nvc1.c41
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/graph/nvc4.c35
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/graph/nvc8.c32
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/graph/nvd7.c37
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/graph/nvd9.c42
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/graph/nve4.c32
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/graph/nvf0.c26
19 files changed, 374 insertions, 270 deletions
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnv108.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnv108.c
index 12120dff8cd8..2af03ddcc51d 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnv108.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnv108.c
@@ -458,10 +458,7 @@ nv108_grctx_pack_gpc[] = {
458}; 458};
459 459
460static const struct nvc0_graph_init 460static const struct nvc0_graph_init
461nv108_grctx_init_tpc_0[] = { 461nv108_grctx_init_tex_0[] = {
462 { 0x419848, 1, 0x04, 0x00000000 },
463 { 0x419864, 1, 0x04, 0x00000129 },
464 { 0x419888, 1, 0x04, 0x00000000 },
465 { 0x419a00, 1, 0x04, 0x000100f0 }, 462 { 0x419a00, 1, 0x04, 0x000100f0 },
466 { 0x419a04, 1, 0x04, 0x00000001 }, 463 { 0x419a04, 1, 0x04, 0x00000001 },
467 { 0x419a08, 1, 0x04, 0x00000421 }, 464 { 0x419a08, 1, 0x04, 0x00000421 },
@@ -472,14 +469,11 @@ nv108_grctx_init_tpc_0[] = {
472 { 0x419a20, 1, 0x04, 0x00000800 }, 469 { 0x419a20, 1, 0x04, 0x00000800 },
473 { 0x419a30, 1, 0x04, 0x00000001 }, 470 { 0x419a30, 1, 0x04, 0x00000001 },
474 { 0x419ac4, 1, 0x04, 0x0037f440 }, 471 { 0x419ac4, 1, 0x04, 0x0037f440 },
475 { 0x419c00, 1, 0x04, 0x0000001a }, 472 {}
476 { 0x419c04, 1, 0x04, 0x80000006 }, 473};
477 { 0x419c08, 1, 0x04, 0x00000002 }, 474
478 { 0x419c20, 1, 0x04, 0x00000000 }, 475static const struct nvc0_graph_init
479 { 0x419c24, 1, 0x04, 0x00084210 }, 476nv108_grctx_init_sm_0[] = {
480 { 0x419c28, 1, 0x04, 0x3efbefbe },
481 { 0x419ce8, 1, 0x04, 0x00000000 },
482 { 0x419cf4, 1, 0x04, 0x00000203 },
483 { 0x419e04, 1, 0x04, 0x00000000 }, 477 { 0x419e04, 1, 0x04, 0x00000000 },
484 { 0x419e08, 1, 0x04, 0x0000001d }, 478 { 0x419e08, 1, 0x04, 0x0000001d },
485 { 0x419e0c, 1, 0x04, 0x00000000 }, 479 { 0x419e0c, 1, 0x04, 0x00000000 },
@@ -508,7 +502,11 @@ nv108_grctx_init_tpc_0[] = {
508 502
509static const struct nvc0_graph_pack 503static const struct nvc0_graph_pack
510nv108_grctx_pack_tpc[] = { 504nv108_grctx_pack_tpc[] = {
511 { nv108_grctx_init_tpc_0 }, 505 { nvd7_grctx_init_pe_0 },
506 { nv108_grctx_init_tex_0 },
507 { nvf0_grctx_init_mpc_0 },
508 { nvf0_grctx_init_l1c_0 },
509 { nv108_grctx_init_sm_0 },
512 {} 510 {}
513}; 511};
514 512
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c
index 626a67318397..833a96508c4e 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c
@@ -894,19 +894,29 @@ nvc0_grctx_pack_zcull[] = {
894 {} 894 {}
895}; 895};
896 896
897static const struct nvc0_graph_init 897const struct nvc0_graph_init
898nvc0_grctx_init_tpc_0[] = { 898nvc0_grctx_init_pe_0[] = {
899 { 0x419818, 1, 0x04, 0x00000000 }, 899 { 0x419818, 1, 0x04, 0x00000000 },
900 { 0x41983c, 1, 0x04, 0x00038bc7 }, 900 { 0x41983c, 1, 0x04, 0x00038bc7 },
901 { 0x419848, 1, 0x04, 0x00000000 }, 901 { 0x419848, 1, 0x04, 0x00000000 },
902 { 0x419864, 1, 0x04, 0x0000012a }, 902 { 0x419864, 1, 0x04, 0x0000012a },
903 { 0x419888, 1, 0x04, 0x00000000 }, 903 { 0x419888, 1, 0x04, 0x00000000 },
904 {}
905};
906
907static const struct nvc0_graph_init
908nvc0_grctx_init_tex_0[] = {
904 { 0x419a00, 1, 0x04, 0x000001f0 }, 909 { 0x419a00, 1, 0x04, 0x000001f0 },
905 { 0x419a04, 1, 0x04, 0x00000001 }, 910 { 0x419a04, 1, 0x04, 0x00000001 },
906 { 0x419a08, 1, 0x04, 0x00000023 }, 911 { 0x419a08, 1, 0x04, 0x00000023 },
907 { 0x419a0c, 1, 0x04, 0x00020000 }, 912 { 0x419a0c, 1, 0x04, 0x00020000 },
908 { 0x419a10, 1, 0x04, 0x00000000 }, 913 { 0x419a10, 1, 0x04, 0x00000000 },
909 { 0x419a14, 1, 0x04, 0x00000200 }, 914 { 0x419a14, 1, 0x04, 0x00000200 },
915 {}
916};
917
918const struct nvc0_graph_init
919nvc0_grctx_init_wwdx_0[] = {
910 { 0x419b00, 1, 0x04, 0x0a418820 }, 920 { 0x419b00, 1, 0x04, 0x0a418820 },
911 { 0x419b04, 1, 0x04, 0x062080e6 }, 921 { 0x419b04, 1, 0x04, 0x062080e6 },
912 { 0x419b08, 1, 0x04, 0x020398a4 }, 922 { 0x419b08, 1, 0x04, 0x020398a4 },
@@ -916,15 +926,35 @@ nvc0_grctx_init_tpc_0[] = {
916 { 0x419bd0, 1, 0x04, 0x00900103 }, 926 { 0x419bd0, 1, 0x04, 0x00900103 },
917 { 0x419be0, 1, 0x04, 0x00000001 }, 927 { 0x419be0, 1, 0x04, 0x00000001 },
918 { 0x419be4, 1, 0x04, 0x00000000 }, 928 { 0x419be4, 1, 0x04, 0x00000000 },
929 {}
930};
931
932const struct nvc0_graph_init
933nvc0_grctx_init_mpc_0[] = {
919 { 0x419c00, 1, 0x04, 0x00000002 }, 934 { 0x419c00, 1, 0x04, 0x00000002 },
920 { 0x419c04, 1, 0x04, 0x00000006 }, 935 { 0x419c04, 1, 0x04, 0x00000006 },
921 { 0x419c08, 1, 0x04, 0x00000002 }, 936 { 0x419c08, 1, 0x04, 0x00000002 },
922 { 0x419c20, 1, 0x04, 0x00000000 }, 937 { 0x419c20, 1, 0x04, 0x00000000 },
938 {}
939};
940
941static const struct nvc0_graph_init
942nvc0_grctx_init_l1c_0[] = {
923 { 0x419cb0, 1, 0x04, 0x00060048 }, 943 { 0x419cb0, 1, 0x04, 0x00060048 },
924 { 0x419ce8, 1, 0x04, 0x00000000 }, 944 { 0x419ce8, 1, 0x04, 0x00000000 },
925 { 0x419cf4, 1, 0x04, 0x00000183 }, 945 { 0x419cf4, 1, 0x04, 0x00000183 },
946 {}
947};
948
949const struct nvc0_graph_init
950nvc0_grctx_init_tpccs_0[] = {
926 { 0x419d20, 1, 0x04, 0x02180000 }, 951 { 0x419d20, 1, 0x04, 0x02180000 },
927 { 0x419d24, 1, 0x04, 0x00001fff }, 952 { 0x419d24, 1, 0x04, 0x00001fff },
953 {}
954};
955
956static const struct nvc0_graph_init
957nvc0_grctx_init_sm_0[] = {
928 { 0x419e04, 3, 0x04, 0x00000000 }, 958 { 0x419e04, 3, 0x04, 0x00000000 },
929 { 0x419e10, 1, 0x04, 0x00000002 }, 959 { 0x419e10, 1, 0x04, 0x00000002 },
930 { 0x419e44, 1, 0x04, 0x001beff2 }, 960 { 0x419e44, 1, 0x04, 0x001beff2 },
@@ -938,7 +968,13 @@ nvc0_grctx_init_tpc_0[] = {
938 968
939const struct nvc0_graph_pack 969const struct nvc0_graph_pack
940nvc0_grctx_pack_tpc[] = { 970nvc0_grctx_pack_tpc[] = {
941 { nvc0_grctx_init_tpc_0 }, 971 { nvc0_grctx_init_pe_0 },
972 { nvc0_grctx_init_tex_0 },
973 { nvc0_grctx_init_wwdx_0 },
974 { nvc0_grctx_init_mpc_0 },
975 { nvc0_grctx_init_l1c_0 },
976 { nvc0_grctx_init_tpccs_0 },
977 { nvc0_grctx_init_sm_0 },
942 {} 978 {}
943}; 979};
944 980
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.h b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.h
index b11c13a6159e..fad89ad11910 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.h
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.h
@@ -105,11 +105,23 @@ extern const struct nvc0_graph_init nvc0_grctx_init_gcc_0[];
105extern const struct nvc0_graph_pack nvc0_grctx_pack_zcull[]; 105extern const struct nvc0_graph_pack nvc0_grctx_pack_zcull[];
106 106
107extern const struct nvc0_graph_pack nvc0_grctx_pack_tpc[]; 107extern const struct nvc0_graph_pack nvc0_grctx_pack_tpc[];
108extern const struct nvc0_graph_init nvc0_grctx_init_pe_0[];
109extern const struct nvc0_graph_init nvc0_grctx_init_wwdx_0[];
110extern const struct nvc0_graph_init nvc0_grctx_init_mpc_0[];
111extern const struct nvc0_graph_init nvc0_grctx_init_tpccs_0[];
112
113extern const struct nvc0_graph_init nvc4_grctx_init_tex_0[];
114extern const struct nvc0_graph_init nvc4_grctx_init_l1c_0[];
115extern const struct nvc0_graph_init nvc4_grctx_init_sm_0[];
108 116
109extern const struct nvc0_graph_init nvc1_grctx_init_9097_0[]; 117extern const struct nvc0_graph_init nvc1_grctx_init_9097_0[];
110 118
111extern const struct nvc0_graph_init nvc1_grctx_init_gpm_0[]; 119extern const struct nvc0_graph_init nvc1_grctx_init_gpm_0[];
112 120
121extern const struct nvc0_graph_init nvc1_grctx_init_pe_0[];
122extern const struct nvc0_graph_init nvc1_grctx_init_wwdx_0[];
123extern const struct nvc0_graph_init nvc1_grctx_init_tpccs_0[];
124
113extern const struct nvc0_graph_init nvc8_grctx_init_9197_0[]; 125extern const struct nvc0_graph_init nvc8_grctx_init_9197_0[];
114extern const struct nvc0_graph_init nvc8_grctx_init_9297_0[]; 126extern const struct nvc0_graph_init nvc8_grctx_init_9297_0[];
115 127
@@ -124,6 +136,10 @@ extern const struct nvc0_graph_init nvd9_grctx_init_prop_0[];
124extern const struct nvc0_graph_init nvd9_grctx_init_gpc_unk_1[]; 136extern const struct nvc0_graph_init nvd9_grctx_init_gpc_unk_1[];
125extern const struct nvc0_graph_init nvd9_grctx_init_crstr_0[]; 137extern const struct nvc0_graph_init nvd9_grctx_init_crstr_0[];
126 138
139extern const struct nvc0_graph_init nvd9_grctx_init_sm_0[];
140
141extern const struct nvc0_graph_init nvd7_grctx_init_pe_0[];
142
127extern const struct nvc0_graph_init nve4_grctx_init_memfmt_0[]; 143extern const struct nvc0_graph_init nve4_grctx_init_memfmt_0[];
128extern const struct nvc0_graph_init nve4_grctx_init_ds_0[]; 144extern const struct nvc0_graph_init nve4_grctx_init_ds_0[];
129extern const struct nvc0_graph_init nve4_grctx_init_scc_0[]; 145extern const struct nvc0_graph_init nve4_grctx_init_scc_0[];
@@ -137,5 +153,8 @@ extern const struct nvc0_graph_init nvf0_grctx_init_cwd_0[];
137 153
138extern const struct nvc0_graph_init nvf0_grctx_init_gpc_unk_2[]; 154extern const struct nvc0_graph_init nvf0_grctx_init_gpc_unk_2[];
139 155
156extern const struct nvc0_graph_init nvf0_grctx_init_mpc_0[];
157extern const struct nvc0_graph_init nvf0_grctx_init_l1c_0[];
158
140 159
141#endif 160#endif
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc1.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc1.c
index 5b1c018daaa6..24a92c569c0a 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc1.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc1.c
@@ -678,22 +678,18 @@ nvc1_grctx_pack_gpc[] = {
678 {} 678 {}
679}; 679};
680 680
681static const struct nvc0_graph_init 681const struct nvc0_graph_init
682nvc1_grctx_init_tpc_0[] = { 682nvc1_grctx_init_pe_0[] = {
683 { 0x419818, 1, 0x04, 0x00000000 }, 683 { 0x419818, 1, 0x04, 0x00000000 },
684 { 0x41983c, 1, 0x04, 0x00038bc7 }, 684 { 0x41983c, 1, 0x04, 0x00038bc7 },
685 { 0x419848, 1, 0x04, 0x00000000 }, 685 { 0x419848, 1, 0x04, 0x00000000 },
686 { 0x419864, 1, 0x04, 0x00000129 }, 686 { 0x419864, 1, 0x04, 0x00000129 },
687 { 0x419888, 1, 0x04, 0x00000000 }, 687 { 0x419888, 1, 0x04, 0x00000000 },
688 { 0x419a00, 1, 0x04, 0x000001f0 }, 688 {}
689 { 0x419a04, 1, 0x04, 0x00000001 }, 689};
690 { 0x419a08, 1, 0x04, 0x00000023 }, 690
691 { 0x419a0c, 1, 0x04, 0x00020000 }, 691const struct nvc0_graph_init
692 { 0x419a10, 1, 0x04, 0x00000000 }, 692nvc1_grctx_init_wwdx_0[] = {
693 { 0x419a14, 1, 0x04, 0x00000200 },
694 { 0x419a1c, 1, 0x04, 0x00000000 },
695 { 0x419a20, 1, 0x04, 0x00000800 },
696 { 0x419ac4, 1, 0x04, 0x0007f440 },
697 { 0x419b00, 1, 0x04, 0x0a418820 }, 693 { 0x419b00, 1, 0x04, 0x0a418820 },
698 { 0x419b04, 1, 0x04, 0x062080e6 }, 694 { 0x419b04, 1, 0x04, 0x062080e6 },
699 { 0x419b08, 1, 0x04, 0x020398a4 }, 695 { 0x419b08, 1, 0x04, 0x020398a4 },
@@ -703,31 +699,26 @@ nvc1_grctx_init_tpc_0[] = {
703 { 0x419bd0, 1, 0x04, 0x00900103 }, 699 { 0x419bd0, 1, 0x04, 0x00900103 },
704 { 0x419be0, 1, 0x04, 0x00400001 }, 700 { 0x419be0, 1, 0x04, 0x00400001 },
705 { 0x419be4, 1, 0x04, 0x00000000 }, 701 { 0x419be4, 1, 0x04, 0x00000000 },
706 { 0x419c00, 1, 0x04, 0x00000002 }, 702 {}
707 { 0x419c04, 1, 0x04, 0x00000006 }, 703};
708 { 0x419c08, 1, 0x04, 0x00000002 }, 704
709 { 0x419c20, 1, 0x04, 0x00000000 }, 705const struct nvc0_graph_init
710 { 0x419cb0, 1, 0x04, 0x00020048 }, 706nvc1_grctx_init_tpccs_0[] = {
711 { 0x419ce8, 1, 0x04, 0x00000000 },
712 { 0x419cf4, 1, 0x04, 0x00000183 },
713 { 0x419d20, 1, 0x04, 0x12180000 }, 707 { 0x419d20, 1, 0x04, 0x12180000 },
714 { 0x419d24, 1, 0x04, 0x00001fff }, 708 { 0x419d24, 1, 0x04, 0x00001fff },
715 { 0x419d44, 1, 0x04, 0x02180218 }, 709 { 0x419d44, 1, 0x04, 0x02180218 },
716 { 0x419e04, 3, 0x04, 0x00000000 },
717 { 0x419e10, 1, 0x04, 0x00000002 },
718 { 0x419e44, 1, 0x04, 0x001beff2 },
719 { 0x419e48, 1, 0x04, 0x00000000 },
720 { 0x419e4c, 1, 0x04, 0x0000000f },
721 { 0x419e50, 17, 0x04, 0x00000000 },
722 { 0x419e98, 1, 0x04, 0x00000000 },
723 { 0x419ee0, 1, 0x04, 0x00011110 },
724 { 0x419f30, 11, 0x04, 0x00000000 },
725 {} 710 {}
726}; 711};
727 712
728static const struct nvc0_graph_pack 713static const struct nvc0_graph_pack
729nvc1_grctx_pack_tpc[] = { 714nvc1_grctx_pack_tpc[] = {
730 { nvc1_grctx_init_tpc_0 }, 715 { nvc1_grctx_init_pe_0 },
716 { nvc4_grctx_init_tex_0 },
717 { nvc1_grctx_init_wwdx_0 },
718 { nvc0_grctx_init_mpc_0 },
719 { nvc4_grctx_init_l1c_0 },
720 { nvc1_grctx_init_tpccs_0 },
721 { nvc4_grctx_init_sm_0 },
731 {} 722 {}
732}; 723};
733 724
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc4.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc4.c
index 885171b2c54e..e11ed5538193 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc4.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc4.c
@@ -28,13 +28,8 @@
28 * PGRAPH context register lists 28 * PGRAPH context register lists
29 ******************************************************************************/ 29 ******************************************************************************/
30 30
31static const struct nvc0_graph_init 31const struct nvc0_graph_init
32nvc4_grctx_init_tpc_0[] = { 32nvc4_grctx_init_tex_0[] = {
33 { 0x419818, 1, 0x04, 0x00000000 },
34 { 0x41983c, 1, 0x04, 0x00038bc7 },
35 { 0x419848, 1, 0x04, 0x00000000 },
36 { 0x419864, 1, 0x04, 0x0000012a },
37 { 0x419888, 1, 0x04, 0x00000000 },
38 { 0x419a00, 1, 0x04, 0x000001f0 }, 33 { 0x419a00, 1, 0x04, 0x000001f0 },
39 { 0x419a04, 1, 0x04, 0x00000001 }, 34 { 0x419a04, 1, 0x04, 0x00000001 },
40 { 0x419a08, 1, 0x04, 0x00000023 }, 35 { 0x419a08, 1, 0x04, 0x00000023 },
@@ -44,24 +39,19 @@ nvc4_grctx_init_tpc_0[] = {
44 { 0x419a1c, 1, 0x04, 0x00000000 }, 39 { 0x419a1c, 1, 0x04, 0x00000000 },
45 { 0x419a20, 1, 0x04, 0x00000800 }, 40 { 0x419a20, 1, 0x04, 0x00000800 },
46 { 0x419ac4, 1, 0x04, 0x0007f440 }, 41 { 0x419ac4, 1, 0x04, 0x0007f440 },
47 { 0x419b00, 1, 0x04, 0x0a418820 }, 42 {}
48 { 0x419b04, 1, 0x04, 0x062080e6 }, 43};
49 { 0x419b08, 1, 0x04, 0x020398a4 }, 44
50 { 0x419b0c, 1, 0x04, 0x0e629062 }, 45const struct nvc0_graph_init
51 { 0x419b10, 1, 0x04, 0x0a418820 }, 46nvc4_grctx_init_l1c_0[] = {
52 { 0x419b14, 1, 0x04, 0x000000e6 },
53 { 0x419bd0, 1, 0x04, 0x00900103 },
54 { 0x419be0, 1, 0x04, 0x00000001 },
55 { 0x419be4, 1, 0x04, 0x00000000 },
56 { 0x419c00, 1, 0x04, 0x00000002 },
57 { 0x419c04, 1, 0x04, 0x00000006 },
58 { 0x419c08, 1, 0x04, 0x00000002 },
59 { 0x419c20, 1, 0x04, 0x00000000 },
60 { 0x419cb0, 1, 0x04, 0x00020048 }, 47 { 0x419cb0, 1, 0x04, 0x00020048 },
61 { 0x419ce8, 1, 0x04, 0x00000000 }, 48 { 0x419ce8, 1, 0x04, 0x00000000 },
62 { 0x419cf4, 1, 0x04, 0x00000183 }, 49 { 0x419cf4, 1, 0x04, 0x00000183 },
63 { 0x419d20, 1, 0x04, 0x02180000 }, 50 {}
64 { 0x419d24, 1, 0x04, 0x00001fff }, 51};
52
53const struct nvc0_graph_init
54nvc4_grctx_init_sm_0[] = {
65 { 0x419e04, 3, 0x04, 0x00000000 }, 55 { 0x419e04, 3, 0x04, 0x00000000 },
66 { 0x419e10, 1, 0x04, 0x00000002 }, 56 { 0x419e10, 1, 0x04, 0x00000002 },
67 { 0x419e44, 1, 0x04, 0x001beff2 }, 57 { 0x419e44, 1, 0x04, 0x001beff2 },
@@ -76,7 +66,13 @@ nvc4_grctx_init_tpc_0[] = {
76 66
77static const struct nvc0_graph_pack 67static const struct nvc0_graph_pack
78nvc4_grctx_pack_tpc[] = { 68nvc4_grctx_pack_tpc[] = {
79 { nvc4_grctx_init_tpc_0 }, 69 { nvc0_grctx_init_pe_0 },
70 { nvc4_grctx_init_tex_0 },
71 { nvc0_grctx_init_wwdx_0 },
72 { nvc0_grctx_init_mpc_0 },
73 { nvc4_grctx_init_l1c_0 },
74 { nvc0_grctx_init_tpccs_0 },
75 { nvc4_grctx_init_sm_0 },
80 {} 76 {}
81}; 77};
82 78
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd7.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd7.c
index 00e7668d833a..21a4cccecc10 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd7.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd7.c
@@ -94,11 +94,16 @@ nvd7_grctx_pack_gpc[] = {
94 {} 94 {}
95}; 95};
96 96
97static const struct nvc0_graph_init 97const struct nvc0_graph_init
98nvd7_grctx_init_tpc_0[] = { 98nvd7_grctx_init_pe_0[] = {
99 { 0x419848, 1, 0x04, 0x00000000 }, 99 { 0x419848, 1, 0x04, 0x00000000 },
100 { 0x419864, 1, 0x04, 0x00000129 }, 100 { 0x419864, 1, 0x04, 0x00000129 },
101 { 0x419888, 1, 0x04, 0x00000000 }, 101 { 0x419888, 1, 0x04, 0x00000000 },
102 {}
103};
104
105static const struct nvc0_graph_init
106nvd7_grctx_init_tex_0[] = {
102 { 0x419a00, 1, 0x04, 0x000001f0 }, 107 { 0x419a00, 1, 0x04, 0x000001f0 },
103 { 0x419a04, 1, 0x04, 0x00000001 }, 108 { 0x419a04, 1, 0x04, 0x00000001 },
104 { 0x419a08, 1, 0x04, 0x00000023 }, 109 { 0x419a08, 1, 0x04, 0x00000023 },
@@ -108,30 +113,27 @@ nvd7_grctx_init_tpc_0[] = {
108 { 0x419a1c, 1, 0x04, 0x00008000 }, 113 { 0x419a1c, 1, 0x04, 0x00008000 },
109 { 0x419a20, 1, 0x04, 0x00000800 }, 114 { 0x419a20, 1, 0x04, 0x00000800 },
110 { 0x419ac4, 1, 0x04, 0x0017f440 }, 115 { 0x419ac4, 1, 0x04, 0x0017f440 },
116 {}
117};
118
119static const struct nvc0_graph_init
120nvd7_grctx_init_mpc_0[] = {
111 { 0x419c00, 1, 0x04, 0x0000000a }, 121 { 0x419c00, 1, 0x04, 0x0000000a },
112 { 0x419c04, 1, 0x04, 0x00000006 }, 122 { 0x419c04, 1, 0x04, 0x00000006 },
113 { 0x419c08, 1, 0x04, 0x00000002 }, 123 { 0x419c08, 1, 0x04, 0x00000002 },
114 { 0x419c20, 1, 0x04, 0x00000000 }, 124 { 0x419c20, 1, 0x04, 0x00000000 },
115 { 0x419c24, 1, 0x04, 0x00084210 }, 125 { 0x419c24, 1, 0x04, 0x00084210 },
116 { 0x419c28, 1, 0x04, 0x3efbefbe }, 126 { 0x419c28, 1, 0x04, 0x3efbefbe },
117 { 0x419cb0, 1, 0x04, 0x00020048 },
118 { 0x419ce8, 1, 0x04, 0x00000000 },
119 { 0x419cf4, 1, 0x04, 0x00000183 },
120 { 0x419e04, 3, 0x04, 0x00000000 },
121 { 0x419e10, 1, 0x04, 0x00000002 },
122 { 0x419e44, 1, 0x04, 0x001beff2 },
123 { 0x419e48, 1, 0x04, 0x00000000 },
124 { 0x419e4c, 1, 0x04, 0x0000000f },
125 { 0x419e50, 17, 0x04, 0x00000000 },
126 { 0x419e98, 1, 0x04, 0x00000000 },
127 { 0x419ee0, 1, 0x04, 0x00010110 },
128 { 0x419f30, 11, 0x04, 0x00000000 },
129 {} 127 {}
130}; 128};
131 129
132static const struct nvc0_graph_pack 130static const struct nvc0_graph_pack
133nvd7_grctx_pack_tpc[] = { 131nvd7_grctx_pack_tpc[] = {
134 { nvd7_grctx_init_tpc_0 }, 132 { nvd7_grctx_init_pe_0 },
133 { nvd7_grctx_init_tex_0 },
134 { nvd7_grctx_init_mpc_0 },
135 { nvc4_grctx_init_l1c_0 },
136 { nvd9_grctx_init_sm_0 },
135 {} 137 {}
136}; 138};
137 139
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd9.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd9.c
index ec53648cb475..c665fb7e4660 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd9.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd9.c
@@ -445,12 +445,7 @@ nvd9_grctx_pack_gpc[] = {
445}; 445};
446 446
447static const struct nvc0_graph_init 447static const struct nvc0_graph_init
448nvd9_grctx_init_tpc_0[] = { 448nvd9_grctx_init_tex_0[] = {
449 { 0x419818, 1, 0x04, 0x00000000 },
450 { 0x41983c, 1, 0x04, 0x00038bc7 },
451 { 0x419848, 1, 0x04, 0x00000000 },
452 { 0x419864, 1, 0x04, 0x00000129 },
453 { 0x419888, 1, 0x04, 0x00000000 },
454 { 0x419a00, 1, 0x04, 0x000001f0 }, 449 { 0x419a00, 1, 0x04, 0x000001f0 },
455 { 0x419a04, 1, 0x04, 0x00000001 }, 450 { 0x419a04, 1, 0x04, 0x00000001 },
456 { 0x419a08, 1, 0x04, 0x00000023 }, 451 { 0x419a08, 1, 0x04, 0x00000023 },
@@ -460,27 +455,22 @@ nvd9_grctx_init_tpc_0[] = {
460 { 0x419a1c, 1, 0x04, 0x00000000 }, 455 { 0x419a1c, 1, 0x04, 0x00000000 },
461 { 0x419a20, 1, 0x04, 0x00000800 }, 456 { 0x419a20, 1, 0x04, 0x00000800 },
462 { 0x419ac4, 1, 0x04, 0x0017f440 }, 457 { 0x419ac4, 1, 0x04, 0x0017f440 },
463 { 0x419b00, 1, 0x04, 0x0a418820 }, 458 {}
464 { 0x419b04, 1, 0x04, 0x062080e6 }, 459};
465 { 0x419b08, 1, 0x04, 0x020398a4 }, 460
466 { 0x419b0c, 1, 0x04, 0x0e629062 }, 461static const struct nvc0_graph_init
467 { 0x419b10, 1, 0x04, 0x0a418820 }, 462nvd9_grctx_init_mpc_0[] = {
468 { 0x419b14, 1, 0x04, 0x000000e6 },
469 { 0x419bd0, 1, 0x04, 0x00900103 },
470 { 0x419be0, 1, 0x04, 0x00400001 },
471 { 0x419be4, 1, 0x04, 0x00000000 },
472 { 0x419c00, 1, 0x04, 0x0000000a }, 463 { 0x419c00, 1, 0x04, 0x0000000a },
473 { 0x419c04, 1, 0x04, 0x00000006 }, 464 { 0x419c04, 1, 0x04, 0x00000006 },
474 { 0x419c08, 1, 0x04, 0x00000002 }, 465 { 0x419c08, 1, 0x04, 0x00000002 },
475 { 0x419c20, 1, 0x04, 0x00000000 }, 466 { 0x419c20, 1, 0x04, 0x00000000 },
476 { 0x419c24, 1, 0x04, 0x00084210 }, 467 { 0x419c24, 1, 0x04, 0x00084210 },
477 { 0x419c28, 1, 0x04, 0x3cf3cf3c }, 468 { 0x419c28, 1, 0x04, 0x3cf3cf3c },
478 { 0x419cb0, 1, 0x04, 0x00020048 }, 469 {}
479 { 0x419ce8, 1, 0x04, 0x00000000 }, 470};
480 { 0x419cf4, 1, 0x04, 0x00000183 }, 471
481 { 0x419d20, 1, 0x04, 0x12180000 }, 472const struct nvc0_graph_init
482 { 0x419d24, 1, 0x04, 0x00001fff }, 473nvd9_grctx_init_sm_0[] = {
483 { 0x419d44, 1, 0x04, 0x02180218 },
484 { 0x419e04, 3, 0x04, 0x00000000 }, 474 { 0x419e04, 3, 0x04, 0x00000000 },
485 { 0x419e10, 1, 0x04, 0x00000002 }, 475 { 0x419e10, 1, 0x04, 0x00000002 },
486 { 0x419e44, 1, 0x04, 0x001beff2 }, 476 { 0x419e44, 1, 0x04, 0x001beff2 },
@@ -495,7 +485,13 @@ nvd9_grctx_init_tpc_0[] = {
495 485
496static const struct nvc0_graph_pack 486static const struct nvc0_graph_pack
497nvd9_grctx_pack_tpc[] = { 487nvd9_grctx_pack_tpc[] = {
498 { nvd9_grctx_init_tpc_0 }, 488 { nvc1_grctx_init_pe_0 },
489 { nvd9_grctx_init_tex_0 },
490 { nvc1_grctx_init_wwdx_0 },
491 { nvd9_grctx_init_mpc_0 },
492 { nvc4_grctx_init_l1c_0 },
493 { nvc1_grctx_init_tpccs_0 },
494 { nvd9_grctx_init_sm_0 },
499 {} 495 {}
500}; 496};
501 497
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c
index 0441fe40f4c7..126dbe27ed45 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c
@@ -751,10 +751,7 @@ nve4_grctx_pack_gpc[] = {
751}; 751};
752 752
753static const struct nvc0_graph_init 753static const struct nvc0_graph_init
754nve4_grctx_init_tpc_0[] = { 754nve4_grctx_init_tex_0[] = {
755 { 0x419848, 1, 0x04, 0x00000000 },
756 { 0x419864, 1, 0x04, 0x00000129 },
757 { 0x419888, 1, 0x04, 0x00000000 },
758 { 0x419a00, 1, 0x04, 0x000000f0 }, 755 { 0x419a00, 1, 0x04, 0x000000f0 },
759 { 0x419a04, 1, 0x04, 0x00000001 }, 756 { 0x419a04, 1, 0x04, 0x00000001 },
760 { 0x419a08, 1, 0x04, 0x00000021 }, 757 { 0x419a08, 1, 0x04, 0x00000021 },
@@ -765,14 +762,29 @@ nve4_grctx_init_tpc_0[] = {
765 { 0x419a20, 1, 0x04, 0x00000800 }, 762 { 0x419a20, 1, 0x04, 0x00000800 },
766 { 0x419a30, 1, 0x04, 0x00000001 }, 763 { 0x419a30, 1, 0x04, 0x00000001 },
767 { 0x419ac4, 1, 0x04, 0x0037f440 }, 764 { 0x419ac4, 1, 0x04, 0x0037f440 },
765 {}
766};
767
768static const struct nvc0_graph_init
769nve4_grctx_init_mpc_0[] = {
768 { 0x419c00, 1, 0x04, 0x0000000a }, 770 { 0x419c00, 1, 0x04, 0x0000000a },
769 { 0x419c04, 1, 0x04, 0x80000006 }, 771 { 0x419c04, 1, 0x04, 0x80000006 },
770 { 0x419c08, 1, 0x04, 0x00000002 }, 772 { 0x419c08, 1, 0x04, 0x00000002 },
771 { 0x419c20, 1, 0x04, 0x00000000 }, 773 { 0x419c20, 1, 0x04, 0x00000000 },
772 { 0x419c24, 1, 0x04, 0x00084210 }, 774 { 0x419c24, 1, 0x04, 0x00084210 },
773 { 0x419c28, 1, 0x04, 0x3efbefbe }, 775 { 0x419c28, 1, 0x04, 0x3efbefbe },
776 {}
777};
778
779static const struct nvc0_graph_init
780nve4_grctx_init_l1c_0[] = {
774 { 0x419ce8, 1, 0x04, 0x00000000 }, 781 { 0x419ce8, 1, 0x04, 0x00000000 },
775 { 0x419cf4, 1, 0x04, 0x00003203 }, 782 { 0x419cf4, 1, 0x04, 0x00003203 },
783 {}
784};
785
786static const struct nvc0_graph_init
787nve4_grctx_init_sm_0[] = {
776 { 0x419e04, 3, 0x04, 0x00000000 }, 788 { 0x419e04, 3, 0x04, 0x00000000 },
777 { 0x419e10, 1, 0x04, 0x00000402 }, 789 { 0x419e10, 1, 0x04, 0x00000402 },
778 { 0x419e44, 1, 0x04, 0x0013eff2 }, 790 { 0x419e44, 1, 0x04, 0x0013eff2 },
@@ -792,7 +804,11 @@ nve4_grctx_init_tpc_0[] = {
792 804
793static const struct nvc0_graph_pack 805static const struct nvc0_graph_pack
794nve4_grctx_pack_tpc[] = { 806nve4_grctx_pack_tpc[] = {
795 { nve4_grctx_init_tpc_0 }, 807 { nvd7_grctx_init_pe_0 },
808 { nve4_grctx_init_tex_0 },
809 { nve4_grctx_init_mpc_0 },
810 { nve4_grctx_init_l1c_0 },
811 { nve4_grctx_init_sm_0 },
796 {} 812 {}
797}; 813};
798 814
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c
index 0213395cbb71..9ee6f79596e3 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c
@@ -719,10 +719,7 @@ nvf0_grctx_pack_gpc[] = {
719}; 719};
720 720
721static const struct nvc0_graph_init 721static const struct nvc0_graph_init
722nvf0_grctx_init_tpc_0[] = { 722nvf0_grctx_init_tex_0[] = {
723 { 0x419848, 1, 0x04, 0x00000000 },
724 { 0x419864, 1, 0x04, 0x00000129 },
725 { 0x419888, 1, 0x04, 0x00000000 },
726 { 0x419a00, 1, 0x04, 0x000000f0 }, 723 { 0x419a00, 1, 0x04, 0x000000f0 },
727 { 0x419a04, 1, 0x04, 0x00000001 }, 724 { 0x419a04, 1, 0x04, 0x00000001 },
728 { 0x419a08, 1, 0x04, 0x00000021 }, 725 { 0x419a08, 1, 0x04, 0x00000021 },
@@ -733,14 +730,29 @@ nvf0_grctx_init_tpc_0[] = {
733 { 0x419a20, 1, 0x04, 0x00020800 }, 730 { 0x419a20, 1, 0x04, 0x00020800 },
734 { 0x419a30, 1, 0x04, 0x00000001 }, 731 { 0x419a30, 1, 0x04, 0x00000001 },
735 { 0x419ac4, 1, 0x04, 0x0037f440 }, 732 { 0x419ac4, 1, 0x04, 0x0037f440 },
733 {}
734};
735
736const struct nvc0_graph_init
737nvf0_grctx_init_mpc_0[] = {
736 { 0x419c00, 1, 0x04, 0x0000001a }, 738 { 0x419c00, 1, 0x04, 0x0000001a },
737 { 0x419c04, 1, 0x04, 0x80000006 }, 739 { 0x419c04, 1, 0x04, 0x80000006 },
738 { 0x419c08, 1, 0x04, 0x00000002 }, 740 { 0x419c08, 1, 0x04, 0x00000002 },
739 { 0x419c20, 1, 0x04, 0x00000000 }, 741 { 0x419c20, 1, 0x04, 0x00000000 },
740 { 0x419c24, 1, 0x04, 0x00084210 }, 742 { 0x419c24, 1, 0x04, 0x00084210 },
741 { 0x419c28, 1, 0x04, 0x3efbefbe }, 743 { 0x419c28, 1, 0x04, 0x3efbefbe },
744 {}
745};
746
747const struct nvc0_graph_init
748nvf0_grctx_init_l1c_0[] = {
742 { 0x419ce8, 1, 0x04, 0x00000000 }, 749 { 0x419ce8, 1, 0x04, 0x00000000 },
743 { 0x419cf4, 1, 0x04, 0x00000203 }, 750 { 0x419cf4, 1, 0x04, 0x00000203 },
751 {}
752};
753
754static const struct nvc0_graph_init
755nvf0_grctx_init_sm_0[] = {
744 { 0x419e04, 1, 0x04, 0x00000000 }, 756 { 0x419e04, 1, 0x04, 0x00000000 },
745 { 0x419e08, 1, 0x04, 0x0000001d }, 757 { 0x419e08, 1, 0x04, 0x0000001d },
746 { 0x419e0c, 1, 0x04, 0x00000000 }, 758 { 0x419e0c, 1, 0x04, 0x00000000 },
@@ -769,7 +781,11 @@ nvf0_grctx_init_tpc_0[] = {
769 781
770static const struct nvc0_graph_pack 782static const struct nvc0_graph_pack
771nvf0_grctx_pack_tpc[] = { 783nvf0_grctx_pack_tpc[] = {
772 { nvf0_grctx_init_tpc_0 }, 784 { nvd7_grctx_init_pe_0 },
785 { nvf0_grctx_init_tex_0 },
786 { nvf0_grctx_init_mpc_0 },
787 { nvf0_grctx_init_l1c_0 },
788 { nvf0_grctx_init_sm_0 },
773 {} 789 {}
774}; 790};
775 791
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nv108.c b/drivers/gpu/drm/nouveau/core/engine/graph/nv108.c
index 045f098eb792..19c3bd643ae9 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/nv108.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/nv108.c
@@ -86,19 +86,18 @@ nv108_graph_init_setup_1[] = {
86}; 86};
87 87
88static const struct nvc0_graph_init 88static const struct nvc0_graph_init
89nv108_graph_init_tpc_0[] = { 89nv108_graph_init_tex_0[] = {
90 { 0x419d0c, 1, 0x04, 0x00000000 },
91 { 0x419d10, 1, 0x04, 0x00000014 },
92 { 0x419ab0, 1, 0x04, 0x00000000 }, 90 { 0x419ab0, 1, 0x04, 0x00000000 },
93 { 0x419ac8, 1, 0x04, 0x00000000 }, 91 { 0x419ac8, 1, 0x04, 0x00000000 },
94 { 0x419ab8, 1, 0x04, 0x000000e7 }, 92 { 0x419ab8, 1, 0x04, 0x000000e7 },
95 { 0x419abc, 2, 0x04, 0x00000000 }, 93 { 0x419abc, 2, 0x04, 0x00000000 },
96 { 0x419ab4, 1, 0x04, 0x00000000 }, 94 { 0x419ab4, 1, 0x04, 0x00000000 },
97 { 0x419aa8, 2, 0x04, 0x00000000 }, 95 { 0x419aa8, 2, 0x04, 0x00000000 },
98 { 0x41980c, 1, 0x04, 0x00000010 }, 96 {}
99 { 0x419844, 1, 0x04, 0x00000000 }, 97};
100 { 0x419850, 1, 0x04, 0x00000004 }, 98
101 { 0x419854, 2, 0x04, 0x00000000 }, 99static const struct nvc0_graph_init
100nv108_graph_init_l1c_0[] = {
102 { 0x419c98, 1, 0x04, 0x00000000 }, 101 { 0x419c98, 1, 0x04, 0x00000000 },
103 { 0x419ca8, 1, 0x04, 0x00000000 }, 102 { 0x419ca8, 1, 0x04, 0x00000000 },
104 { 0x419cb0, 1, 0x04, 0x01000000 }, 103 { 0x419cb0, 1, 0x04, 0x01000000 },
@@ -109,19 +108,6 @@ nv108_graph_init_tpc_0[] = {
109 { 0x419cc0, 2, 0x04, 0x00000000 }, 108 { 0x419cc0, 2, 0x04, 0x00000000 },
110 { 0x419c80, 1, 0x04, 0x00000230 }, 109 { 0x419c80, 1, 0x04, 0x00000230 },
111 { 0x419ccc, 2, 0x04, 0x00000000 }, 110 { 0x419ccc, 2, 0x04, 0x00000000 },
112 { 0x419c0c, 1, 0x04, 0x00000000 },
113 { 0x419e00, 1, 0x04, 0x00000080 },
114 { 0x419ea0, 1, 0x04, 0x00000000 },
115 { 0x419ee4, 1, 0x04, 0x00000000 },
116 { 0x419ea4, 1, 0x04, 0x00000100 },
117 { 0x419ea8, 1, 0x04, 0x00000000 },
118 { 0x419eb4, 1, 0x04, 0x00000000 },
119 { 0x419ebc, 2, 0x04, 0x00000000 },
120 { 0x419edc, 1, 0x04, 0x00000000 },
121 { 0x419f00, 1, 0x04, 0x00000000 },
122 { 0x419ed0, 1, 0x04, 0x00003234 },
123 { 0x419f74, 1, 0x04, 0x00015555 },
124 { 0x419f80, 4, 0x04, 0x00000000 },
125 {} 111 {}
126}; 112};
127 113
@@ -145,7 +131,12 @@ nv108_graph_pack_mmio[] = {
145 { nvd9_graph_init_gpm_0 }, 131 { nvd9_graph_init_gpm_0 },
146 { nvf0_graph_init_gpc_unk_1 }, 132 { nvf0_graph_init_gpc_unk_1 },
147 { nvc0_graph_init_gcc_0 }, 133 { nvc0_graph_init_gcc_0 },
148 { nv108_graph_init_tpc_0 }, 134 { nve4_graph_init_tpccs_0 },
135 { nv108_graph_init_tex_0 },
136 { nve4_graph_init_pe_0 },
137 { nv108_graph_init_l1c_0 },
138 { nvc0_graph_init_mpc_0 },
139 { nvf0_graph_init_sm_0 },
149 { nvd7_graph_init_ppc_0 }, 140 { nvd7_graph_init_ppc_0 },
150 { nve4_graph_init_be_0 }, 141 { nve4_graph_init_be_0 },
151 { nvc0_graph_init_fe_1 }, 142 { nvc0_graph_init_fe_1 },
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c
index fa53ddb6038c..f3c7329da0a0 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c
@@ -274,27 +274,62 @@ nvc0_graph_init_gcc_0[] = {
274 {} 274 {}
275}; 275};
276 276
277static const struct nvc0_graph_init 277const struct nvc0_graph_init
278nvc0_graph_init_tpc_0[] = { 278nvc0_graph_init_tpccs_0[] = {
279 { 0x419d08, 2, 0x04, 0x00000000 }, 279 { 0x419d08, 2, 0x04, 0x00000000 },
280 { 0x419d10, 1, 0x04, 0x00000014 }, 280 { 0x419d10, 1, 0x04, 0x00000014 },
281 {}
282};
283
284const struct nvc0_graph_init
285nvc0_graph_init_tex_0[] = {
281 { 0x419ab0, 1, 0x04, 0x00000000 }, 286 { 0x419ab0, 1, 0x04, 0x00000000 },
282 { 0x419ab8, 1, 0x04, 0x000000e7 }, 287 { 0x419ab8, 1, 0x04, 0x000000e7 },
283 { 0x419abc, 2, 0x04, 0x00000000 }, 288 { 0x419abc, 2, 0x04, 0x00000000 },
289 {}
290};
291
292const struct nvc0_graph_init
293nvc0_graph_init_pe_0[] = {
284 { 0x41980c, 3, 0x04, 0x00000000 }, 294 { 0x41980c, 3, 0x04, 0x00000000 },
285 { 0x419844, 1, 0x04, 0x00000000 }, 295 { 0x419844, 1, 0x04, 0x00000000 },
286 { 0x41984c, 1, 0x04, 0x00005bc5 }, 296 { 0x41984c, 1, 0x04, 0x00005bc5 },
287 { 0x419850, 4, 0x04, 0x00000000 }, 297 { 0x419850, 4, 0x04, 0x00000000 },
298 {}
299};
300
301const struct nvc0_graph_init
302nvc0_graph_init_l1c_0[] = {
288 { 0x419c98, 1, 0x04, 0x00000000 }, 303 { 0x419c98, 1, 0x04, 0x00000000 },
289 { 0x419ca8, 1, 0x04, 0x80000000 }, 304 { 0x419ca8, 1, 0x04, 0x80000000 },
290 { 0x419cb4, 1, 0x04, 0x00000000 }, 305 { 0x419cb4, 1, 0x04, 0x00000000 },
291 { 0x419cb8, 1, 0x04, 0x00008bf4 }, 306 { 0x419cb8, 1, 0x04, 0x00008bf4 },
292 { 0x419cbc, 1, 0x04, 0x28137606 }, 307 { 0x419cbc, 1, 0x04, 0x28137606 },
293 { 0x419cc0, 2, 0x04, 0x00000000 }, 308 { 0x419cc0, 2, 0x04, 0x00000000 },
309 {}
310};
311
312const struct nvc0_graph_init
313nvc0_graph_init_wwdx_0[] = {
294 { 0x419bd4, 1, 0x04, 0x00800000 }, 314 { 0x419bd4, 1, 0x04, 0x00800000 },
295 { 0x419bdc, 1, 0x04, 0x00000000 }, 315 { 0x419bdc, 1, 0x04, 0x00000000 },
316 {}
317};
318
319const struct nvc0_graph_init
320nvc0_graph_init_tpccs_1[] = {
296 { 0x419d2c, 1, 0x04, 0x00000000 }, 321 { 0x419d2c, 1, 0x04, 0x00000000 },
322 {}
323};
324
325const struct nvc0_graph_init
326nvc0_graph_init_mpc_0[] = {
297 { 0x419c0c, 1, 0x04, 0x00000000 }, 327 { 0x419c0c, 1, 0x04, 0x00000000 },
328 {}
329};
330
331static const struct nvc0_graph_init
332nvc0_graph_init_sm_0[] = {
298 { 0x419e00, 1, 0x04, 0x00000000 }, 333 { 0x419e00, 1, 0x04, 0x00000000 },
299 { 0x419ea0, 1, 0x04, 0x00000000 }, 334 { 0x419ea0, 1, 0x04, 0x00000000 },
300 { 0x419ea4, 1, 0x04, 0x00000100 }, 335 { 0x419ea4, 1, 0x04, 0x00000100 },
@@ -330,7 +365,7 @@ nvc0_graph_init_fe_1[] = {
330}; 365};
331 366
332const struct nvc0_graph_init 367const struct nvc0_graph_init
333nvc0_graph_init_tpc_1[] = { 368nvc0_graph_init_pe_1[] = {
334 { 0x419880, 1, 0x04, 0x00000002 }, 369 { 0x419880, 1, 0x04, 0x00000002 },
335 {} 370 {}
336}; 371};
@@ -353,10 +388,17 @@ nvc0_graph_pack_mmio[] = {
353 { nvc0_graph_init_gpm_0 }, 388 { nvc0_graph_init_gpm_0 },
354 { nvc0_graph_init_gpc_unk_1 }, 389 { nvc0_graph_init_gpc_unk_1 },
355 { nvc0_graph_init_gcc_0 }, 390 { nvc0_graph_init_gcc_0 },
356 { nvc0_graph_init_tpc_0 }, 391 { nvc0_graph_init_tpccs_0 },
392 { nvc0_graph_init_tex_0 },
393 { nvc0_graph_init_pe_0 },
394 { nvc0_graph_init_l1c_0 },
395 { nvc0_graph_init_wwdx_0 },
396 { nvc0_graph_init_tpccs_1 },
397 { nvc0_graph_init_mpc_0 },
398 { nvc0_graph_init_sm_0 },
357 { nvc0_graph_init_be_0 }, 399 { nvc0_graph_init_be_0 },
358 { nvc0_graph_init_fe_1 }, 400 { nvc0_graph_init_fe_1 },
359 { nvc0_graph_init_tpc_1 }, 401 { nvc0_graph_init_pe_1 },
360 {} 402 {}
361}; 403};
362 404
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h
index 8c05751e4917..b158094ba711 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h
@@ -181,11 +181,20 @@ extern const struct nvc0_graph_init nvc0_graph_init_zcull_0[];
181extern const struct nvc0_graph_init nvc0_graph_init_gpm_0[]; 181extern const struct nvc0_graph_init nvc0_graph_init_gpm_0[];
182extern const struct nvc0_graph_init nvc0_graph_init_gpc_unk_1[]; 182extern const struct nvc0_graph_init nvc0_graph_init_gpc_unk_1[];
183extern const struct nvc0_graph_init nvc0_graph_init_gcc_0[]; 183extern const struct nvc0_graph_init nvc0_graph_init_gcc_0[];
184extern const struct nvc0_graph_init nvc0_graph_init_tpccs_0[];
185extern const struct nvc0_graph_init nvc0_graph_init_tex_0[];
186extern const struct nvc0_graph_init nvc0_graph_init_pe_0[];
187extern const struct nvc0_graph_init nvc0_graph_init_l1c_0[];
188extern const struct nvc0_graph_init nvc0_graph_init_wwdx_0[];
189extern const struct nvc0_graph_init nvc0_graph_init_tpccs_1[];
190extern const struct nvc0_graph_init nvc0_graph_init_mpc_0[];
184extern const struct nvc0_graph_init nvc0_graph_init_be_0[]; 191extern const struct nvc0_graph_init nvc0_graph_init_be_0[];
185extern const struct nvc0_graph_init nvc0_graph_init_fe_1[]; 192extern const struct nvc0_graph_init nvc0_graph_init_fe_1[];
186extern const struct nvc0_graph_init nvc0_graph_init_tpc_1[]; 193extern const struct nvc0_graph_init nvc0_graph_init_pe_1[];
187 194
188extern const struct nvc0_graph_init nvc4_graph_init_ds_0[]; 195extern const struct nvc0_graph_init nvc4_graph_init_ds_0[];
196extern const struct nvc0_graph_init nvc4_graph_init_tex_0[];
197extern const struct nvc0_graph_init nvc4_graph_init_sm_0[];
189 198
190extern const struct nvc0_graph_init nvc1_graph_init_gpc_unk_0[]; 199extern const struct nvc0_graph_init nvc1_graph_init_gpc_unk_0[];
191extern const struct nvc0_graph_init nvc1_graph_init_setup_1[]; 200extern const struct nvc0_graph_init nvc1_graph_init_setup_1[];
@@ -195,17 +204,22 @@ extern const struct nvc0_graph_init nvd9_graph_init_ds_0[];
195extern const struct nvc0_graph_init nvd9_graph_init_prop_0[]; 204extern const struct nvc0_graph_init nvd9_graph_init_prop_0[];
196extern const struct nvc0_graph_init nvd9_graph_init_gpm_0[]; 205extern const struct nvc0_graph_init nvd9_graph_init_gpm_0[];
197extern const struct nvc0_graph_init nvd9_graph_init_gpc_unk_1[]; 206extern const struct nvc0_graph_init nvd9_graph_init_gpc_unk_1[];
207extern const struct nvc0_graph_init nvd9_graph_init_tex_0[];
208extern const struct nvc0_graph_init nvd9_graph_init_sm_0[];
198extern const struct nvc0_graph_init nvd9_graph_init_fe_1[]; 209extern const struct nvc0_graph_init nvd9_graph_init_fe_1[];
199 210
200extern const struct nvc0_graph_init nvd7_graph_init_ppc_0[]; 211extern const struct nvc0_graph_init nvd7_graph_init_ppc_0[];
201 212
202extern const struct nvc0_graph_init nve4_graph_init_main_0[]; 213extern const struct nvc0_graph_init nve4_graph_init_main_0[];
214extern const struct nvc0_graph_init nve4_graph_init_tpccs_0[];
215extern const struct nvc0_graph_init nve4_graph_init_pe_0[];
203extern const struct nvc0_graph_init nve4_graph_init_be_0[]; 216extern const struct nvc0_graph_init nve4_graph_init_be_0[];
204 217
205extern const struct nvc0_graph_init nvf0_graph_init_fe_0[]; 218extern const struct nvc0_graph_init nvf0_graph_init_fe_0[];
206extern const struct nvc0_graph_init nvf0_graph_init_sked_0[]; 219extern const struct nvc0_graph_init nvf0_graph_init_sked_0[];
207extern const struct nvc0_graph_init nvf0_graph_init_cwd_0[]; 220extern const struct nvc0_graph_init nvf0_graph_init_cwd_0[];
208extern const struct nvc0_graph_init nvf0_graph_init_gpc_unk_1[]; 221extern const struct nvc0_graph_init nvf0_graph_init_gpc_unk_1[];
222extern const struct nvc0_graph_init nvf0_graph_init_sm_0[];
209 223
210 224
211#endif 225#endif
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nvc1.c b/drivers/gpu/drm/nouveau/core/engine/graph/nvc1.c
index d7cc000425c0..30cab0b2eba1 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/nvc1.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvc1.c
@@ -70,13 +70,7 @@ nvc1_graph_init_gpc_unk_1[] = {
70}; 70};
71 71
72static const struct nvc0_graph_init 72static const struct nvc0_graph_init
73nvc1_graph_init_tpc_0[] = { 73nvc1_graph_init_pe_0[] = {
74 { 0x419d08, 2, 0x04, 0x00000000 },
75 { 0x419d10, 1, 0x04, 0x00000014 },
76 { 0x419ab0, 1, 0x04, 0x00000000 },
77 { 0x419ac8, 1, 0x04, 0x00000000 },
78 { 0x419ab8, 1, 0x04, 0x000000e7 },
79 { 0x419abc, 2, 0x04, 0x00000000 },
80 { 0x41980c, 1, 0x04, 0x00000010 }, 74 { 0x41980c, 1, 0x04, 0x00000010 },
81 { 0x419810, 1, 0x04, 0x00000000 }, 75 { 0x419810, 1, 0x04, 0x00000000 },
82 { 0x419814, 1, 0x04, 0x00000004 }, 76 { 0x419814, 1, 0x04, 0x00000004 },
@@ -84,30 +78,6 @@ nvc1_graph_init_tpc_0[] = {
84 { 0x41984c, 1, 0x04, 0x00005bc5 }, 78 { 0x41984c, 1, 0x04, 0x00005bc5 },
85 { 0x419850, 4, 0x04, 0x00000000 }, 79 { 0x419850, 4, 0x04, 0x00000000 },
86 { 0x419880, 1, 0x04, 0x00000002 }, 80 { 0x419880, 1, 0x04, 0x00000002 },
87 { 0x419c98, 1, 0x04, 0x00000000 },
88 { 0x419ca8, 1, 0x04, 0x80000000 },
89 { 0x419cb4, 1, 0x04, 0x00000000 },
90 { 0x419cb8, 1, 0x04, 0x00008bf4 },
91 { 0x419cbc, 1, 0x04, 0x28137606 },
92 { 0x419cc0, 2, 0x04, 0x00000000 },
93 { 0x419bd4, 1, 0x04, 0x00800000 },
94 { 0x419bdc, 1, 0x04, 0x00000000 },
95 { 0x419d2c, 1, 0x04, 0x00000000 },
96 { 0x419c0c, 1, 0x04, 0x00000000 },
97 { 0x419e00, 1, 0x04, 0x00000000 },
98 { 0x419ea0, 1, 0x04, 0x00000000 },
99 { 0x419ea4, 1, 0x04, 0x00000100 },
100 { 0x419ea8, 1, 0x04, 0x00001100 },
101 { 0x419eac, 1, 0x04, 0x11100702 },
102 { 0x419eb0, 1, 0x04, 0x00000003 },
103 { 0x419eb4, 4, 0x04, 0x00000000 },
104 { 0x419ec8, 1, 0x04, 0x0e063818 },
105 { 0x419ecc, 1, 0x04, 0x0e060e06 },
106 { 0x419ed0, 1, 0x04, 0x00003818 },
107 { 0x419ed4, 1, 0x04, 0x011104f1 },
108 { 0x419edc, 1, 0x04, 0x00000000 },
109 { 0x419f00, 1, 0x04, 0x00000000 },
110 { 0x419f2c, 1, 0x04, 0x00000000 },
111 {} 81 {}
112}; 82};
113 83
@@ -129,7 +99,14 @@ nvc1_graph_pack_mmio[] = {
129 { nvc0_graph_init_gpm_0 }, 99 { nvc0_graph_init_gpm_0 },
130 { nvc1_graph_init_gpc_unk_1 }, 100 { nvc1_graph_init_gpc_unk_1 },
131 { nvc0_graph_init_gcc_0 }, 101 { nvc0_graph_init_gcc_0 },
132 { nvc1_graph_init_tpc_0 }, 102 { nvc0_graph_init_tpccs_0 },
103 { nvc4_graph_init_tex_0 },
104 { nvc1_graph_init_pe_0 },
105 { nvc0_graph_init_l1c_0 },
106 { nvc0_graph_init_wwdx_0 },
107 { nvc0_graph_init_tpccs_1 },
108 { nvc0_graph_init_mpc_0 },
109 { nvc4_graph_init_sm_0 },
133 { nvc0_graph_init_be_0 }, 110 { nvc0_graph_init_be_0 },
134 { nvc0_graph_init_fe_1 }, 111 { nvc0_graph_init_fe_1 },
135 {} 112 {}
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nvc4.c b/drivers/gpu/drm/nouveau/core/engine/graph/nvc4.c
index aef895c17595..e82e70c53132 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/nvc4.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvc4.c
@@ -38,29 +38,27 @@ nvc4_graph_init_ds_0[] = {
38 {} 38 {}
39}; 39};
40 40
41static const struct nvc0_graph_init 41const struct nvc0_graph_init
42nvc4_graph_init_tpc_0[] = { 42nvc4_graph_init_tex_0[] = {
43 { 0x419d08, 2, 0x04, 0x00000000 },
44 { 0x419d10, 1, 0x04, 0x00000014 },
45 { 0x419ab0, 1, 0x04, 0x00000000 }, 43 { 0x419ab0, 1, 0x04, 0x00000000 },
46 { 0x419ac8, 1, 0x04, 0x00000000 }, 44 { 0x419ac8, 1, 0x04, 0x00000000 },
47 { 0x419ab8, 1, 0x04, 0x000000e7 }, 45 { 0x419ab8, 1, 0x04, 0x000000e7 },
48 { 0x419abc, 2, 0x04, 0x00000000 }, 46 { 0x419abc, 2, 0x04, 0x00000000 },
47 {}
48};
49
50static const struct nvc0_graph_init
51nvc4_graph_init_pe_0[] = {
49 { 0x41980c, 3, 0x04, 0x00000000 }, 52 { 0x41980c, 3, 0x04, 0x00000000 },
50 { 0x419844, 1, 0x04, 0x00000000 }, 53 { 0x419844, 1, 0x04, 0x00000000 },
51 { 0x41984c, 1, 0x04, 0x00005bc5 }, 54 { 0x41984c, 1, 0x04, 0x00005bc5 },
52 { 0x419850, 4, 0x04, 0x00000000 }, 55 { 0x419850, 4, 0x04, 0x00000000 },
53 { 0x419880, 1, 0x04, 0x00000002 }, 56 { 0x419880, 1, 0x04, 0x00000002 },
54 { 0x419c98, 1, 0x04, 0x00000000 }, 57 {}
55 { 0x419ca8, 1, 0x04, 0x80000000 }, 58};
56 { 0x419cb4, 1, 0x04, 0x00000000 }, 59
57 { 0x419cb8, 1, 0x04, 0x00008bf4 }, 60const struct nvc0_graph_init
58 { 0x419cbc, 1, 0x04, 0x28137606 }, 61nvc4_graph_init_sm_0[] = {
59 { 0x419cc0, 2, 0x04, 0x00000000 },
60 { 0x419bd4, 1, 0x04, 0x00800000 },
61 { 0x419bdc, 1, 0x04, 0x00000000 },
62 { 0x419d2c, 1, 0x04, 0x00000000 },
63 { 0x419c0c, 1, 0x04, 0x00000000 },
64 { 0x419e00, 1, 0x04, 0x00000000 }, 62 { 0x419e00, 1, 0x04, 0x00000000 },
65 { 0x419ea0, 1, 0x04, 0x00000000 }, 63 { 0x419ea0, 1, 0x04, 0x00000000 },
66 { 0x419ea4, 1, 0x04, 0x00000100 }, 64 { 0x419ea4, 1, 0x04, 0x00000100 },
@@ -96,7 +94,14 @@ nvc4_graph_pack_mmio[] = {
96 { nvc0_graph_init_gpm_0 }, 94 { nvc0_graph_init_gpm_0 },
97 { nvc0_graph_init_gpc_unk_1 }, 95 { nvc0_graph_init_gpc_unk_1 },
98 { nvc0_graph_init_gcc_0 }, 96 { nvc0_graph_init_gcc_0 },
99 { nvc4_graph_init_tpc_0 }, 97 { nvc0_graph_init_tpccs_0 },
98 { nvc4_graph_init_tex_0 },
99 { nvc4_graph_init_pe_0 },
100 { nvc0_graph_init_l1c_0 },
101 { nvc0_graph_init_wwdx_0 },
102 { nvc0_graph_init_tpccs_1 },
103 { nvc0_graph_init_mpc_0 },
104 { nvc4_graph_init_sm_0 },
100 { nvc0_graph_init_be_0 }, 105 { nvc0_graph_init_be_0 },
101 { nvc0_graph_init_fe_1 }, 106 { nvc0_graph_init_fe_1 },
102 {} 107 {}
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nvc8.c b/drivers/gpu/drm/nouveau/core/engine/graph/nvc8.c
index 272e51398f6a..a6bf783e1256 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/nvc8.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvc8.c
@@ -45,26 +45,7 @@ nvc8_graph_sclass[] = {
45 ******************************************************************************/ 45 ******************************************************************************/
46 46
47static const struct nvc0_graph_init 47static const struct nvc0_graph_init
48nvc8_graph_init_tpc_0[] = { 48nvc8_graph_init_sm_0[] = {
49 { 0x419d08, 2, 0x04, 0x00000000 },
50 { 0x419d10, 1, 0x04, 0x00000014 },
51 { 0x419ab0, 1, 0x04, 0x00000000 },
52 { 0x419ab8, 1, 0x04, 0x000000e7 },
53 { 0x419abc, 2, 0x04, 0x00000000 },
54 { 0x41980c, 3, 0x04, 0x00000000 },
55 { 0x419844, 1, 0x04, 0x00000000 },
56 { 0x41984c, 1, 0x04, 0x00005bc5 },
57 { 0x419850, 4, 0x04, 0x00000000 },
58 { 0x419c98, 1, 0x04, 0x00000000 },
59 { 0x419ca8, 1, 0x04, 0x80000000 },
60 { 0x419cb4, 1, 0x04, 0x00000000 },
61 { 0x419cb8, 1, 0x04, 0x00008bf4 },
62 { 0x419cbc, 1, 0x04, 0x28137606 },
63 { 0x419cc0, 2, 0x04, 0x00000000 },
64 { 0x419bd4, 1, 0x04, 0x00800000 },
65 { 0x419bdc, 1, 0x04, 0x00000000 },
66 { 0x419d2c, 1, 0x04, 0x00000000 },
67 { 0x419c0c, 1, 0x04, 0x00000000 },
68 { 0x419e00, 1, 0x04, 0x00000000 }, 49 { 0x419e00, 1, 0x04, 0x00000000 },
69 { 0x419ea0, 1, 0x04, 0x00000000 }, 50 { 0x419ea0, 1, 0x04, 0x00000000 },
70 { 0x419ea4, 1, 0x04, 0x00000100 }, 51 { 0x419ea4, 1, 0x04, 0x00000100 },
@@ -99,10 +80,17 @@ nvc8_graph_pack_mmio[] = {
99 { nvc0_graph_init_gpm_0 }, 80 { nvc0_graph_init_gpm_0 },
100 { nvc0_graph_init_gpc_unk_1 }, 81 { nvc0_graph_init_gpc_unk_1 },
101 { nvc0_graph_init_gcc_0 }, 82 { nvc0_graph_init_gcc_0 },
102 { nvc8_graph_init_tpc_0 }, 83 { nvc0_graph_init_tpccs_0 },
84 { nvc0_graph_init_tex_0 },
85 { nvc0_graph_init_pe_0 },
86 { nvc0_graph_init_l1c_0 },
87 { nvc0_graph_init_wwdx_0 },
88 { nvc0_graph_init_tpccs_1 },
89 { nvc0_graph_init_mpc_0 },
90 { nvc8_graph_init_sm_0 },
103 { nvc0_graph_init_be_0 }, 91 { nvc0_graph_init_be_0 },
104 { nvc0_graph_init_fe_1 }, 92 { nvc0_graph_init_fe_1 },
105 { nvc0_graph_init_tpc_1 }, 93 { nvc0_graph_init_pe_1 },
106 {} 94 {}
107}; 95};
108 96
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nvd7.c b/drivers/gpu/drm/nouveau/core/engine/graph/nvd7.c
index 60b33e9f8a3d..2fd812cc1c80 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/nvd7.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvd7.c
@@ -30,39 +30,11 @@
30 ******************************************************************************/ 30 ******************************************************************************/
31 31
32static const struct nvc0_graph_init 32static const struct nvc0_graph_init
33nvd7_graph_init_tpc_0[] = { 33nvd7_graph_init_pe_0[] = {
34 { 0x419d08, 2, 0x04, 0x00000000 },
35 { 0x419d10, 1, 0x04, 0x00000014 },
36 { 0x419ab0, 1, 0x04, 0x00000000 },
37 { 0x419ac8, 1, 0x04, 0x00000000 },
38 { 0x419ab8, 1, 0x04, 0x000000e7 },
39 { 0x419abc, 2, 0x04, 0x00000000 },
40 { 0x419ab4, 1, 0x04, 0x00000000 },
41 { 0x41980c, 1, 0x04, 0x00000010 }, 34 { 0x41980c, 1, 0x04, 0x00000010 },
42 { 0x419844, 1, 0x04, 0x00000000 }, 35 { 0x419844, 1, 0x04, 0x00000000 },
43 { 0x41984c, 1, 0x04, 0x00005bc8 }, 36 { 0x41984c, 1, 0x04, 0x00005bc8 },
44 { 0x419850, 3, 0x04, 0x00000000 }, 37 { 0x419850, 3, 0x04, 0x00000000 },
45 { 0x419c98, 1, 0x04, 0x00000000 },
46 { 0x419ca8, 1, 0x04, 0x80000000 },
47 { 0x419cb4, 1, 0x04, 0x00000000 },
48 { 0x419cb8, 1, 0x04, 0x00008bf4 },
49 { 0x419cbc, 1, 0x04, 0x28137606 },
50 { 0x419cc0, 2, 0x04, 0x00000000 },
51 { 0x419c0c, 1, 0x04, 0x00000000 },
52 { 0x419e00, 1, 0x04, 0x00000000 },
53 { 0x419ea0, 1, 0x04, 0x00000000 },
54 { 0x419ea4, 1, 0x04, 0x00000100 },
55 { 0x419ea8, 1, 0x04, 0x02001100 },
56 { 0x419eac, 1, 0x04, 0x11100702 },
57 { 0x419eb0, 1, 0x04, 0x00000003 },
58 { 0x419eb4, 4, 0x04, 0x00000000 },
59 { 0x419ec8, 1, 0x04, 0x0e063818 },
60 { 0x419ecc, 1, 0x04, 0x0e060e06 },
61 { 0x419ed0, 1, 0x04, 0x00003818 },
62 { 0x419ed4, 1, 0x04, 0x011104f1 },
63 { 0x419edc, 1, 0x04, 0x00000000 },
64 { 0x419f00, 1, 0x04, 0x00000000 },
65 { 0x419f2c, 1, 0x04, 0x00000000 },
66 {} 38 {}
67}; 39};
68 40
@@ -99,7 +71,12 @@ nvd7_graph_pack_mmio[] = {
99 { nvd9_graph_init_gpm_0 }, 71 { nvd9_graph_init_gpm_0 },
100 { nvd9_graph_init_gpc_unk_1 }, 72 { nvd9_graph_init_gpc_unk_1 },
101 { nvc0_graph_init_gcc_0 }, 73 { nvc0_graph_init_gcc_0 },
102 { nvd7_graph_init_tpc_0 }, 74 { nvc0_graph_init_tpccs_0 },
75 { nvd9_graph_init_tex_0 },
76 { nvd7_graph_init_pe_0 },
77 { nvc0_graph_init_l1c_0 },
78 { nvc0_graph_init_mpc_0 },
79 { nvd9_graph_init_sm_0 },
103 { nvd7_graph_init_ppc_0 }, 80 { nvd7_graph_init_ppc_0 },
104 { nvc0_graph_init_be_0 }, 81 { nvc0_graph_init_be_0 },
105 { nvd9_graph_init_fe_1 }, 82 { nvd9_graph_init_fe_1 },
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nvd9.c b/drivers/gpu/drm/nouveau/core/engine/graph/nvd9.c
index fb432e2637de..00fdf202fb92 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/nvd9.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvd9.c
@@ -75,15 +75,18 @@ nvd9_graph_init_gpc_unk_1[] = {
75 {} 75 {}
76}; 76};
77 77
78static const struct nvc0_graph_init 78const struct nvc0_graph_init
79nvd9_graph_init_tpc_0[] = { 79nvd9_graph_init_tex_0[] = {
80 { 0x419d08, 2, 0x04, 0x00000000 },
81 { 0x419d10, 1, 0x04, 0x00000014 },
82 { 0x419ab0, 1, 0x04, 0x00000000 }, 80 { 0x419ab0, 1, 0x04, 0x00000000 },
83 { 0x419ac8, 1, 0x04, 0x00000000 }, 81 { 0x419ac8, 1, 0x04, 0x00000000 },
84 { 0x419ab8, 1, 0x04, 0x000000e7 }, 82 { 0x419ab8, 1, 0x04, 0x000000e7 },
85 { 0x419abc, 2, 0x04, 0x00000000 }, 83 { 0x419abc, 2, 0x04, 0x00000000 },
86 { 0x419ab4, 1, 0x04, 0x00000000 }, 84 { 0x419ab4, 1, 0x04, 0x00000000 },
85 {}
86};
87
88static const struct nvc0_graph_init
89nvd9_graph_init_pe_0[] = {
87 { 0x41980c, 1, 0x04, 0x00000010 }, 90 { 0x41980c, 1, 0x04, 0x00000010 },
88 { 0x419810, 1, 0x04, 0x00000000 }, 91 { 0x419810, 1, 0x04, 0x00000000 },
89 { 0x419814, 1, 0x04, 0x00000004 }, 92 { 0x419814, 1, 0x04, 0x00000004 },
@@ -91,18 +94,26 @@ nvd9_graph_init_tpc_0[] = {
91 { 0x41984c, 1, 0x04, 0x0000a918 }, 94 { 0x41984c, 1, 0x04, 0x0000a918 },
92 { 0x419850, 4, 0x04, 0x00000000 }, 95 { 0x419850, 4, 0x04, 0x00000000 },
93 { 0x419880, 1, 0x04, 0x00000002 }, 96 { 0x419880, 1, 0x04, 0x00000002 },
94 { 0x419c98, 1, 0x04, 0x00000000 }, 97 {}
95 { 0x419ca8, 1, 0x04, 0x80000000 }, 98};
96 { 0x419cb4, 1, 0x04, 0x00000000 }, 99
97 { 0x419cb8, 1, 0x04, 0x00008bf4 }, 100static const struct nvc0_graph_init
98 { 0x419cbc, 1, 0x04, 0x28137606 }, 101nvd9_graph_init_wwdx_0[] = {
99 { 0x419cc0, 2, 0x04, 0x00000000 },
100 { 0x419bd4, 1, 0x04, 0x00800000 }, 102 { 0x419bd4, 1, 0x04, 0x00800000 },
101 { 0x419bdc, 1, 0x04, 0x00000000 }, 103 { 0x419bdc, 1, 0x04, 0x00000000 },
102 { 0x419bf8, 2, 0x04, 0x00000000 }, 104 { 0x419bf8, 2, 0x04, 0x00000000 },
105 {}
106};
107
108static const struct nvc0_graph_init
109nvd9_graph_init_tpccs_1[] = {
103 { 0x419d2c, 1, 0x04, 0x00000000 }, 110 { 0x419d2c, 1, 0x04, 0x00000000 },
104 { 0x419d48, 2, 0x04, 0x00000000 }, 111 { 0x419d48, 2, 0x04, 0x00000000 },
105 { 0x419c0c, 1, 0x04, 0x00000000 }, 112 {}
113};
114
115const struct nvc0_graph_init
116nvd9_graph_init_sm_0[] = {
106 { 0x419e00, 1, 0x04, 0x00000000 }, 117 { 0x419e00, 1, 0x04, 0x00000000 },
107 { 0x419ea0, 1, 0x04, 0x00000000 }, 118 { 0x419ea0, 1, 0x04, 0x00000000 },
108 { 0x419ea4, 1, 0x04, 0x00000100 }, 119 { 0x419ea4, 1, 0x04, 0x00000100 },
@@ -146,7 +157,14 @@ nvd9_graph_pack_mmio[] = {
146 { nvd9_graph_init_gpm_0 }, 157 { nvd9_graph_init_gpm_0 },
147 { nvd9_graph_init_gpc_unk_1 }, 158 { nvd9_graph_init_gpc_unk_1 },
148 { nvc0_graph_init_gcc_0 }, 159 { nvc0_graph_init_gcc_0 },
149 { nvd9_graph_init_tpc_0 }, 160 { nvc0_graph_init_tpccs_0 },
161 { nvd9_graph_init_tex_0 },
162 { nvd9_graph_init_pe_0 },
163 { nvc0_graph_init_l1c_0 },
164 { nvd9_graph_init_wwdx_0 },
165 { nvd9_graph_init_tpccs_1 },
166 { nvc0_graph_init_mpc_0 },
167 { nvd9_graph_init_sm_0 },
150 { nvc0_graph_init_be_0 }, 168 { nvc0_graph_init_be_0 },
151 { nvd9_graph_init_fe_1 }, 169 { nvd9_graph_init_fe_1 },
152 {} 170 {}
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nve4.c b/drivers/gpu/drm/nouveau/core/engine/graph/nve4.c
index 85eb0eee6e4c..c395a5a8a73d 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/nve4.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/nve4.c
@@ -93,19 +93,24 @@ nve4_graph_init_gpc_unk_1[] = {
93 {} 93 {}
94}; 94};
95 95
96static const struct nvc0_graph_init 96const struct nvc0_graph_init
97nve4_graph_init_tpc_0[] = { 97nve4_graph_init_tpccs_0[] = {
98 { 0x419d0c, 1, 0x04, 0x00000000 }, 98 { 0x419d0c, 1, 0x04, 0x00000000 },
99 { 0x419d10, 1, 0x04, 0x00000014 }, 99 { 0x419d10, 1, 0x04, 0x00000014 },
100 { 0x419ab0, 1, 0x04, 0x00000000 }, 100 {}
101 { 0x419ac8, 1, 0x04, 0x00000000 }, 101};
102 { 0x419ab8, 1, 0x04, 0x000000e7 }, 102
103 { 0x419abc, 2, 0x04, 0x00000000 }, 103const struct nvc0_graph_init
104 { 0x419ab4, 1, 0x04, 0x00000000 }, 104nve4_graph_init_pe_0[] = {
105 { 0x41980c, 1, 0x04, 0x00000010 }, 105 { 0x41980c, 1, 0x04, 0x00000010 },
106 { 0x419844, 1, 0x04, 0x00000000 }, 106 { 0x419844, 1, 0x04, 0x00000000 },
107 { 0x419850, 1, 0x04, 0x00000004 }, 107 { 0x419850, 1, 0x04, 0x00000004 },
108 { 0x419854, 2, 0x04, 0x00000000 }, 108 { 0x419854, 2, 0x04, 0x00000000 },
109 {}
110};
111
112static const struct nvc0_graph_init
113nve4_graph_init_l1c_0[] = {
109 { 0x419c98, 1, 0x04, 0x00000000 }, 114 { 0x419c98, 1, 0x04, 0x00000000 },
110 { 0x419ca8, 1, 0x04, 0x00000000 }, 115 { 0x419ca8, 1, 0x04, 0x00000000 },
111 { 0x419cb0, 1, 0x04, 0x01000000 }, 116 { 0x419cb0, 1, 0x04, 0x01000000 },
@@ -115,7 +120,11 @@ nve4_graph_init_tpc_0[] = {
115 { 0x419cbc, 1, 0x04, 0x28137646 }, 120 { 0x419cbc, 1, 0x04, 0x28137646 },
116 { 0x419cc0, 2, 0x04, 0x00000000 }, 121 { 0x419cc0, 2, 0x04, 0x00000000 },
117 { 0x419c80, 1, 0x04, 0x00020232 }, 122 { 0x419c80, 1, 0x04, 0x00020232 },
118 { 0x419c0c, 1, 0x04, 0x00000000 }, 123 {}
124};
125
126static const struct nvc0_graph_init
127nve4_graph_init_sm_0[] = {
119 { 0x419e00, 1, 0x04, 0x00000000 }, 128 { 0x419e00, 1, 0x04, 0x00000000 },
120 { 0x419ea0, 1, 0x04, 0x00000000 }, 129 { 0x419ea0, 1, 0x04, 0x00000000 },
121 { 0x419ee4, 1, 0x04, 0x00000000 }, 130 { 0x419ee4, 1, 0x04, 0x00000000 },
@@ -162,7 +171,12 @@ nve4_graph_pack_mmio[] = {
162 { nvd9_graph_init_gpm_0 }, 171 { nvd9_graph_init_gpm_0 },
163 { nve4_graph_init_gpc_unk_1 }, 172 { nve4_graph_init_gpc_unk_1 },
164 { nvc0_graph_init_gcc_0 }, 173 { nvc0_graph_init_gcc_0 },
165 { nve4_graph_init_tpc_0 }, 174 { nve4_graph_init_tpccs_0 },
175 { nvd9_graph_init_tex_0 },
176 { nve4_graph_init_pe_0 },
177 { nve4_graph_init_l1c_0 },
178 { nvc0_graph_init_mpc_0 },
179 { nve4_graph_init_sm_0 },
166 { nvd7_graph_init_ppc_0 }, 180 { nvd7_graph_init_ppc_0 },
167 { nve4_graph_init_be_0 }, 181 { nve4_graph_init_be_0 },
168 { nvc0_graph_init_fe_1 }, 182 { nvc0_graph_init_fe_1 },
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nvf0.c b/drivers/gpu/drm/nouveau/core/engine/graph/nvf0.c
index 6402de2ebb12..811a21559c6b 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/nvf0.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvf0.c
@@ -89,9 +89,7 @@ nvf0_graph_init_gpc_unk_1[] = {
89}; 89};
90 90
91static const struct nvc0_graph_init 91static const struct nvc0_graph_init
92nvf0_graph_init_tpc_0[] = { 92nvf0_graph_init_tex_0[] = {
93 { 0x419d0c, 1, 0x04, 0x00000000 },
94 { 0x419d10, 1, 0x04, 0x00000014 },
95 { 0x419ab0, 1, 0x04, 0x00000000 }, 93 { 0x419ab0, 1, 0x04, 0x00000000 },
96 { 0x419ac8, 1, 0x04, 0x00000000 }, 94 { 0x419ac8, 1, 0x04, 0x00000000 },
97 { 0x419ab8, 1, 0x04, 0x000000e7 }, 95 { 0x419ab8, 1, 0x04, 0x000000e7 },
@@ -99,10 +97,11 @@ nvf0_graph_init_tpc_0[] = {
99 { 0x419abc, 2, 0x04, 0x00000000 }, 97 { 0x419abc, 2, 0x04, 0x00000000 },
100 { 0x419ab4, 1, 0x04, 0x00000000 }, 98 { 0x419ab4, 1, 0x04, 0x00000000 },
101 { 0x419aa8, 2, 0x04, 0x00000000 }, 99 { 0x419aa8, 2, 0x04, 0x00000000 },
102 { 0x41980c, 1, 0x04, 0x00000010 }, 100 {}
103 { 0x419844, 1, 0x04, 0x00000000 }, 101};
104 { 0x419850, 1, 0x04, 0x00000004 }, 102
105 { 0x419854, 2, 0x04, 0x00000000 }, 103static const struct nvc0_graph_init
104nvf0_graph_init_l1c_0[] = {
106 { 0x419c98, 1, 0x04, 0x00000000 }, 105 { 0x419c98, 1, 0x04, 0x00000000 },
107 { 0x419ca8, 1, 0x04, 0x00000000 }, 106 { 0x419ca8, 1, 0x04, 0x00000000 },
108 { 0x419cb0, 1, 0x04, 0x01000000 }, 107 { 0x419cb0, 1, 0x04, 0x01000000 },
@@ -113,7 +112,11 @@ nvf0_graph_init_tpc_0[] = {
113 { 0x419cc0, 2, 0x04, 0x00000000 }, 112 { 0x419cc0, 2, 0x04, 0x00000000 },
114 { 0x419c80, 1, 0x04, 0x00020230 }, 113 { 0x419c80, 1, 0x04, 0x00020230 },
115 { 0x419ccc, 2, 0x04, 0x00000000 }, 114 { 0x419ccc, 2, 0x04, 0x00000000 },
116 { 0x419c0c, 1, 0x04, 0x00000000 }, 115 {}
116};
117
118const struct nvc0_graph_init
119nvf0_graph_init_sm_0[] = {
117 { 0x419e00, 1, 0x04, 0x00000080 }, 120 { 0x419e00, 1, 0x04, 0x00000080 },
118 { 0x419ea0, 1, 0x04, 0x00000000 }, 121 { 0x419ea0, 1, 0x04, 0x00000000 },
119 { 0x419ee4, 1, 0x04, 0x00000000 }, 122 { 0x419ee4, 1, 0x04, 0x00000000 },
@@ -149,7 +152,12 @@ nvf0_graph_pack_mmio[] = {
149 { nvd9_graph_init_gpm_0 }, 152 { nvd9_graph_init_gpm_0 },
150 { nvf0_graph_init_gpc_unk_1 }, 153 { nvf0_graph_init_gpc_unk_1 },
151 { nvc0_graph_init_gcc_0 }, 154 { nvc0_graph_init_gcc_0 },
152 { nvf0_graph_init_tpc_0 }, 155 { nve4_graph_init_tpccs_0 },
156 { nvf0_graph_init_tex_0 },
157 { nve4_graph_init_pe_0 },
158 { nvf0_graph_init_l1c_0 },
159 { nvc0_graph_init_mpc_0 },
160 { nvf0_graph_init_sm_0 },
153 { nvd7_graph_init_ppc_0 }, 161 { nvd7_graph_init_ppc_0 },
154 { nve4_graph_init_be_0 }, 162 { nve4_graph_init_be_0 },
155 { nvc0_graph_init_fe_1 }, 163 { nvc0_graph_init_fe_1 },
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-22 01:19:09 -0400