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| author | Thierry Reding <thierry.reding@avionic-design.de> | 2012-04-13 09:08:08 -0400 |
|---|---|---|
| committer | Joerg Roedel <joerg.roedel@amd.com> | 2012-04-16 07:57:16 -0400 |
| commit | 7cffae421e3cd29410ef4d75f2244655fdde3b60 (patch) | |
| tree | 7d618d7d3600bb21de11aa976ec5795188f563a5 | |
| parent | 543f3f33b6165585f755858baaa95530513f5c1e (diff) | |
iommu: tegra/gart: Add device tree support
This commit adds device tree support for the GART hardware available on
NVIDIA Tegra 20 SoCs.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| -rw-r--r-- | Documentation/devicetree/bindings/iommu/nvidia,tegra20-gart.txt | 14 | ||||
| -rw-r--r-- | drivers/iommu/tegra-gart.c | 11 |
2 files changed, 25 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/iommu/nvidia,tegra20-gart.txt b/Documentation/devicetree/bindings/iommu/nvidia,tegra20-gart.txt new file mode 100644 index 000000000000..2d87b9191fce --- /dev/null +++ b/Documentation/devicetree/bindings/iommu/nvidia,tegra20-gart.txt | |||
| @@ -0,0 +1,14 @@ | |||
| 1 | NVIDIA Tegra 20 GART | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: "nvidia,tegra20-gart" | ||
| 5 | - reg: Two pairs of cells specifying the physical address and size of | ||
| 6 | the memory controller registers and the GART aperture respectively. | ||
| 7 | |||
| 8 | Example: | ||
| 9 | |||
| 10 | gart: gart@7000f000 { | ||
| 11 | compatible = "nvidia,tegra20-gart"; | ||
| 12 | reg = < 0x7000f000 0x00000100 /* controller registers */ | ||
| 13 | 0x58000000 0x02000000 >; /* GART aperture */ | ||
| 14 | }; | ||
diff --git a/drivers/iommu/tegra-gart.c b/drivers/iommu/tegra-gart.c index f6bc1e67e1a3..40533bba6254 100644 --- a/drivers/iommu/tegra-gart.c +++ b/drivers/iommu/tegra-gart.c | |||
| @@ -29,6 +29,7 @@ | |||
| 29 | #include <linux/device.h> | 29 | #include <linux/device.h> |
| 30 | #include <linux/io.h> | 30 | #include <linux/io.h> |
| 31 | #include <linux/iommu.h> | 31 | #include <linux/iommu.h> |
| 32 | #include <linux/of.h> | ||
| 32 | 33 | ||
| 33 | #include <asm/cacheflush.h> | 34 | #include <asm/cacheflush.h> |
| 34 | 35 | ||
| @@ -422,6 +423,14 @@ const struct dev_pm_ops tegra_gart_pm_ops = { | |||
| 422 | .resume = tegra_gart_resume, | 423 | .resume = tegra_gart_resume, |
| 423 | }; | 424 | }; |
| 424 | 425 | ||
| 426 | #ifdef CONFIG_OF | ||
| 427 | static struct of_device_id tegra_gart_of_match[] __devinitdata = { | ||
| 428 | { .compatible = "nvidia,tegra20-gart", }, | ||
| 429 | { }, | ||
| 430 | }; | ||
| 431 | MODULE_DEVICE_TABLE(of, tegra_gart_of_match); | ||
| 432 | #endif | ||
| 433 | |||
| 425 | static struct platform_driver tegra_gart_driver = { | 434 | static struct platform_driver tegra_gart_driver = { |
| 426 | .probe = tegra_gart_probe, | 435 | .probe = tegra_gart_probe, |
| 427 | .remove = tegra_gart_remove, | 436 | .remove = tegra_gart_remove, |
| @@ -429,6 +438,7 @@ static struct platform_driver tegra_gart_driver = { | |||
| 429 | .owner = THIS_MODULE, | 438 | .owner = THIS_MODULE, |
| 430 | .name = "tegra-gart", | 439 | .name = "tegra-gart", |
| 431 | .pm = &tegra_gart_pm_ops, | 440 | .pm = &tegra_gart_pm_ops, |
| 441 | .of_match_table = of_match_ptr(tegra_gart_of_match), | ||
| 432 | }, | 442 | }, |
| 433 | }; | 443 | }; |
| 434 | 444 | ||
| @@ -448,4 +458,5 @@ module_exit(tegra_gart_exit); | |||
| 448 | 458 | ||
| 449 | MODULE_DESCRIPTION("IOMMU API for GART in Tegra20"); | 459 | MODULE_DESCRIPTION("IOMMU API for GART in Tegra20"); |
| 450 | MODULE_AUTHOR("Hiroshi DOYU <hdoyu@nvidia.com>"); | 460 | MODULE_AUTHOR("Hiroshi DOYU <hdoyu@nvidia.com>"); |
| 461 | MODULE_ALIAS("platform:tegra-gart"); | ||
| 451 | MODULE_LICENSE("GPL v2"); | 462 | MODULE_LICENSE("GPL v2"); |
