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authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2013-12-11 09:05:15 -0500
committerSimon Horman <horms+renesas@verge.net.au>2013-12-19 06:01:33 -0500
commit72197ca7a1cb1cea5615c879f638d5d457c0b2e2 (patch)
treeed78a27424bd755a275f65e72671ff95f01d4911
parent22a1f59547e1e63cd18ee1ddb32fa2d8ab591a22 (diff)
ARM: shmobile: r8a7790: Reference clocks
Reference clocks using a "clocks" property in all nodes corresponding to devices that require a clock. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--arch/arm/boot/dts/r8a7790.dtsi10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 8dccbe7ba85a..71ec31c6d9b6 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -197,6 +197,7 @@
197 reg = <0 0xe6508000 0 0x40>; 197 reg = <0 0xe6508000 0 0x40>;
198 interrupt-parent = <&gic>; 198 interrupt-parent = <&gic>;
199 interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>; 199 interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>;
200 clocks = <&mstp3_clks R8A7790_CLK_I2C0>;
200 status = "disabled"; 201 status = "disabled";
201 }; 202 };
202 203
@@ -207,6 +208,7 @@
207 reg = <0 0xe6518000 0 0x40>; 208 reg = <0 0xe6518000 0 0x40>;
208 interrupt-parent = <&gic>; 209 interrupt-parent = <&gic>;
209 interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>; 210 interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>;
211 clocks = <&mstp3_clks R8A7790_CLK_I2C1>;
210 status = "disabled"; 212 status = "disabled";
211 }; 213 };
212 214
@@ -217,6 +219,7 @@
217 reg = <0 0xe6530000 0 0x40>; 219 reg = <0 0xe6530000 0 0x40>;
218 interrupt-parent = <&gic>; 220 interrupt-parent = <&gic>;
219 interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>; 221 interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>;
222 clocks = <&mstp3_clks R8A7790_CLK_I2C2>;
220 status = "disabled"; 223 status = "disabled";
221 }; 224 };
222 225
@@ -227,6 +230,7 @@
227 reg = <0 0xe6540000 0 0x40>; 230 reg = <0 0xe6540000 0 0x40>;
228 interrupt-parent = <&gic>; 231 interrupt-parent = <&gic>;
229 interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>; 232 interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>;
233 clocks = <&mstp3_clks R8A7790_CLK_I2C3>;
230 status = "disabled"; 234 status = "disabled";
231 }; 235 };
232 236
@@ -235,6 +239,7 @@
235 reg = <0 0xee200000 0 0x80>; 239 reg = <0 0xee200000 0 0x80>;
236 interrupt-parent = <&gic>; 240 interrupt-parent = <&gic>;
237 interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>; 241 interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
242 clocks = <&mstp3_clks R8A7790_CLK_MMCIF0>;
238 reg-io-width = <4>; 243 reg-io-width = <4>;
239 status = "disabled"; 244 status = "disabled";
240 }; 245 };
@@ -244,6 +249,7 @@
244 reg = <0 0xee220000 0 0x80>; 249 reg = <0 0xee220000 0 0x80>;
245 interrupt-parent = <&gic>; 250 interrupt-parent = <&gic>;
246 interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>; 251 interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
252 clocks = <&mstp3_clks R8A7790_CLK_MMCIF1>;
247 reg-io-width = <4>; 253 reg-io-width = <4>;
248 status = "disabled"; 254 status = "disabled";
249 }; 255 };
@@ -258,6 +264,7 @@
258 reg = <0 0xee100000 0 0x100>; 264 reg = <0 0xee100000 0 0x100>;
259 interrupt-parent = <&gic>; 265 interrupt-parent = <&gic>;
260 interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>; 266 interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
267 clocks = <&mstp3_clks R8A7790_CLK_SDHI0>;
261 cap-sd-highspeed; 268 cap-sd-highspeed;
262 status = "disabled"; 269 status = "disabled";
263 }; 270 };
@@ -267,6 +274,7 @@
267 reg = <0 0xee120000 0 0x100>; 274 reg = <0 0xee120000 0 0x100>;
268 interrupt-parent = <&gic>; 275 interrupt-parent = <&gic>;
269 interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>; 276 interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>;
277 clocks = <&mstp3_clks R8A7790_CLK_SDHI1>;
270 cap-sd-highspeed; 278 cap-sd-highspeed;
271 status = "disabled"; 279 status = "disabled";
272 }; 280 };
@@ -276,6 +284,7 @@
276 reg = <0 0xee140000 0 0x100>; 284 reg = <0 0xee140000 0 0x100>;
277 interrupt-parent = <&gic>; 285 interrupt-parent = <&gic>;
278 interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>; 286 interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;
287 clocks = <&mstp3_clks R8A7790_CLK_SDHI2>;
279 cap-sd-highspeed; 288 cap-sd-highspeed;
280 status = "disabled"; 289 status = "disabled";
281 }; 290 };
@@ -285,6 +294,7 @@
285 reg = <0 0xee160000 0 0x100>; 294 reg = <0 0xee160000 0 0x100>;
286 interrupt-parent = <&gic>; 295 interrupt-parent = <&gic>;
287 interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>; 296 interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>;
297 clocks = <&mstp3_clks R8A7790_CLK_SDHI3>;
288 cap-sd-highspeed; 298 cap-sd-highspeed;
289 status = "disabled"; 299 status = "disabled";
290 }; 300 };