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authorMathias Krause <minipli@googlemail.com>2014-03-24 12:10:37 -0400
committerHerbert Xu <herbert@gondor.apana.org.au>2014-03-25 08:25:42 -0400
commit6ca5afb8c26991cf4f13a8bcca870ec2a9522bf7 (patch)
tree095efa7d609b3c8e1c7d85e56480a22f5354ea46
parent7c1da8d0d046174a4188b5729d7579abf3d29427 (diff)
crypto: x86/sha1 - re-enable the AVX variant
Commit 7c1da8d0d0 "crypto: sha - SHA1 transform x86_64 AVX2" accidentally disabled the AVX variant by making the avx_usable() test not only fail in case the CPU doesn't support AVX or OSXSAVE but also if it doesn't support AVX2. Fix that regression by splitting up the AVX/AVX2 test into two functions. Also test for the BMI1 extension in the avx2_usable() test as the AVX2 implementation not only makes use of BMI2 but also BMI1 instructions. Cc: Chandramouli Narayanan <mouli@linux.intel.com> Signed-off-by: Mathias Krause <minipli@googlemail.com> Reviewed-by: H. Peter Anvin <hpa@linux.intel.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
-rw-r--r--arch/x86/crypto/sha1_ssse3_glue.c26
1 files changed, 16 insertions, 10 deletions
diff --git a/arch/x86/crypto/sha1_ssse3_glue.c b/arch/x86/crypto/sha1_ssse3_glue.c
index 139a55c04d82..74d16ef707c7 100644
--- a/arch/x86/crypto/sha1_ssse3_glue.c
+++ b/arch/x86/crypto/sha1_ssse3_glue.c
@@ -208,11 +208,7 @@ static bool __init avx_usable(void)
208{ 208{
209 u64 xcr0; 209 u64 xcr0;
210 210
211#if defined(CONFIG_AS_AVX2)
212 if (!cpu_has_avx || !cpu_has_avx2 || !cpu_has_osxsave)
213#else
214 if (!cpu_has_avx || !cpu_has_osxsave) 211 if (!cpu_has_avx || !cpu_has_osxsave)
215#endif
216 return false; 212 return false;
217 213
218 xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK); 214 xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
@@ -224,11 +220,23 @@ static bool __init avx_usable(void)
224 220
225 return true; 221 return true;
226} 222}
223
224#ifdef CONFIG_AS_AVX2
225static bool __init avx2_usable(void)
226{
227 if (avx_usable() && cpu_has_avx2 && boot_cpu_has(X86_FEATURE_BMI1) &&
228 boot_cpu_has(X86_FEATURE_BMI2))
229 return true;
230
231 return false;
232}
233#endif
227#endif 234#endif
228 235
229static int __init sha1_ssse3_mod_init(void) 236static int __init sha1_ssse3_mod_init(void)
230{ 237{
231 char *algo_name; 238 char *algo_name;
239
232 /* test for SSSE3 first */ 240 /* test for SSSE3 first */
233 if (cpu_has_ssse3) { 241 if (cpu_has_ssse3) {
234 sha1_transform_asm = sha1_transform_ssse3; 242 sha1_transform_asm = sha1_transform_ssse3;
@@ -238,13 +246,11 @@ static int __init sha1_ssse3_mod_init(void)
238#ifdef CONFIG_AS_AVX 246#ifdef CONFIG_AS_AVX
239 /* allow AVX to override SSSE3, it's a little faster */ 247 /* allow AVX to override SSSE3, it's a little faster */
240 if (avx_usable()) { 248 if (avx_usable()) {
241 if (cpu_has_avx) { 249 sha1_transform_asm = sha1_transform_avx;
242 sha1_transform_asm = sha1_transform_avx; 250 algo_name = "AVX";
243 algo_name = "AVX";
244 }
245#ifdef CONFIG_AS_AVX2 251#ifdef CONFIG_AS_AVX2
246 if (cpu_has_avx2 && boot_cpu_has(X86_FEATURE_BMI2)) { 252 /* allow AVX2 to override AVX, it's a little faster */
247 /* allow AVX2 to override AVX, it's a little faster */ 253 if (avx2_usable()) {
248 sha1_transform_asm = sha1_apply_transform_avx2; 254 sha1_transform_asm = sha1_apply_transform_avx2;
249 algo_name = "AVX2"; 255 algo_name = "AVX2";
250 } 256 }