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authorLee Jones <lee.jones@linaro.org>2013-06-06 06:50:47 -0400
committerLinus Walleij <linus.walleij@linaro.org>2013-09-26 05:04:12 -0400
commit67f13daadccebf95c04f73db7b78cead844540bd (patch)
tree6a80bd71151e2c14bb5aec1c7272cac14e006482
parentb0f4fe1edf6abbc81500d661f730cebd653a838c (diff)
mfd: dbx500-prcmu: Move PRCMU numerical clock identifiers into DT include file
These are required to request DBx500 PRCMU clocks from Device Tree. The numbers used are taken directly from the Hardware Specification document. We're moving them from the DBx500 PRCMU include file into the DT include directory and referencing them from the former via a #include. Acked-by: Samuel Ortiz <sameo@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r--include/dt-bindings/mfd/dbx500-prcmu.h84
-rw-r--r--include/linux/mfd/dbx500-prcmu.h77
2 files changed, 86 insertions, 75 deletions
diff --git a/include/dt-bindings/mfd/dbx500-prcmu.h b/include/dt-bindings/mfd/dbx500-prcmu.h
new file mode 100644
index 000000000000..b7ee8c909908
--- /dev/null
+++ b/include/dt-bindings/mfd/dbx500-prcmu.h
@@ -0,0 +1,84 @@
1/*
2 * This header provides constants for the PRCMU bindings.
3 *
4 */
5
6#ifndef _DT_BINDINGS_MFD_PRCMU_H
7#define _DT_BINDINGS_MFD_PRCMU_H
8
9/*
10 * Clock identifiers.
11 */
12#define ARMCLK 0
13#define PRCMU_ACLK 1
14#define PRCMU_SVAMMCSPCLK 2
15#define PRCMU_SDMMCHCLK 2 /* DBx540 only. */
16#define PRCMU_SIACLK 3
17#define PRCMU_SIAMMDSPCLK 3 /* DBx540 only. */
18#define PRCMU_SGACLK 4
19#define PRCMU_UARTCLK 5
20#define PRCMU_MSP02CLK 6
21#define PRCMU_MSP1CLK 7
22#define PRCMU_I2CCLK 8
23#define PRCMU_SDMMCCLK 9
24#define PRCMU_SLIMCLK 10
25#define PRCMU_CAMCLK 10 /* DBx540 only. */
26#define PRCMU_PER1CLK 11
27#define PRCMU_PER2CLK 12
28#define PRCMU_PER3CLK 13
29#define PRCMU_PER5CLK 14
30#define PRCMU_PER6CLK 15
31#define PRCMU_PER7CLK 16
32#define PRCMU_LCDCLK 17
33#define PRCMU_BMLCLK 18
34#define PRCMU_HSITXCLK 19
35#define PRCMU_HSIRXCLK 20
36#define PRCMU_HDMICLK 21
37#define PRCMU_APEATCLK 22
38#define PRCMU_APETRACECLK 23
39#define PRCMU_MCDECLK 24
40#define PRCMU_IPI2CCLK 25
41#define PRCMU_DSIALTCLK 26
42#define PRCMU_DMACLK 27
43#define PRCMU_B2R2CLK 28
44#define PRCMU_TVCLK 29
45#define SPARE_UNIPROCLK 30
46#define PRCMU_SSPCLK 31
47#define PRCMU_RNGCLK 32
48#define PRCMU_UICCCLK 33
49#define PRCMU_G1CLK 34 /* DBx540 only. */
50#define PRCMU_HVACLK 35 /* DBx540 only. */
51#define PRCMU_SPARE1CLK 36
52#define PRCMU_SPARE2CLK 37
53
54#define PRCMU_NUM_REG_CLOCKS 38
55
56#define PRCMU_RTCCLK PRCMU_NUM_REG_CLOCKS
57#define PRCMU_SYSCLK 39
58#define PRCMU_CDCLK 40
59#define PRCMU_TIMCLK 41
60#define PRCMU_PLLSOC0 42
61#define PRCMU_PLLSOC1 43
62#define PRCMU_ARMSS 44
63#define PRCMU_PLLDDR 45
64#define PRCMU_BML8580CLK 46
65
66/* DSI Clocks */
67#define PRCMU_PLLDSI 47
68#define PRCMU_DSI0CLK 48
69#define PRCMU_DSI1CLK 49
70#define PRCMU_DSI0ESCCLK 50
71#define PRCMU_DSI1ESCCLK 51
72#define PRCMU_DSI2ESCCLK 52
73
74/* LCD DSI PLL - Ux540 only */
75#define PRCMU_PLLDSI_LCD 53
76#define PRCMU_DSI0CLK_LCD 54
77#define PRCMU_DSI1CLK_LCD 55
78#define PRCMU_DSI0ESCCLK_LCD 56
79#define PRCMU_DSI1ESCCLK_LCD 57
80#define PRCMU_DSI2ESCCLK_LCD 58
81
82#define PRCMU_NUM_CLKS 59
83
84#endif
diff --git a/include/linux/mfd/dbx500-prcmu.h b/include/linux/mfd/dbx500-prcmu.h
index 87667d48602b..060e11256fbc 100644
--- a/include/linux/mfd/dbx500-prcmu.h
+++ b/include/linux/mfd/dbx500-prcmu.h
@@ -12,6 +12,8 @@
12#include <linux/notifier.h> 12#include <linux/notifier.h>
13#include <linux/err.h> 13#include <linux/err.h>
14 14
15#include <dt-bindings/mfd/dbx500-prcmu.h> /* For clock identifiers */
16
15/* Offset for the firmware version within the TCPM */ 17/* Offset for the firmware version within the TCPM */
16#define DB8500_PRCMU_FW_VERSION_OFFSET 0xA4 18#define DB8500_PRCMU_FW_VERSION_OFFSET 0xA4
17#define DBX540_PRCMU_FW_VERSION_OFFSET 0xA8 19#define DBX540_PRCMU_FW_VERSION_OFFSET 0xA8
@@ -94,81 +96,6 @@ enum prcmu_wakeup_index {
94#define PRCMU_CLKSRC_ARMCLKFIX 0x46 96#define PRCMU_CLKSRC_ARMCLKFIX 0x46
95#define PRCMU_CLKSRC_HDMICLK 0x47 97#define PRCMU_CLKSRC_HDMICLK 0x47
96 98
97/*
98 * Clock identifiers.
99 */
100#define ARMCLK 0
101#define PRCMU_ACLK 1
102#define PRCMU_SVAMMCSPCLK 2
103#define PRCMU_SDMMCHCLK 2 /* DBx540 only. */
104#define PRCMU_SIACLK 3
105#define PRCMU_SIAMMDSPCLK 3 /* DBx540 only. */
106#define PRCMU_SGACLK 4
107#define PRCMU_UARTCLK 5
108#define PRCMU_MSP02CLK 6
109#define PRCMU_MSP1CLK 7
110#define PRCMU_I2CCLK 8
111#define PRCMU_SDMMCCLK 9
112#define PRCMU_SLIMCLK 10
113#define PRCMU_CAMCLK 10 /* DBx540 only. */
114#define PRCMU_PER1CLK 11
115#define PRCMU_PER2CLK 12
116#define PRCMU_PER3CLK 13
117#define PRCMU_PER5CLK 14
118#define PRCMU_PER6CLK 15
119#define PRCMU_PER7CLK 16
120#define PRCMU_LCDCLK 17
121#define PRCMU_BMLCLK 18
122#define PRCMU_HSITXCLK 19
123#define PRCMU_HSIRXCLK 20
124#define PRCMU_HDMICLK 21
125#define PRCMU_APEATCLK 22
126#define PRCMU_APETRACECLK 23
127#define PRCMU_MCDECLK 24
128#define PRCMU_IPI2CCLK 25
129#define PRCMU_DSIALTCLK 26
130#define PRCMU_DMACLK 27
131#define PRCMU_B2R2CLK 28
132#define PRCMU_TVCLK 29
133#define SPARE_UNIPROCLK 30
134#define PRCMU_SSPCLK 31
135#define PRCMU_RNGCLK 32
136#define PRCMU_UICCCLK 33
137#define PRCMU_G1CLK 34 /* DBx540 only. */
138#define PRCMU_HVACLK 35 /* DBx540 only. */
139#define PRCMU_SPARE1CLK 36
140#define PRCMU_SPARE2CLK 37
141
142#define PRCMU_NUM_REG_CLOCKS 38
143
144#define PRCMU_RTCCLK PRCMU_NUM_REG_CLOCKS
145#define PRCMU_SYSCLK 39
146#define PRCMU_CDCLK 40
147#define PRCMU_TIMCLK 41
148#define PRCMU_PLLSOC0 42
149#define PRCMU_PLLSOC1 43
150#define PRCMU_ARMSS 44
151#define PRCMU_PLLDDR 45
152#define PRCMU_BML8580CLK 46
153
154/* DSI Clocks */
155#define PRCMU_PLLDSI 47
156#define PRCMU_DSI0CLK 48
157#define PRCMU_DSI1CLK 49
158#define PRCMU_DSI0ESCCLK 50
159#define PRCMU_DSI1ESCCLK 51
160#define PRCMU_DSI2ESCCLK 52
161
162/* LCD DSI PLL - Ux540 only */
163#define PRCMU_PLLDSI_LCD 53
164#define PRCMU_DSI0CLK_LCD 54
165#define PRCMU_DSI1CLK_LCD 55
166#define PRCMU_DSI0ESCCLK_LCD 56
167#define PRCMU_DSI1ESCCLK_LCD 57
168#define PRCMU_DSI2ESCCLK_LCD 58
169
170#define PRCMU_NUM_CLKS 59
171
172/** 99/**
173 * enum prcmu_wdog_id - PRCMU watchdog IDs 100 * enum prcmu_wdog_id - PRCMU watchdog IDs
174 * @PRCMU_WDOG_ALL: use all timers 101 * @PRCMU_WDOG_ALL: use all timers