diff options
author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2013-07-05 04:57:14 -0400 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-08-05 13:03:56 -0400 |
commit | 67ca28f30af8e7555f40b916c28148b432168eec (patch) | |
tree | f4b17274f0b0caeb0af4b478569e3a8183d9be75 | |
parent | bdd57d0386d892e5c470a3d615c3034389700964 (diff) |
drm/i915: Pass the actual sprite width to watermarks functions
Don't subtract one from the sprite width before watermark calculations.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_sprite.c | 18 |
2 files changed, 10 insertions, 10 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index f9813b3ead34..9ef476b2eeeb 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c | |||
@@ -2641,7 +2641,7 @@ static void haswell_update_sprite_wm(struct drm_device *dev, int pipe, | |||
2641 | if (intel_plane->pipe == pipe) { | 2641 | if (intel_plane->pipe == pipe) { |
2642 | intel_plane->wm.enabled = enabled; | 2642 | intel_plane->wm.enabled = enabled; |
2643 | intel_plane->wm.scaled = scaled; | 2643 | intel_plane->wm.scaled = scaled; |
2644 | intel_plane->wm.horiz_pixels = sprite_width + 1; | 2644 | intel_plane->wm.horiz_pixels = sprite_width; |
2645 | intel_plane->wm.bytes_per_pixel = pixel_size; | 2645 | intel_plane->wm.bytes_per_pixel = pixel_size; |
2646 | break; | 2646 | break; |
2647 | } | 2647 | } |
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 069155f17edb..3e3a6d01cff6 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c | |||
@@ -108,15 +108,15 @@ vlv_update_plane(struct drm_plane *dplane, struct drm_framebuffer *fb, | |||
108 | 108 | ||
109 | sprctl |= SP_ENABLE; | 109 | sprctl |= SP_ENABLE; |
110 | 110 | ||
111 | intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size, true, | ||
112 | src_w != crtc_w || src_h != crtc_h); | ||
113 | |||
111 | /* Sizes are 0 based */ | 114 | /* Sizes are 0 based */ |
112 | src_w--; | 115 | src_w--; |
113 | src_h--; | 116 | src_h--; |
114 | crtc_w--; | 117 | crtc_w--; |
115 | crtc_h--; | 118 | crtc_h--; |
116 | 119 | ||
117 | intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size, true, | ||
118 | src_w != crtc_w || src_h != crtc_h); | ||
119 | |||
120 | I915_WRITE(SPSTRIDE(pipe, plane), fb->pitches[0]); | 120 | I915_WRITE(SPSTRIDE(pipe, plane), fb->pitches[0]); |
121 | I915_WRITE(SPPOS(pipe, plane), (crtc_y << 16) | crtc_x); | 121 | I915_WRITE(SPPOS(pipe, plane), (crtc_y << 16) | crtc_x); |
122 | 122 | ||
@@ -263,15 +263,15 @@ ivb_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb, | |||
263 | if (IS_HASWELL(dev)) | 263 | if (IS_HASWELL(dev)) |
264 | sprctl |= SPRITE_PIPE_CSC_ENABLE; | 264 | sprctl |= SPRITE_PIPE_CSC_ENABLE; |
265 | 265 | ||
266 | intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size, true, | ||
267 | src_w != crtc_w || src_h != crtc_h); | ||
268 | |||
266 | /* Sizes are 0 based */ | 269 | /* Sizes are 0 based */ |
267 | src_w--; | 270 | src_w--; |
268 | src_h--; | 271 | src_h--; |
269 | crtc_w--; | 272 | crtc_w--; |
270 | crtc_h--; | 273 | crtc_h--; |
271 | 274 | ||
272 | intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size, true, | ||
273 | src_w != crtc_w || src_h != crtc_h); | ||
274 | |||
275 | /* | 275 | /* |
276 | * IVB workaround: must disable low power watermarks for at least | 276 | * IVB workaround: must disable low power watermarks for at least |
277 | * one frame before enabling scaling. LP watermarks can be re-enabled | 277 | * one frame before enabling scaling. LP watermarks can be re-enabled |
@@ -452,15 +452,15 @@ ilk_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb, | |||
452 | dvscntr |= DVS_TRICKLE_FEED_DISABLE; /* must disable */ | 452 | dvscntr |= DVS_TRICKLE_FEED_DISABLE; /* must disable */ |
453 | dvscntr |= DVS_ENABLE; | 453 | dvscntr |= DVS_ENABLE; |
454 | 454 | ||
455 | intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size, true, | ||
456 | src_w != crtc_w || src_h != crtc_h); | ||
457 | |||
455 | /* Sizes are 0 based */ | 458 | /* Sizes are 0 based */ |
456 | src_w--; | 459 | src_w--; |
457 | src_h--; | 460 | src_h--; |
458 | crtc_w--; | 461 | crtc_w--; |
459 | crtc_h--; | 462 | crtc_h--; |
460 | 463 | ||
461 | intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size, true, | ||
462 | src_w != crtc_w || src_h != crtc_h); | ||
463 | |||
464 | dvsscale = 0; | 464 | dvsscale = 0; |
465 | if (IS_GEN5(dev) || crtc_w != src_w || crtc_h != src_h) | 465 | if (IS_GEN5(dev) || crtc_w != src_w || crtc_h != src_h) |
466 | dvsscale = DVS_SCALE_ENABLE | (src_w << 16) | src_h; | 466 | dvsscale = DVS_SCALE_ENABLE | (src_w << 16) | src_h; |