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authorArnd Bergmann <arnd@arndb.de>2014-05-23 12:19:11 -0400
committerArnd Bergmann <arnd@arndb.de>2014-05-23 15:56:09 -0400
commit650052b141fd5640176e54dd443e5ff13ed2b77f (patch)
tree2d567d2949c6c5ac66eff9f61a29d3a40fd90385
parent9706c077d8f786268b2c48c368547c3bd8262bfb (diff)
parent61d45495779c54d40a447d6d9a14d6f7863780b2 (diff)
Merge branch 'axxia/soc' into next/soc
Patches from Anders Berg applied individually: Here is version 4 of platform support for AXM5516 SoC. The clk driver is now applied to clk-next. The rest should be ready for arm-soc. Haven't got any response from the power/reset maintainers... I hope this driver can be taken via arm-soc as well. The AXM55xx family consists of devices that may contain up to 16 ARM Cortex-A15 cores (in a 4x4 cluster configuration). The cores within each cluster share an L2 cache, and the clusters are connected to each other via a CCN-504 cache coherent interconnect. This machine requires CONFIG_ARM_LPAE enabled as all peripherals are located above 4GB in the memory map. * axxia/soc: ARM: dts: axxia: Add reset controller power: reset: Add Axxia system reset driver ARM: axxia: Adding defconfig for AXM55xx ARM: dts: Device tree for AXM55xx. ARM: Add platform support for LSI AXM55xx SoC Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat
-rw-r--r--Documentation/devicetree/bindings/arm/axxia.txt12
-rw-r--r--Documentation/devicetree/bindings/power_supply/axxia-reset.txt20
-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/Makefile2
-rw-r--r--arch/arm/boot/dts/Makefile1
-rw-r--r--arch/arm/boot/dts/axm5516-amarillo.dts51
-rw-r--r--arch/arm/boot/dts/axm5516-cpus.dtsi204
-rw-r--r--arch/arm/boot/dts/axm55xx.dtsi204
-rw-r--r--arch/arm/configs/axm55xx_defconfig248
-rw-r--r--arch/arm/mach-axxia/Kconfig16
-rw-r--r--arch/arm/mach-axxia/Makefile2
-rw-r--r--arch/arm/mach-axxia/axxia.c28
-rw-r--r--arch/arm/mach-axxia/platsmp.c89
-rw-r--r--drivers/power/reset/Kconfig8
-rw-r--r--drivers/power/reset/Makefile1
-rw-r--r--drivers/power/reset/axxia-reset.c88
-rw-r--r--include/dt-bindings/clock/lsi,axm5516-clks.h36
17 files changed, 1012 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/axxia.txt b/Documentation/devicetree/bindings/arm/axxia.txt
new file mode 100644
index 000000000000..7b4ef9c07696
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/axxia.txt
@@ -0,0 +1,12 @@
1Axxia AXM55xx device tree bindings
2
3Boards using the AXM55xx SoC need to have the following properties:
4
5Required root node property:
6
7 - compatible = "lsi,axm5516"
8
9Boards:
10
11 LSI AXM5516 Validation board (Amarillo)
12 compatible = "lsi,axm5516-amarillo", "lsi,axm5516"
diff --git a/Documentation/devicetree/bindings/power_supply/axxia-reset.txt b/Documentation/devicetree/bindings/power_supply/axxia-reset.txt
new file mode 100644
index 000000000000..47e720d249d2
--- /dev/null
+++ b/Documentation/devicetree/bindings/power_supply/axxia-reset.txt
@@ -0,0 +1,20 @@
1Axxia Restart Driver
2
3This driver can do reset of the Axxia SoC. It uses the registers in the syscon
4block to initiate a chip reset.
5
6Required Properties:
7 -compatible: "lsi,axm55xx-reset"
8 -syscon: phandle to the syscon node.
9
10Example:
11
12 syscon: syscon@2010030000 {
13 compatible = "lsi,axxia-syscon", "syscon";
14 reg = <0x20 0x10030000 0 0x2000>;
15 };
16
17 reset: reset@2010031000 {
18 compatible = "lsi,axm55xx-reset";
19 syscon = <&syscon>;
20 };
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 1c1fbbf6e4ae..f849690eb888 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -950,6 +950,8 @@ source "arch/arm/mach-mvebu/Kconfig"
950 950
951source "arch/arm/mach-at91/Kconfig" 951source "arch/arm/mach-at91/Kconfig"
952 952
953source "arch/arm/mach-axxia/Kconfig"
954
953source "arch/arm/mach-bcm/Kconfig" 955source "arch/arm/mach-bcm/Kconfig"
954 956
955source "arch/arm/mach-berlin/Kconfig" 957source "arch/arm/mach-berlin/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 41c1931f0155..6721fab13734 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -138,10 +138,12 @@ endif
138textofs-$(CONFIG_ARCH_MSM7X30) := 0x00208000 138textofs-$(CONFIG_ARCH_MSM7X30) := 0x00208000
139textofs-$(CONFIG_ARCH_MSM8X60) := 0x00208000 139textofs-$(CONFIG_ARCH_MSM8X60) := 0x00208000
140textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000 140textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000
141textofs-$(CONFIG_ARCH_AXXIA) := 0x00308000
141 142
142# Machine directory name. This list is sorted alphanumerically 143# Machine directory name. This list is sorted alphanumerically
143# by CONFIG_* macro name. 144# by CONFIG_* macro name.
144machine-$(CONFIG_ARCH_AT91) += at91 145machine-$(CONFIG_ARCH_AT91) += at91
146machine-$(CONFIG_ARCH_AXXIA) += axxia
145machine-$(CONFIG_ARCH_BCM) += bcm 147machine-$(CONFIG_ARCH_BCM) += bcm
146machine-$(CONFIG_ARCH_BERLIN) += berlin 148machine-$(CONFIG_ARCH_BERLIN) += berlin
147machine-$(CONFIG_ARCH_CLPS711X) += clps711x 149machine-$(CONFIG_ARCH_CLPS711X) += clps711x
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index a62dddc60614..7ec6ec076417 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -50,6 +50,7 @@ dtb-$(CONFIG_ARCH_AT91) += sama5d35ek.dtb
50dtb-$(CONFIG_ARCH_AT91) += sama5d36ek.dtb 50dtb-$(CONFIG_ARCH_AT91) += sama5d36ek.dtb
51 51
52dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb 52dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb
53dtb-$(CONFIG_ARCH_AXXIA) += axm5516-amarillo.dtb
53dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb 54dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
54dtb-$(CONFIG_ARCH_BCM_5301X) += bcm4708-netgear-r6250.dtb 55dtb-$(CONFIG_ARCH_BCM_5301X) += bcm4708-netgear-r6250.dtb
55dtb-$(CONFIG_ARCH_BCM_MOBILE) += bcm28155-ap.dtb \ 56dtb-$(CONFIG_ARCH_BCM_MOBILE) += bcm28155-ap.dtb \
diff --git a/arch/arm/boot/dts/axm5516-amarillo.dts b/arch/arm/boot/dts/axm5516-amarillo.dts
new file mode 100644
index 000000000000..a9d60471d9ff
--- /dev/null
+++ b/arch/arm/boot/dts/axm5516-amarillo.dts
@@ -0,0 +1,51 @@
1/*
2 * arch/arm/boot/dts/axm5516-amarillo.dts
3 *
4 * Copyright (C) 2013 LSI
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12/dts-v1/;
13
14/memreserve/ 0x00000000 0x00400000;
15
16#include "axm55xx.dtsi"
17#include "axm5516-cpus.dtsi"
18
19/ {
20 model = "Amarillo AXM5516";
21 compatible = "lsi,axm5516-amarillo", "lsi,axm5516";
22
23 memory {
24 device_type = "memory";
25 reg = <0 0x00000000 0x02 0x00000000>;
26 };
27};
28
29&serial0 {
30 status = "okay";
31};
32
33&serial1 {
34 status = "okay";
35};
36
37&serial2 {
38 status = "okay";
39};
40
41&serial3 {
42 status = "okay";
43};
44
45&gpio0 {
46 status = "okay";
47};
48
49&gpio1 {
50 status = "okay";
51};
diff --git a/arch/arm/boot/dts/axm5516-cpus.dtsi b/arch/arm/boot/dts/axm5516-cpus.dtsi
new file mode 100644
index 000000000000..b85f360cb125
--- /dev/null
+++ b/arch/arm/boot/dts/axm5516-cpus.dtsi
@@ -0,0 +1,204 @@
1/*
2 * arch/arm/boot/dts/axm5516-cpus.dtsi
3 *
4 * Copyright (C) 2013 LSI
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12/ {
13 cpus {
14 #address-cells = <1>;
15 #size-cells = <0>;
16
17 cpu-map {
18 cluster0 {
19 core0 {
20 cpu = <&CPU0>;
21 };
22 core1 {
23 cpu = <&CPU1>;
24 };
25 core2 {
26 cpu = <&CPU2>;
27 };
28 core3 {
29 cpu = <&CPU3>;
30 };
31 };
32 cluster1 {
33 core0 {
34 cpu = <&CPU4>;
35 };
36 core1 {
37 cpu = <&CPU5>;
38 };
39 core2 {
40 cpu = <&CPU6>;
41 };
42 core3 {
43 cpu = <&CPU7>;
44 };
45 };
46 cluster2 {
47 core0 {
48 cpu = <&CPU8>;
49 };
50 core1 {
51 cpu = <&CPU9>;
52 };
53 core2 {
54 cpu = <&CPU10>;
55 };
56 core3 {
57 cpu = <&CPU11>;
58 };
59 };
60 cluster3 {
61 core0 {
62 cpu = <&CPU12>;
63 };
64 core1 {
65 cpu = <&CPU13>;
66 };
67 core2 {
68 cpu = <&CPU14>;
69 };
70 core3 {
71 cpu = <&CPU15>;
72 };
73 };
74 };
75
76 CPU0: cpu@0 {
77 device_type = "cpu";
78 compatible = "arm,cortex-a15";
79 reg = <0x00>;
80 clock-frequency= <1400000000>;
81 cpu-release-addr = <0>; // Fixed by the boot loader
82 };
83
84 CPU1: cpu@1 {
85 device_type = "cpu";
86 compatible = "arm,cortex-a15";
87 reg = <0x01>;
88 clock-frequency= <1400000000>;
89 cpu-release-addr = <0>; // Fixed by the boot loader
90 };
91
92 CPU2: cpu@2 {
93 device_type = "cpu";
94 compatible = "arm,cortex-a15";
95 reg = <0x02>;
96 clock-frequency= <1400000000>;
97 cpu-release-addr = <0>; // Fixed by the boot loader
98 };
99
100 CPU3: cpu@3 {
101 device_type = "cpu";
102 compatible = "arm,cortex-a15";
103 reg = <0x03>;
104 clock-frequency= <1400000000>;
105 cpu-release-addr = <0>; // Fixed by the boot loader
106 };
107
108 CPU4: cpu@100 {
109 device_type = "cpu";
110 compatible = "arm,cortex-a15";
111 reg = <0x100>;
112 clock-frequency= <1400000000>;
113 cpu-release-addr = <0>; // Fixed by the boot loader
114 };
115
116 CPU5: cpu@101 {
117 device_type = "cpu";
118 compatible = "arm,cortex-a15";
119 reg = <0x101>;
120 clock-frequency= <1400000000>;
121 cpu-release-addr = <0>; // Fixed by the boot loader
122 };
123
124 CPU6: cpu@102 {
125 device_type = "cpu";
126 compatible = "arm,cortex-a15";
127 reg = <0x102>;
128 clock-frequency= <1400000000>;
129 cpu-release-addr = <0>; // Fixed by the boot loader
130 };
131
132 CPU7: cpu@103 {
133 device_type = "cpu";
134 compatible = "arm,cortex-a15";
135 reg = <0x103>;
136 clock-frequency= <1400000000>;
137 cpu-release-addr = <0>; // Fixed by the boot loader
138 };
139
140 CPU8: cpu@200 {
141 device_type = "cpu";
142 compatible = "arm,cortex-a15";
143 reg = <0x200>;
144 clock-frequency= <1400000000>;
145 cpu-release-addr = <0>; // Fixed by the boot loader
146 };
147
148 CPU9: cpu@201 {
149 device_type = "cpu";
150 compatible = "arm,cortex-a15";
151 reg = <0x201>;
152 clock-frequency= <1400000000>;
153 cpu-release-addr = <0>; // Fixed by the boot loader
154 };
155
156 CPU10: cpu@202 {
157 device_type = "cpu";
158 compatible = "arm,cortex-a15";
159 reg = <0x202>;
160 clock-frequency= <1400000000>;
161 cpu-release-addr = <0>; // Fixed by the boot loader
162 };
163
164 CPU11: cpu@203 {
165 device_type = "cpu";
166 compatible = "arm,cortex-a15";
167 reg = <0x203>;
168 clock-frequency= <1400000000>;
169 cpu-release-addr = <0>; // Fixed by the boot loader
170 };
171
172 CPU12: cpu@300 {
173 device_type = "cpu";
174 compatible = "arm,cortex-a15";
175 reg = <0x300>;
176 clock-frequency= <1400000000>;
177 cpu-release-addr = <0>; // Fixed by the boot loader
178 };
179
180 CPU13: cpu@301 {
181 device_type = "cpu";
182 compatible = "arm,cortex-a15";
183 reg = <0x301>;
184 clock-frequency= <1400000000>;
185 cpu-release-addr = <0>; // Fixed by the boot loader
186 };
187
188 CPU14: cpu@302 {
189 device_type = "cpu";
190 compatible = "arm,cortex-a15";
191 reg = <0x302>;
192 clock-frequency= <1400000000>;
193 cpu-release-addr = <0>; // Fixed by the boot loader
194 };
195
196 CPU15: cpu@303 {
197 device_type = "cpu";
198 compatible = "arm,cortex-a15";
199 reg = <0x303>;
200 clock-frequency= <1400000000>;
201 cpu-release-addr = <0>; // Fixed by the boot loader
202 };
203 };
204};
diff --git a/arch/arm/boot/dts/axm55xx.dtsi b/arch/arm/boot/dts/axm55xx.dtsi
new file mode 100644
index 000000000000..ea288f0a1d39
--- /dev/null
+++ b/arch/arm/boot/dts/axm55xx.dtsi
@@ -0,0 +1,204 @@
1/*
2 * arch/arm/boot/dts/axm55xx.dtsi
3 *
4 * Copyright (C) 2013 LSI
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <dt-bindings/interrupt-controller/arm-gic.h>
13#include <dt-bindings/clock/lsi,axm5516-clks.h>
14
15#include "skeleton64.dtsi"
16
17/ {
18 interrupt-parent = <&gic>;
19
20 aliases {
21 serial0 = &serial0;
22 serial1 = &serial1;
23 serial2 = &serial2;
24 serial3 = &serial3;
25 timer = &timer0;
26 };
27
28 clocks {
29 compatible = "simple-bus";
30 #address-cells = <2>;
31 #size-cells = <2>;
32 ranges;
33
34 clk_ref0: clk_ref0 {
35 compatible = "fixed-clock";
36 #clock-cells = <0>;
37 clock-frequency = <125000000>;
38 };
39
40 clk_ref1: clk_ref1 {
41 compatible = "fixed-clock";
42 #clock-cells = <0>;
43 clock-frequency = <125000000>;
44 };
45
46 clk_ref2: clk_ref2 {
47 compatible = "fixed-clock";
48 #clock-cells = <0>;
49 clock-frequency = <125000000>;
50 };
51
52 clks: clock-controller@2010020000 {
53 compatible = "lsi,axm5516-clks";
54 #clock-cells = <1>;
55 reg = <0x20 0x10020000 0 0x20000>;
56 };
57 };
58
59 gic: interrupt-controller@2001001000 {
60 compatible = "arm,cortex-a15-gic";
61 #interrupt-cells = <3>;
62 #address-cells = <0>;
63 interrupt-controller;
64 reg = <0x20 0x01001000 0 0x1000>,
65 <0x20 0x01002000 0 0x1000>,
66 <0x20 0x01004000 0 0x2000>,
67 <0x20 0x01006000 0 0x2000>;
68 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
69 IRQ_TYPE_LEVEL_HIGH)>;
70 };
71
72 timer {
73 compatible = "arm,armv7-timer";
74 interrupts =
75 <GIC_PPI 13
76 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
77 <GIC_PPI 14
78 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
79 <GIC_PPI 11
80 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
81 <GIC_PPI 10
82 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
83 };
84
85
86 pmu {
87 compatible = "arm,cortex-a15-pmu";
88 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
89 };
90
91 soc {
92 compatible = "simple-bus";
93 device_type = "soc";
94 #address-cells = <2>;
95 #size-cells = <2>;
96 interrupt-parent = <&gic>;
97 ranges;
98
99 syscon: syscon@2010030000 {
100 compatible = "lsi,axxia-syscon", "syscon";
101 reg = <0x20 0x10030000 0 0x2000>;
102 };
103
104 reset: reset@2010031000 {
105 compatible = "lsi,axm55xx-reset";
106 syscon = <&syscon>;
107 };
108
109 amba {
110 compatible = "arm,amba-bus";
111 #address-cells = <2>;
112 #size-cells = <2>;
113 ranges;
114
115 serial0: uart@2010080000 {
116 compatible = "arm,pl011", "arm,primecell";
117 reg = <0x20 0x10080000 0 0x1000>;
118 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
119 clocks = <&clks AXXIA_CLK_PER>;
120 clock-names = "apb_pclk";
121 status = "disabled";
122 };
123
124 serial1: uart@2010081000 {
125 compatible = "arm,pl011", "arm,primecell";
126 reg = <0x20 0x10081000 0 0x1000>;
127 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
128 clocks = <&clks AXXIA_CLK_PER>;
129 clock-names = "apb_pclk";
130 status = "disabled";
131 };
132
133 serial2: uart@2010082000 {
134 compatible = "arm,pl011", "arm,primecell";
135 reg = <0x20 0x10082000 0 0x1000>;
136 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
137 clocks = <&clks AXXIA_CLK_PER>;
138 clock-names = "apb_pclk";
139 status = "disabled";
140 };
141
142 serial3: uart@2010083000 {
143 compatible = "arm,pl011", "arm,primecell";
144 reg = <0x20 0x10083000 0 0x1000>;
145 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
146 clocks = <&clks AXXIA_CLK_PER>;
147 clock-names = "apb_pclk";
148 status = "disabled";
149 };
150
151 timer0: timer@2010091000 {
152 compatible = "arm,sp804", "arm,primecell";
153 reg = <0x20 0x10091000 0 0x1000>;
154 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
155 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
156 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
157 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
158 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
159 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
160 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
161 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
162 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
163 clocks = <&clks AXXIA_CLK_PER>;
164 clock-names = "apb_pclk";
165 status = "okay";
166 };
167
168 gpio0: gpio@2010092000 {
169 #gpio-cells = <2>;
170 compatible = "arm,pl061", "arm,primecell";
171 gpio-controller;
172 reg = <0x20 0x10092000 0x00 0x1000>;
173 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
174 <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
175 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
176 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
177 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
178 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
179 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
180 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
181 clocks = <&clks AXXIA_CLK_PER>;
182 clock-names = "apb_pclk";
183 status = "disabled";
184 };
185
186 gpio1: gpio@2010093000 {
187 #gpio-cells = <2>;
188 compatible = "arm,pl061", "arm,primecell";
189 gpio-controller;
190 reg = <0x20 0x10093000 0x00 0x1000>;
191 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
192 clocks = <&clks AXXIA_CLK_PER>;
193 clock-names = "apb_pclk";
194 status = "disabled";
195 };
196 };
197 };
198};
199
200/*
201 Local Variables:
202 mode: C
203 End:
204*/
diff --git a/arch/arm/configs/axm55xx_defconfig b/arch/arm/configs/axm55xx_defconfig
new file mode 100644
index 000000000000..d3260d7d5af1
--- /dev/null
+++ b/arch/arm/configs/axm55xx_defconfig
@@ -0,0 +1,248 @@
1CONFIG_SYSVIPC=y
2CONFIG_POSIX_MQUEUE=y
3CONFIG_FHANDLE=y
4CONFIG_AUDIT=y
5CONFIG_HIGH_RES_TIMERS=y
6CONFIG_BSD_PROCESS_ACCT=y
7CONFIG_BSD_PROCESS_ACCT_V3=y
8CONFIG_TASKSTATS=y
9CONFIG_TASK_DELAY_ACCT=y
10CONFIG_TASK_XACCT=y
11CONFIG_TASK_IO_ACCOUNTING=y
12CONFIG_IKCONFIG=y
13CONFIG_IKCONFIG_PROC=y
14CONFIG_LOG_BUF_SHIFT=16
15CONFIG_NAMESPACES=y
16# CONFIG_UTS_NS is not set
17# CONFIG_IPC_NS is not set
18# CONFIG_PID_NS is not set
19# CONFIG_NET_NS is not set
20CONFIG_SCHED_AUTOGROUP=y
21CONFIG_RELAY=y
22CONFIG_BLK_DEV_INITRD=y
23CONFIG_SYSCTL_SYSCALL=y
24CONFIG_EMBEDDED=y
25# CONFIG_COMPAT_BRK is not set
26CONFIG_PROFILING=y
27CONFIG_MODULES=y
28CONFIG_MODULE_UNLOAD=y
29# CONFIG_IOSCHED_DEADLINE is not set
30CONFIG_ARCH_AXXIA=y
31CONFIG_GPIO_PCA953X=y
32CONFIG_ARM_LPAE=y
33CONFIG_ARM_THUMBEE=y
34CONFIG_ARM_ERRATA_430973=y
35CONFIG_ARM_ERRATA_643719=y
36CONFIG_ARM_ERRATA_720789=y
37CONFIG_ARM_ERRATA_754322=y
38CONFIG_ARM_ERRATA_754327=y
39CONFIG_ARM_ERRATA_764369=y
40CONFIG_ARM_ERRATA_775420=y
41CONFIG_ARM_ERRATA_798181=y
42CONFIG_PCI=y
43CONFIG_PCI_MSI=y
44CONFIG_PCIE_AXXIA=y
45CONFIG_SMP=y
46CONFIG_NR_CPUS=16
47CONFIG_HOTPLUG_CPU=y
48CONFIG_PREEMPT=y
49CONFIG_AEABI=y
50CONFIG_OABI_COMPAT=y
51CONFIG_HIGHMEM=y
52CONFIG_KSM=y
53CONFIG_ZBOOT_ROM_TEXT=0x0
54CONFIG_ZBOOT_ROM_BSS=0x0
55CONFIG_ARM_APPENDED_DTB=y
56CONFIG_ARM_ATAG_DTB_COMPAT=y
57CONFIG_VFP=y
58CONFIG_NEON=y
59# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
60CONFIG_BINFMT_MISC=y
61# CONFIG_SUSPEND is not set
62CONFIG_NET=y
63CONFIG_PACKET=y
64CONFIG_UNIX=y
65CONFIG_XFRM_USER=y
66CONFIG_XFRM_SUB_POLICY=y
67CONFIG_XFRM_MIGRATE=y
68CONFIG_XFRM_STATISTICS=y
69CONFIG_NET_KEY=y
70CONFIG_INET=y
71CONFIG_IP_PNP=y
72CONFIG_IP_PNP_DHCP=y
73CONFIG_IP_PNP_BOOTP=y
74CONFIG_INET_AH=y
75CONFIG_INET_ESP=y
76CONFIG_INET_IPCOMP=y
77# CONFIG_INET_LRO is not set
78# CONFIG_IPV6 is not set
79CONFIG_NETWORK_PHY_TIMESTAMPING=y
80CONFIG_BRIDGE=y
81# CONFIG_WIRELESS is not set
82CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
83CONFIG_DEVTMPFS=y
84CONFIG_DEVTMPFS_MOUNT=y
85CONFIG_MTD=y
86CONFIG_MTD_CMDLINE_PARTS=y
87CONFIG_MTD_AFS_PARTS=y
88CONFIG_MTD_BLOCK=y
89CONFIG_MTD_CFI=y
90CONFIG_MTD_CFI_INTELEXT=y
91CONFIG_MTD_CFI_AMDSTD=y
92CONFIG_MTD_CFI_STAA=y
93CONFIG_MTD_PHYSMAP=y
94CONFIG_MTD_PHYSMAP_OF=y
95CONFIG_MTD_M25P80=y
96CONFIG_PROC_DEVICETREE=y
97CONFIG_BLK_DEV_LOOP=y
98CONFIG_BLK_DEV_RAM=y
99CONFIG_EEPROM_AT24=y
100CONFIG_EEPROM_AT25=y
101CONFIG_BLK_DEV_SD=y
102CONFIG_CHR_DEV_SG=y
103CONFIG_ATA=y
104CONFIG_PATA_PLATFORM=y
105CONFIG_PATA_OF_PLATFORM=y
106CONFIG_MD=y
107CONFIG_BLK_DEV_DM=y
108CONFIG_DM_UEVENT=y
109CONFIG_NETDEVICES=y
110CONFIG_TUN=y
111CONFIG_VETH=y
112CONFIG_VIRTIO_NET=y
113# CONFIG_NET_CADENCE is not set
114# CONFIG_NET_VENDOR_BROADCOM is not set
115# CONFIG_NET_VENDOR_CIRRUS is not set
116# CONFIG_NET_VENDOR_FARADAY is not set
117# CONFIG_NET_VENDOR_INTEL is not set
118# CONFIG_NET_VENDOR_MARVELL is not set
119# CONFIG_NET_VENDOR_MICREL is not set
120# CONFIG_NET_VENDOR_NATSEMI is not set
121# CONFIG_NET_VENDOR_SEEQ is not set
122# CONFIG_NET_VENDOR_SMSC is not set
123# CONFIG_NET_VENDOR_STMICRO is not set
124# CONFIG_NET_VENDOR_VIA is not set
125# CONFIG_NET_VENDOR_WIZNET is not set
126CONFIG_BROADCOM_PHY=y
127# CONFIG_WLAN is not set
128# CONFIG_MOUSE_PS2_ALPS is not set
129# CONFIG_MOUSE_PS2_LOGIPS2PP is not set
130# CONFIG_MOUSE_PS2_SYNAPTICS is not set
131# CONFIG_MOUSE_PS2_TRACKPOINT is not set
132# CONFIG_SERIO_SERPORT is not set
133CONFIG_SERIO_AMBAKMI=y
134CONFIG_LEGACY_PTY_COUNT=16
135CONFIG_SERIAL_AMBA_PL011=y
136CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
137CONFIG_VIRTIO_CONSOLE=y
138# CONFIG_HW_RANDOM is not set
139CONFIG_I2C=y
140CONFIG_I2C_CHARDEV=y
141CONFIG_I2C_MUX=y
142CONFIG_I2C_AXXIA=y
143CONFIG_SPI=y
144CONFIG_SPI_PL022=y
145CONFIG_DP83640_PHY=y
146CONFIG_GPIOLIB=y
147CONFIG_GPIO_SYSFS=y
148CONFIG_GPIO_PL061=y
149CONFIG_POWER_SUPPLY=y
150CONFIG_POWER_RESET=y
151CONFIG_POWER_RESET_AXXIA=y
152CONFIG_SENSORS_ADT7475=y
153CONFIG_SENSORS_JC42=y
154CONFIG_SENSORS_LM75=y
155CONFIG_PMBUS=y
156CONFIG_SENSORS_LTC2978=y
157CONFIG_WATCHDOG=y
158CONFIG_ARM_SP805_WATCHDOG=y
159CONFIG_FB=y
160CONFIG_FB_ARMCLCD=y
161CONFIG_FRAMEBUFFER_CONSOLE=y
162CONFIG_LOGO=y
163# CONFIG_LOGO_LINUX_MONO is not set
164# CONFIG_LOGO_LINUX_VGA16 is not set
165CONFIG_HID_A4TECH=y
166CONFIG_HID_APPLE=y
167CONFIG_HID_BELKIN=y
168CONFIG_HID_CHERRY=y
169CONFIG_HID_CHICONY=y
170CONFIG_HID_CYPRESS=y
171CONFIG_HID_DRAGONRISE=y
172CONFIG_HID_EZKEY=y
173CONFIG_HID_KYE=y
174CONFIG_HID_GYRATION=y
175CONFIG_HID_TWINHAN=y
176CONFIG_HID_KENSINGTON=y
177CONFIG_HID_LOGITECH=y
178CONFIG_HID_MICROSOFT=y
179CONFIG_HID_MONTEREY=y
180CONFIG_HID_NTRIG=y
181CONFIG_HID_ORTEK=y
182CONFIG_HID_PANTHERLORD=y
183CONFIG_HID_PETALYNX=y
184CONFIG_HID_SAMSUNG=y
185CONFIG_HID_SUNPLUS=y
186CONFIG_HID_GREENASIA=y
187CONFIG_HID_SMARTJOYPLUS=y
188CONFIG_HID_TOPSEED=y
189CONFIG_HID_THRUSTMASTER=y
190CONFIG_HID_ZEROPLUS=y
191CONFIG_USB=y
192CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
193CONFIG_USB_EHCI_HCD=y
194# CONFIG_USB_EHCI_TT_NEWSCHED is not set
195CONFIG_USB_EHCI_HCD_AXXIA=y
196CONFIG_USB_STORAGE=y
197CONFIG_MMC=y
198CONFIG_MMC_ARMMMCI=y
199CONFIG_DMADEVICES=y
200CONFIG_PL330_DMA=y
201CONFIG_VIRT_DRIVERS=y
202CONFIG_VIRTIO_MMIO=y
203CONFIG_MAILBOX=y
204CONFIG_PL320_MBOX=y
205# CONFIG_IOMMU_SUPPORT is not set
206CONFIG_EXT2_FS=y
207CONFIG_EXT3_FS=y
208# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
209CONFIG_EXT4_FS=y
210CONFIG_AUTOFS4_FS=y
211CONFIG_FUSE_FS=y
212CONFIG_CUSE=y
213CONFIG_FSCACHE=y
214CONFIG_FSCACHE_STATS=y
215CONFIG_FSCACHE_HISTOGRAM=y
216CONFIG_FSCACHE_DEBUG=y
217CONFIG_FSCACHE_OBJECT_LIST=y
218CONFIG_CACHEFILES=y
219CONFIG_CACHEFILES_HISTOGRAM=y
220CONFIG_ISO9660_FS=y
221CONFIG_UDF_FS=y
222CONFIG_MSDOS_FS=y
223CONFIG_VFAT_FS=y
224CONFIG_NTFS_FS=y
225CONFIG_TMPFS=y
226CONFIG_JFFS2_FS=y
227CONFIG_CRAMFS=y
228CONFIG_NFS_FS=y
229CONFIG_NFS_V4=y
230CONFIG_ROOT_NFS=y
231CONFIG_NFS_FSCACHE=y
232CONFIG_SUNRPC_DEBUG=y
233CONFIG_NLS_CODEPAGE_437=y
234CONFIG_NLS_ISO8859_1=y
235CONFIG_PRINTK_TIME=y
236CONFIG_DEBUG_INFO=y
237CONFIG_DEBUG_FS=y
238CONFIG_MAGIC_SYSRQ=y
239# CONFIG_SCHED_DEBUG is not set
240CONFIG_RCU_CPU_STALL_TIMEOUT=60
241# CONFIG_FTRACE is not set
242CONFIG_DEBUG_USER=y
243CONFIG_CRYPTO_GCM=y
244CONFIG_CRYPTO_XCBC=y
245CONFIG_CRYPTO_SHA256=y
246# CONFIG_CRYPTO_ANSI_CPRNG is not set
247CONFIG_VIRTUALIZATION=y
248CONFIG_KVM=y
diff --git a/arch/arm/mach-axxia/Kconfig b/arch/arm/mach-axxia/Kconfig
new file mode 100644
index 000000000000..8be7e0ae1922
--- /dev/null
+++ b/arch/arm/mach-axxia/Kconfig
@@ -0,0 +1,16 @@
1config ARCH_AXXIA
2 bool "LSI Axxia platforms" if (ARCH_MULTI_V7 && ARM_LPAE)
3 select ARCH_DMA_ADDR_T_64BIT
4 select ARM_AMBA
5 select ARM_GIC
6 select ARM_TIMER_SP804
7 select HAVE_ARM_ARCH_TIMER
8 select MFD_SYSCON
9 select MIGHT_HAVE_PCI
10 select PCI_DOMAINS if PCI
11 select ZONE_DMA
12 help
13 This enables support for the LSI Axxia devices.
14
15 The LSI Axxia platforms require a Flattened Device Tree to be passed
16 to the kernel.
diff --git a/arch/arm/mach-axxia/Makefile b/arch/arm/mach-axxia/Makefile
new file mode 100644
index 000000000000..ec4f68b460c6
--- /dev/null
+++ b/arch/arm/mach-axxia/Makefile
@@ -0,0 +1,2 @@
1obj-y += axxia.o
2obj-$(CONFIG_SMP) += platsmp.o
diff --git a/arch/arm/mach-axxia/axxia.c b/arch/arm/mach-axxia/axxia.c
new file mode 100644
index 000000000000..19e5a1d95397
--- /dev/null
+++ b/arch/arm/mach-axxia/axxia.c
@@ -0,0 +1,28 @@
1/*
2 * Support for the LSI Axxia SoC devices based on ARM cores.
3 *
4 * Copyright (C) 2012 LSI
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16#include <linux/init.h>
17#include <asm/mach/arch.h>
18
19static const char *axxia_dt_match[] __initconst = {
20 "lsi,axm5516",
21 "lsi,axm5516-sim",
22 "lsi,axm5516-emu",
23 NULL
24};
25
26DT_MACHINE_START(AXXIA_DT, "LSI Axxia AXM55XX")
27 .dt_compat = axxia_dt_match,
28MACHINE_END
diff --git a/arch/arm/mach-axxia/platsmp.c b/arch/arm/mach-axxia/platsmp.c
new file mode 100644
index 000000000000..959d4df3d2b6
--- /dev/null
+++ b/arch/arm/mach-axxia/platsmp.c
@@ -0,0 +1,89 @@
1/*
2 * linux/arch/arm/mach-axxia/platsmp.c
3 *
4 * Copyright (C) 2012 LSI Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/init.h>
12#include <linux/io.h>
13#include <linux/smp.h>
14#include <linux/of.h>
15#include <linux/of_address.h>
16#include <asm/cacheflush.h>
17
18/* Syscon register offsets for releasing cores from reset */
19#define SC_CRIT_WRITE_KEY 0x1000
20#define SC_RST_CPU_HOLD 0x1010
21
22/*
23 * Write the kernel entry point for secondary CPUs to the specified address
24 */
25static void write_release_addr(u32 release_phys)
26{
27 u32 *virt = (u32 *) phys_to_virt(release_phys);
28 writel_relaxed(virt_to_phys(secondary_startup), virt);
29 /* Make sure this store is visible to other CPUs */
30 smp_wmb();
31 __cpuc_flush_dcache_area(virt, sizeof(u32));
32}
33
34static int axxia_boot_secondary(unsigned int cpu, struct task_struct *idle)
35{
36 struct device_node *syscon_np;
37 void __iomem *syscon;
38 u32 tmp;
39
40 syscon_np = of_find_compatible_node(NULL, NULL, "lsi,axxia-syscon");
41 if (!syscon_np)
42 return -ENOENT;
43
44 syscon = of_iomap(syscon_np, 0);
45 if (!syscon)
46 return -ENOMEM;
47
48 tmp = readl(syscon + SC_RST_CPU_HOLD);
49 writel(0xab, syscon + SC_CRIT_WRITE_KEY);
50 tmp &= ~(1 << cpu);
51 writel(tmp, syscon + SC_RST_CPU_HOLD);
52
53 return 0;
54}
55
56static void __init axxia_smp_prepare_cpus(unsigned int max_cpus)
57{
58 int cpu_count = 0;
59 int cpu;
60
61 /*
62 * Initialise the present map, which describes the set of CPUs actually
63 * populated at the present time.
64 */
65 for_each_possible_cpu(cpu) {
66 struct device_node *np;
67 u32 release_phys;
68
69 np = of_get_cpu_node(cpu, NULL);
70 if (!np)
71 continue;
72 if (of_property_read_u32(np, "cpu-release-addr", &release_phys))
73 continue;
74
75 if (cpu_count < max_cpus) {
76 set_cpu_present(cpu, true);
77 cpu_count++;
78 }
79
80 if (release_phys != 0)
81 write_release_addr(release_phys);
82 }
83}
84
85static struct smp_operations axxia_smp_ops __initdata = {
86 .smp_prepare_cpus = axxia_smp_prepare_cpus,
87 .smp_boot_secondary = axxia_boot_secondary,
88};
89CPU_METHOD_OF_DECLARE(axxia_smp, "lsi,syscon-release", &axxia_smp_ops);
diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
index fa0e4e057b99..49b46e6ca959 100644
--- a/drivers/power/reset/Kconfig
+++ b/drivers/power/reset/Kconfig
@@ -12,6 +12,14 @@ config POWER_RESET_AS3722
12 help 12 help
13 This driver supports turning off board via a ams AS3722 power-off. 13 This driver supports turning off board via a ams AS3722 power-off.
14 14
15config POWER_RESET_AXXIA
16 bool "LSI Axxia reset driver"
17 depends on POWER_RESET && ARCH_AXXIA
18 help
19 This driver supports restart for Axxia SoC.
20
21 Say Y if you have an Axxia family SoC.
22
15config POWER_RESET_GPIO 23config POWER_RESET_GPIO
16 bool "GPIO power-off driver" 24 bool "GPIO power-off driver"
17 depends on OF_GPIO && POWER_RESET 25 depends on OF_GPIO && POWER_RESET
diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
index a5b4a77d1a41..16c0516e5a19 100644
--- a/drivers/power/reset/Makefile
+++ b/drivers/power/reset/Makefile
@@ -1,4 +1,5 @@
1obj-$(CONFIG_POWER_RESET_AS3722) += as3722-poweroff.o 1obj-$(CONFIG_POWER_RESET_AS3722) += as3722-poweroff.o
2obj-$(CONFIG_POWER_RESET_AXXIA) += axxia-reset.o
2obj-$(CONFIG_POWER_RESET_GPIO) += gpio-poweroff.o 3obj-$(CONFIG_POWER_RESET_GPIO) += gpio-poweroff.o
3obj-$(CONFIG_POWER_RESET_MSM) += msm-poweroff.o 4obj-$(CONFIG_POWER_RESET_MSM) += msm-poweroff.o
4obj-$(CONFIG_POWER_RESET_QNAP) += qnap-poweroff.o 5obj-$(CONFIG_POWER_RESET_QNAP) += qnap-poweroff.o
diff --git a/drivers/power/reset/axxia-reset.c b/drivers/power/reset/axxia-reset.c
new file mode 100644
index 000000000000..3b1f8d601784
--- /dev/null
+++ b/drivers/power/reset/axxia-reset.c
@@ -0,0 +1,88 @@
1/*
2 * Reset driver for Axxia devices
3 *
4 * Copyright (C) 2014 LSI
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 and
8 * only version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16#include <linux/init.h>
17#include <linux/err.h>
18#include <linux/io.h>
19#include <linux/kernel.h>
20#include <linux/mfd/syscon.h>
21#include <linux/module.h>
22#include <linux/of.h>
23#include <linux/platform_device.h>
24#include <linux/reboot.h>
25#include <linux/regmap.h>
26
27#include <asm/system_misc.h>
28
29
30#define SC_CRIT_WRITE_KEY 0x1000
31#define SC_LATCH_ON_RESET 0x1004
32#define SC_RESET_CONTROL 0x1008
33#define RSTCTL_RST_ZERO (1<<3)
34#define RSTCTL_RST_FAB (1<<2)
35#define RSTCTL_RST_CHIP (1<<1)
36#define RSTCTL_RST_SYS (1<<0)
37#define SC_EFUSE_INT_STATUS 0x180c
38#define EFUSE_READ_DONE (1<<31)
39
40static struct regmap *syscon;
41
42static void do_axxia_restart(enum reboot_mode reboot_mode, const char *cmd)
43{
44 /* Access Key (0xab) */
45 regmap_write(syscon, SC_CRIT_WRITE_KEY, 0xab);
46 /* Select internal boot from 0xffff0000 */
47 regmap_write(syscon, SC_LATCH_ON_RESET, 0x00000040);
48 /* Assert ResetReadDone (to avoid hanging in boot ROM) */
49 regmap_write(syscon, SC_EFUSE_INT_STATUS, EFUSE_READ_DONE);
50 /* Assert chip reset */
51 regmap_update_bits(syscon, SC_RESET_CONTROL,
52 RSTCTL_RST_CHIP, RSTCTL_RST_CHIP);
53}
54
55static int axxia_reset_probe(struct platform_device *pdev)
56{
57 struct device *dev = &pdev->dev;
58
59 syscon = syscon_regmap_lookup_by_phandle(dev->of_node, "syscon");
60 if (IS_ERR(syscon)) {
61 pr_err("%s: syscon lookup failed\n", dev->of_node->name);
62 return PTR_ERR(syscon);
63 }
64
65 arm_pm_restart = do_axxia_restart;
66
67 return 0;
68}
69
70static const struct of_device_id of_axxia_reset_match[] = {
71 { .compatible = "lsi,axm55xx-reset", },
72 {},
73};
74MODULE_DEVICE_TABLE(of, of_axxia_reset_match);
75
76static struct platform_driver axxia_reset_driver = {
77 .probe = axxia_reset_probe,
78 .driver = {
79 .name = "axxia-reset",
80 .of_match_table = of_match_ptr(of_axxia_reset_match),
81 },
82};
83
84static int __init axxia_reset_init(void)
85{
86 return platform_driver_register(&axxia_reset_driver);
87}
88device_initcall(axxia_reset_init);
diff --git a/include/dt-bindings/clock/lsi,axm5516-clks.h b/include/dt-bindings/clock/lsi,axm5516-clks.h
new file mode 100644
index 000000000000..beb41ace5dd6
--- /dev/null
+++ b/include/dt-bindings/clock/lsi,axm5516-clks.h
@@ -0,0 +1,36 @@
1/*
2 * Copyright (c) 2014 LSI Corporation
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 */
8
9#ifndef _DT_BINDINGS_CLK_AXM5516_H
10#define _DT_BINDINGS_CLK_AXM5516_H
11
12#define AXXIA_CLK_FAB_PLL 0
13#define AXXIA_CLK_CPU_PLL 1
14#define AXXIA_CLK_SYS_PLL 2
15#define AXXIA_CLK_SM0_PLL 3
16#define AXXIA_CLK_SM1_PLL 4
17#define AXXIA_CLK_FAB_DIV 5
18#define AXXIA_CLK_SYS_DIV 6
19#define AXXIA_CLK_NRCP_DIV 7
20#define AXXIA_CLK_CPU0_DIV 8
21#define AXXIA_CLK_CPU1_DIV 9
22#define AXXIA_CLK_CPU2_DIV 10
23#define AXXIA_CLK_CPU3_DIV 11
24#define AXXIA_CLK_PER_DIV 12
25#define AXXIA_CLK_MMC_DIV 13
26#define AXXIA_CLK_FAB 14
27#define AXXIA_CLK_SYS 15
28#define AXXIA_CLK_NRCP 16
29#define AXXIA_CLK_CPU0 17
30#define AXXIA_CLK_CPU1 18
31#define AXXIA_CLK_CPU2 19
32#define AXXIA_CLK_CPU3 20
33#define AXXIA_CLK_PER 21
34#define AXXIA_CLK_MMC 22
35
36#endif
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-23 20:12:22 -0400