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authorPhilip Avinash <avinashphilip@ti.com>2013-04-10 08:12:41 -0400
committerSekhar Nori <nsekhar@ti.com>2013-04-15 02:09:14 -0400
commit64fa59c472c33beaea659484ff87c6bb7d0ea93f (patch)
treefb0fd57941783c0f8cc28603952891cfb5377717
parentdb4c8fa7c0214c83cbbc990ba630b3b613fcf7c5 (diff)
ARM: davinci: da850: add EHRPWM & ECAP DT node
Add da850 EHRPWM & ECAP DT node along with pin-mux details. Also adds OF_DEV_AUXDATA for EHRPWM & ECAP driver to use EHRPWM & ECAP clock. Signed-off-by: Philip Avinash <avinashphilip@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
-rw-r--r--arch/arm/boot/dts/da850.dtsi73
-rw-r--r--arch/arm/mach-davinci/da8xx-dt.c5
2 files changed, 78 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index 3ade343f13cc..b2ae730c7c32 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -71,6 +71,49 @@
71 0x28 0x00222222 0x00ffffff 71 0x28 0x00222222 0x00ffffff
72 >; 72 >;
73 }; 73 };
74 ehrpwm0a_pins: pinmux_ehrpwm0a_pins {
75 pinctrl-single,bits = <
76 /* EPWM0A */
77 0xc 0x00000002 0x0000000f
78 >;
79 };
80 ehrpwm0b_pins: pinmux_ehrpwm0b_pins {
81 pinctrl-single,bits = <
82 /* EPWM0B */
83 0xc 0x00000020 0x000000f0
84 >;
85 };
86 ehrpwm1a_pins: pinmux_ehrpwm1a_pins {
87 pinctrl-single,bits = <
88 /* EPWM1A */
89 0x14 0x00000002 0x0000000f
90 >;
91 };
92 ehrpwm1b_pins: pinmux_ehrpwm1b_pins {
93 pinctrl-single,bits = <
94 /* EPWM1B */
95 0x14 0x00000020 0x000000f0
96 >;
97 };
98 ecap0_pins: pinmux_ecap0_pins {
99 pinctrl-single,bits = <
100 /* ECAP0_APWM0 */
101 0x8 0x20000000 0xf0000000
102 >;
103 };
104 ecap1_pins: pinmux_ecap1_pins {
105 pinctrl-single,bits = <
106 /* ECAP1_APWM1 */
107 0x4 0x40000000 0xf0000000
108 >;
109 };
110 ecap2_pins: pinmux_ecap2_pins {
111 pinctrl-single,bits = <
112 /* ECAP2_APWM2 */
113 0x4 0x00000004 0x0000000f
114 >;
115 };
116
74 }; 117 };
75 serial0: serial@1c42000 { 118 serial0: serial@1c42000 {
76 compatible = "ns16550a"; 119 compatible = "ns16550a";
@@ -122,6 +165,36 @@
122 interrupts = <16>; 165 interrupts = <16>;
123 status = "disabled"; 166 status = "disabled";
124 }; 167 };
168 ehrpwm0: ehrpwm@01f00000 {
169 compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm";
170 #pwm-cells = <3>;
171 reg = <0x300000 0x2000>;
172 status = "disabled";
173 };
174 ehrpwm1: ehrpwm@01f02000 {
175 compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm";
176 #pwm-cells = <3>;
177 reg = <0x302000 0x2000>;
178 status = "disabled";
179 };
180 ecap0: ecap@01f06000 {
181 compatible = "ti,da850-ecap", "ti,am33xx-ecap";
182 #pwm-cells = <3>;
183 reg = <0x306000 0x80>;
184 status = "disabled";
185 };
186 ecap1: ecap@01f07000 {
187 compatible = "ti,da850-ecap", "ti,am33xx-ecap";
188 #pwm-cells = <3>;
189 reg = <0x307000 0x80>;
190 status = "disabled";
191 };
192 ecap2: ecap@01f08000 {
193 compatible = "ti,da850-ecap", "ti,am33xx-ecap";
194 #pwm-cells = <3>;
195 reg = <0x308000 0x80>;
196 status = "disabled";
197 };
125 }; 198 };
126 nand_cs3@62000000 { 199 nand_cs3@62000000 {
127 compatible = "ti,davinci-nand"; 200 compatible = "ti,davinci-nand";
diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c
index d83de8f8fa6b..05bb9a27dff1 100644
--- a/arch/arm/mach-davinci/da8xx-dt.c
+++ b/arch/arm/mach-davinci/da8xx-dt.c
@@ -41,6 +41,11 @@ struct of_dev_auxdata da850_auxdata_lookup[] __initdata = {
41 OF_DEV_AUXDATA("ti,davinci-i2c", 0x01c22000, "i2c_davinci.1", NULL), 41 OF_DEV_AUXDATA("ti,davinci-i2c", 0x01c22000, "i2c_davinci.1", NULL),
42 OF_DEV_AUXDATA("ti,davinci-wdt", 0x01c21000, "watchdog", NULL), 42 OF_DEV_AUXDATA("ti,davinci-wdt", 0x01c21000, "watchdog", NULL),
43 OF_DEV_AUXDATA("ti,da830-mmc", 0x01c40000, "da830-mmc.0", NULL), 43 OF_DEV_AUXDATA("ti,da830-mmc", 0x01c40000, "da830-mmc.0", NULL),
44 OF_DEV_AUXDATA("ti,da850-ehrpwm", 0x01f00000, "ehrpwm", NULL),
45 OF_DEV_AUXDATA("ti,da850-ehrpwm", 0x01f02000, "ehrpwm", NULL),
46 OF_DEV_AUXDATA("ti,da850-ecap", 0x01f06000, "ecap", NULL),
47 OF_DEV_AUXDATA("ti,da850-ecap", 0x01f07000, "ecap", NULL),
48 OF_DEV_AUXDATA("ti,da850-ecap", 0x01f08000, "ecap", NULL),
44 {} 49 {}
45}; 50};
46 51