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authorLuis R. Rodriguez <lrodriguez@atheros.com>2009-10-07 16:22:19 -0400
committerJohn W. Linville <linville@tuxdriver.com>2009-10-27 16:47:47 -0400
commit6226811f4eec35c509b931ac900ac074336103f5 (patch)
tree6c6c059d360c9291ab4d73daa9e2ff4f80922ec5
parentb57df129aaf65819f4eb80c2a5be3765509e9d23 (diff)
ath9k_hw: run ath9k_hw_9271_pa_cal() initial calibration
The PA calibration for ar9271 ath9k_hw_9271_pa_cal() can run during reset or initial calibration, update the PA calibration to account for that and initialize PA calibration variables for both conditions. Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r--drivers/net/wireless/ath/ath9k/calib.c25
1 files changed, 18 insertions, 7 deletions
diff --git a/drivers/net/wireless/ath/ath9k/calib.c b/drivers/net/wireless/ath/ath9k/calib.c
index 7aa3d1d8ec6f..551f8801459f 100644
--- a/drivers/net/wireless/ath/ath9k/calib.c
+++ b/drivers/net/wireless/ath/ath9k/calib.c
@@ -813,7 +813,7 @@ static void ath9k_olc_temp_compensation(struct ath_hw *ah)
813 } 813 }
814} 814}
815 815
816static void ath9k_hw_9271_pa_cal(struct ath_hw *ah) 816static void ath9k_hw_9271_pa_cal(struct ath_hw *ah, bool is_reset)
817{ 817{
818 u32 regVal; 818 u32 regVal;
819 unsigned int i; 819 unsigned int i;
@@ -889,10 +889,19 @@ static void ath9k_hw_9271_pa_cal(struct ath_hw *ah)
889 REG_WRITE(ah, 0x7834, regVal); 889 REG_WRITE(ah, 0x7834, regVal);
890 } 890 }
891 891
892 /* Empirical offset correction */ 892 regVal = (regVal >>20) & 0x7f;
893#if 0 893
894 REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9271_AN_RF2G6_OFFS, 0x20); 894 /* Update PA cal info */
895#endif 895 if ((!is_reset) && (ah->pacal_info.prev_offset == regVal)) {
896 if (ah->pacal_info.max_skipcount < MAX_PACAL_SKIPCOUNT)
897 ah->pacal_info.max_skipcount =
898 2 * ah->pacal_info.max_skipcount;
899 ah->pacal_info.skipcount = ah->pacal_info.max_skipcount;
900 } else {
901 ah->pacal_info.max_skipcount = 1;
902 ah->pacal_info.skipcount = 0;
903 ah->pacal_info.prev_offset = regVal;
904 }
896 905
897 regVal = REG_READ(ah, 0x7834); 906 regVal = REG_READ(ah, 0x7834);
898 regVal |= 0x1; 907 regVal |= 0x1;
@@ -1043,7 +1052,7 @@ bool ath9k_hw_calibrate(struct ath_hw *ah, struct ath9k_channel *chan,
1043 if (longcal) { 1052 if (longcal) {
1044 /* Do periodic PAOffset Cal */ 1053 /* Do periodic PAOffset Cal */
1045 if (AR_SREV_9271(ah)) 1054 if (AR_SREV_9271(ah))
1046 ath9k_hw_9271_pa_cal(ah); 1055 ath9k_hw_9271_pa_cal(ah, false);
1047 else if (AR_SREV_9285_11_OR_LATER(ah)) { 1056 else if (AR_SREV_9285_11_OR_LATER(ah)) {
1048 if (!ah->pacal_info.skipcount) 1057 if (!ah->pacal_info.skipcount)
1049 ath9k_hw_9285_pa_cal(ah, false); 1058 ath9k_hw_9285_pa_cal(ah, false);
@@ -1152,7 +1161,9 @@ bool ath9k_hw_init_cal(struct ath_hw *ah, struct ath9k_channel *chan)
1152 } 1161 }
1153 1162
1154 /* Do PA Calibration */ 1163 /* Do PA Calibration */
1155 if (AR_SREV_9285_11_OR_LATER(ah)) 1164 if (AR_SREV_9271(ah))
1165 ath9k_hw_9271_pa_cal(ah, true);
1166 else if (AR_SREV_9285_11_OR_LATER(ah))
1156 ath9k_hw_9285_pa_cal(ah, true); 1167 ath9k_hw_9285_pa_cal(ah, true);
1157 1168
1158 /* Do NF Calibration after DC offset and other calibrations */ 1169 /* Do NF Calibration after DC offset and other calibrations */