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authorKevin Hilman <khilman@linaro.org>2013-08-22 11:25:10 -0400
committerKevin Hilman <khilman@linaro.org>2013-08-22 11:25:36 -0400
commit5f5cc5cd7ce253e1d24be21dc07a430cb33a1529 (patch)
tree9c291e7e37b1bd4b1d6491f1904c1d875cf799f5
parent656d79cafc88137c87c0f6ac85080ce5dae2234b (diff)
parent6f9d02a056fff8e965da0f940a09d4c39a4fe80a (diff)
Merge tag 'samsung-dt-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt
From Kukjin Kim: Samsung Exynos DT updates for v3.12 - update codec, pmic, usb hub for Arndale - add exynos4412-trats 2 board dt - update camera, spi, sensor for Trats2 - update fimc, sensor for Trats - add support tmu for exynos5440 - add support g2d for exynos5250 - correct camera pinctrl for exynos4x12 - add support camera subsystem for exynos4 - add support basic pm domain, fimd, dp for exynos5420 - add support secure-firmware for OrigenQuad - update mfc and add support mfc for exynos5420 - add usb host node for exynos4 * tag 'samsung-dt-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (38 commits) ARM: dts: Add USB host node for Exynos4 ARM: dts: add audio clock controller for exynos5420 ARM: dts: Correct the /include entry on exynos5420 dtsi file ARM: dts: Add MFC node for exynos 5420 ARM: dts: Update 5250 MFC node ARM: dts: Remove unsused MFC clock from exynos4 ARM: dts: Update clocks entry in MFC binding documentation ARM: dts: Hook up internal PHY on Arndale ARM: dts: Enable USB hub on Arndale ARM: dts: Add secure-firmware boot support for OrigenQaud board ARM: dts: Add pin state information for DP HPD support to Exynos5420 ARM: dts: Add DP controller DT node to exynos5420 SoC ARM: dts: Update DP controller DT Node for Exynos5 based SoCs ARM: dts: Add FIMD DT node to exynos5420 DTS files ARM: dts: Add basic PM domains for EXYNOS5420 ARM: dts: Update FIMD DT node for Exynos5 SoCs ARM: dts: Move display-timing information inside FIMD DT node for exynos5250 ARM: dts: Add S5K5BA sensor regulator definitions for Trats board ARM: dts: Add Exynos4210 SoC camera port pinctrl nodes ARM: dts: Add FIMC nodes for Exynos4210 Trats board ... Signed-off-by: Kevin Hilman <khilman@linaro.org>
Diffstat
-rw-r--r--Documentation/devicetree/bindings/media/s5p-mfc.txt10
-rw-r--r--arch/arm/boot/dts/Makefile5
-rw-r--r--arch/arm/boot/dts/exynos4.dtsi122
-rw-r--r--arch/arm/boot/dts/exynos4210-pinctrl.dtsi23
-rw-r--r--arch/arm/boot/dts/exynos4210-trats.dts100
-rw-r--r--arch/arm/boot/dts/exynos4210.dtsi30
-rw-r--r--arch/arm/boot/dts/exynos4412-origen.dts5
-rw-r--r--arch/arm/boot/dts/exynos4412-trats2.dts579
-rw-r--r--arch/arm/boot/dts/exynos4x12-pinctrl.dtsi61
-rw-r--r--arch/arm/boot/dts/exynos4x12.dtsi103
-rw-r--r--arch/arm/boot/dts/exynos5.dtsi19
-rw-r--r--arch/arm/boot/dts/exynos5250-arndale.dts105
-rw-r--r--arch/arm/boot/dts/exynos5250-smdk5250.dts32
-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi38
-rw-r--r--arch/arm/boot/dts/exynos5420-pinctrl.dtsi7
-rw-r--r--arch/arm/boot/dts/exynos5420-smdk5420.dts31
-rw-r--r--arch/arm/boot/dts/exynos5420.dtsi75
-rw-r--r--arch/arm/boot/dts/exynos5440.dtsi27
18 files changed, 1288 insertions, 84 deletions
diff --git a/Documentation/devicetree/bindings/media/s5p-mfc.txt b/Documentation/devicetree/bindings/media/s5p-mfc.txt
index df37b0230c75..d75c3e589d43 100644
--- a/Documentation/devicetree/bindings/media/s5p-mfc.txt
+++ b/Documentation/devicetree/bindings/media/s5p-mfc.txt
@@ -15,9 +15,9 @@ Required properties:
15 mapped region. 15 mapped region.
16 16
17 - interrupts : MFC interrupt number to the CPU. 17 - interrupts : MFC interrupt number to the CPU.
18 - clocks : from common clock binding: handle to mfc clocks. 18 - clocks : from common clock binding: handle to mfc clock.
19 - clock-names : from common clock binding: must contain "sclk_mfc" and "mfc", 19 - clock-names : from common clock binding: must contain "mfc",
20 corresponding to entries in the clocks property. 20 corresponding to entry in the clocks property.
21 21
22 - samsung,mfc-r : Base address of the first memory bank used by MFC 22 - samsung,mfc-r : Base address of the first memory bank used by MFC
23 for DMA contiguous memory allocation and its size. 23 for DMA contiguous memory allocation and its size.
@@ -37,8 +37,8 @@ mfc: codec@13400000 {
37 reg = <0x13400000 0x10000>; 37 reg = <0x13400000 0x10000>;
38 interrupts = <0 94 0>; 38 interrupts = <0 94 0>;
39 samsung,power-domain = <&pd_mfc>; 39 samsung,power-domain = <&pd_mfc>;
40 clocks = <&clock 170>, <&clock 273>; 40 clocks = <&clock 273>;
41 clock-names = "sclk_mfc", "mfc"; 41 clock-names = "mfc";
42}; 42};
43 43
44Board specific DT entry: 44Board specific DT entry:
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index e6ca771b0e4c..34d317ecff18 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -53,13 +53,14 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
53 exynos4210-trats.dtb \ 53 exynos4210-trats.dtb \
54 exynos4210-universal_c210.dtb \ 54 exynos4210-universal_c210.dtb \
55 exynos4412-odroidx.dtb \ 55 exynos4412-odroidx.dtb \
56 exynos4412-smdk4412.dtb \
57 exynos4412-origen.dtb \ 56 exynos4412-origen.dtb \
57 exynos4412-smdk4412.dtb \
58 exynos4412-trats2.dtb \
58 exynos5250-arndale.dtb \ 59 exynos5250-arndale.dtb \
59 exynos5440-sd5v1.dtb \
60 exynos5250-smdk5250.dtb \ 60 exynos5250-smdk5250.dtb \
61 exynos5250-snow.dtb \ 61 exynos5250-snow.dtb \
62 exynos5420-smdk5420.dtb \ 62 exynos5420-smdk5420.dtb \
63 exynos5440-sd5v1.dtb \
63 exynos5440-ssdk5440.dtb 64 exynos5440-ssdk5440.dtb
64dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb \ 65dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb \
65 ecx-2000.dtb 66 ecx-2000.dtb
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 3f94fe8e3706..93c250139159 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -36,6 +36,12 @@
36 i2c5 = &i2c_5; 36 i2c5 = &i2c_5;
37 i2c6 = &i2c_6; 37 i2c6 = &i2c_6;
38 i2c7 = &i2c_7; 38 i2c7 = &i2c_7;
39 csis0 = &csis_0;
40 csis1 = &csis_1;
41 fimc0 = &fimc_0;
42 fimc1 = &fimc_1;
43 fimc2 = &fimc_2;
44 fimc3 = &fimc_3;
39 }; 45 };
40 46
41 chipid@10000000 { 47 chipid@10000000 {
@@ -92,6 +98,88 @@
92 reg = <0x10010000 0x400>; 98 reg = <0x10010000 0x400>;
93 }; 99 };
94 100
101 camera {
102 compatible = "samsung,fimc", "simple-bus";
103 status = "disabled";
104 #address-cells = <1>;
105 #size-cells = <1>;
106 ranges;
107
108 clock_cam: clock-controller {
109 #clock-cells = <1>;
110 };
111
112 fimc_0: fimc@11800000 {
113 compatible = "samsung,exynos4210-fimc";
114 reg = <0x11800000 0x1000>;
115 interrupts = <0 84 0>;
116 clocks = <&clock 256>, <&clock 128>;
117 clock-names = "fimc", "sclk_fimc";
118 samsung,power-domain = <&pd_cam>;
119 samsung,sysreg = <&sys_reg>;
120 status = "disabled";
121 };
122
123 fimc_1: fimc@11810000 {
124 compatible = "samsung,exynos4210-fimc";
125 reg = <0x11810000 0x1000>;
126 interrupts = <0 85 0>;
127 clocks = <&clock 257>, <&clock 129>;
128 clock-names = "fimc", "sclk_fimc";
129 samsung,power-domain = <&pd_cam>;
130 samsung,sysreg = <&sys_reg>;
131 status = "disabled";
132 };
133
134 fimc_2: fimc@11820000 {
135 compatible = "samsung,exynos4210-fimc";
136 reg = <0x11820000 0x1000>;
137 interrupts = <0 86 0>;
138 clocks = <&clock 258>, <&clock 130>;
139 clock-names = "fimc", "sclk_fimc";
140 samsung,power-domain = <&pd_cam>;
141 samsung,sysreg = <&sys_reg>;
142 status = "disabled";
143 };
144
145 fimc_3: fimc@11830000 {
146 compatible = "samsung,exynos4210-fimc";
147 reg = <0x11830000 0x1000>;
148 interrupts = <0 87 0>;
149 clocks = <&clock 259>, <&clock 131>;
150 clock-names = "fimc", "sclk_fimc";
151 samsung,power-domain = <&pd_cam>;
152 samsung,sysreg = <&sys_reg>;
153 status = "disabled";
154 };
155
156 csis_0: csis@11880000 {
157 compatible = "samsung,exynos4210-csis";
158 reg = <0x11880000 0x4000>;
159 interrupts = <0 78 0>;
160 clocks = <&clock 260>, <&clock 134>;
161 clock-names = "csis", "sclk_csis";
162 bus-width = <4>;
163 samsung,power-domain = <&pd_cam>;
164 status = "disabled";
165 #address-cells = <1>;
166 #size-cells = <0>;
167 };
168
169 csis_1: csis@11890000 {
170 compatible = "samsung,exynos4210-csis";
171 reg = <0x11890000 0x4000>;
172 interrupts = <0 80 0>;
173 clocks = <&clock 261>, <&clock 135>;
174 clock-names = "csis", "sclk_csis";
175 bus-width = <2>;
176 samsung,power-domain = <&pd_cam>;
177 status = "disabled";
178 #address-cells = <1>;
179 #size-cells = <0>;
180 };
181 };
182
95 watchdog@10060000 { 183 watchdog@10060000 {
96 compatible = "samsung,s3c2410-wdt"; 184 compatible = "samsung,s3c2410-wdt";
97 reg = <0x10060000 0x100>; 185 reg = <0x10060000 0x100>;
@@ -155,13 +243,31 @@
155 status = "disabled"; 243 status = "disabled";
156 }; 244 };
157 245
246 ehci@12580000 {
247 compatible = "samsung,exynos4210-ehci";
248 reg = <0x12580000 0x100>;
249 interrupts = <0 70 0>;
250 clocks = <&clock 304>;
251 clock-names = "usbhost";
252 status = "disabled";
253 };
254
255 ohci@12590000 {
256 compatible = "samsung,exynos4210-ohci";
257 reg = <0x12590000 0x100>;
258 interrupts = <0 70 0>;
259 clocks = <&clock 304>;
260 clock-names = "usbhost";
261 status = "disabled";
262 };
263
158 mfc: codec@13400000 { 264 mfc: codec@13400000 {
159 compatible = "samsung,mfc-v5"; 265 compatible = "samsung,mfc-v5";
160 reg = <0x13400000 0x10000>; 266 reg = <0x13400000 0x10000>;
161 interrupts = <0 94 0>; 267 interrupts = <0 94 0>;
162 samsung,power-domain = <&pd_mfc>; 268 samsung,power-domain = <&pd_mfc>;
163 clocks = <&clock 170>, <&clock 273>; 269 clocks = <&clock 273>;
164 clock-names = "sclk_mfc", "mfc"; 270 clock-names = "mfc";
165 status = "disabled"; 271 status = "disabled";
166 }; 272 };
167 273
@@ -297,8 +403,8 @@
297 compatible = "samsung,exynos4210-spi"; 403 compatible = "samsung,exynos4210-spi";
298 reg = <0x13920000 0x100>; 404 reg = <0x13920000 0x100>;
299 interrupts = <0 66 0>; 405 interrupts = <0 66 0>;
300 tx-dma-channel = <&pdma0 7>; /* preliminary */ 406 dmas = <&pdma0 7>, <&pdma0 6>;
301 rx-dma-channel = <&pdma0 6>; /* preliminary */ 407 dma-names = "tx", "rx";
302 #address-cells = <1>; 408 #address-cells = <1>;
303 #size-cells = <0>; 409 #size-cells = <0>;
304 clocks = <&clock 327>, <&clock 159>; 410 clocks = <&clock 327>, <&clock 159>;
@@ -312,8 +418,8 @@
312 compatible = "samsung,exynos4210-spi"; 418 compatible = "samsung,exynos4210-spi";
313 reg = <0x13930000 0x100>; 419 reg = <0x13930000 0x100>;
314 interrupts = <0 67 0>; 420 interrupts = <0 67 0>;
315 tx-dma-channel = <&pdma1 7>; /* preliminary */ 421 dmas = <&pdma1 7>, <&pdma1 6>;
316 rx-dma-channel = <&pdma1 6>; /* preliminary */ 422 dma-names = "tx", "rx";
317 #address-cells = <1>; 423 #address-cells = <1>;
318 #size-cells = <0>; 424 #size-cells = <0>;
319 clocks = <&clock 328>, <&clock 160>; 425 clocks = <&clock 328>, <&clock 160>;
@@ -327,8 +433,8 @@
327 compatible = "samsung,exynos4210-spi"; 433 compatible = "samsung,exynos4210-spi";
328 reg = <0x13940000 0x100>; 434 reg = <0x13940000 0x100>;
329 interrupts = <0 68 0>; 435 interrupts = <0 68 0>;
330 tx-dma-channel = <&pdma0 9>; /* preliminary */ 436 dmas = <&pdma0 9>, <&pdma0 8>;
331 rx-dma-channel = <&pdma0 8>; /* preliminary */ 437 dma-names = "tx", "rx";
332 #address-cells = <1>; 438 #address-cells = <1>;
333 #size-cells = <0>; 439 #size-cells = <0>;
334 clocks = <&clock 329>, <&clock 161>; 440 clocks = <&clock 329>, <&clock 161>;
diff --git a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
index 553bceae8967..a7c212891674 100644
--- a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
@@ -797,6 +797,29 @@
797 samsung,pin-pud = <0>; 797 samsung,pin-pud = <0>;
798 samsung,pin-drv = <0>; 798 samsung,pin-drv = <0>;
799 }; 799 };
800
801 cam_port_a_io: cam-port-a-io {
802 samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3",
803 "gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7",
804 "gpj1-0", "gpj1-1", "gpj1-2", "gpj1-4";
805 samsung,pin-function = <2>;
806 samsung,pin-pud = <0>;
807 samsung,pin-drv = <0>;
808 };
809
810 cam_port_a_clk_active: cam-port-a-clk-active {
811 samsung,pins = "gpj1-3";
812 samsung,pin-function = <2>;
813 samsung,pin-pud = <0>;
814 samsung,pin-drv = <3>;
815 };
816
817 cam_port_a_clk_idle: cam-port-a-clk-idle {
818 samsung,pins = "gpj1-3";
819 samsung,pin-function = <0>;
820 samsung,pin-pud = <1>;
821 samsung,pin-drv = <0>;
822 };
800 }; 823 };
801 824
802 pinctrl@03860000 { 825 pinctrl@03860000 {
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts
index 94eebffe3044..1c164f234bcc 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -30,13 +30,62 @@
30 bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rootwait earlyprintk panic=5"; 30 bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rootwait earlyprintk panic=5";
31 }; 31 };
32 32
33 vemmc_reg: voltage-regulator@0 { 33 regulators {
34 compatible = "regulator-fixed"; 34 compatible = "simple-bus";
35 regulator-name = "VMEM_VDD_2.8V"; 35
36 regulator-min-microvolt = <2800000>; 36 vemmc_reg: regulator-0 {
37 regulator-max-microvolt = <2800000>; 37 compatible = "regulator-fixed";
38 gpio = <&gpk0 2 0>; 38 regulator-name = "VMEM_VDD_2.8V";
39 enable-active-high; 39 regulator-min-microvolt = <2800000>;
40 regulator-max-microvolt = <2800000>;
41 gpio = <&gpk0 2 0>;
42 enable-active-high;
43 };
44
45 tsp_reg: regulator-1 {
46 compatible = "regulator-fixed";
47 regulator-name = "TSP_FIXED_VOLTAGES";
48 regulator-min-microvolt = <2800000>;
49 regulator-max-microvolt = <2800000>;
50 gpio = <&gpl0 3 0>;
51 enable-active-high;
52 };
53
54 cam_af_28v_reg: regulator-2 {
55 compatible = "regulator-fixed";
56 regulator-name = "8M_AF_2.8V_EN";
57 regulator-min-microvolt = <2800000>;
58 regulator-max-microvolt = <2800000>;
59 gpio = <&gpk1 1 0>;
60 enable-active-high;
61 };
62
63 cam_io_en_reg: regulator-3 {
64 compatible = "regulator-fixed";
65 regulator-name = "CAM_IO_EN";
66 regulator-min-microvolt = <2800000>;
67 regulator-max-microvolt = <2800000>;
68 gpio = <&gpe2 1 0>;
69 enable-active-high;
70 };
71
72 cam_io_12v_reg: regulator-4 {
73 compatible = "regulator-fixed";
74 regulator-name = "8M_1.2V_EN";
75 regulator-min-microvolt = <1200000>;
76 regulator-max-microvolt = <1200000>;
77 gpio = <&gpe2 5 0>;
78 enable-active-high;
79 };
80
81 vt_core_15v_reg: regulator-5 {
82 compatible = "regulator-fixed";
83 regulator-name = "VT_CORE_1.5V";
84 regulator-min-microvolt = <1500000>;
85 regulator-max-microvolt = <1500000>;
86 gpio = <&gpe2 2 0>;
87 enable-active-high;
88 };
40 }; 89 };
41 90
42 sdhci_emmc: sdhci@12510000 { 91 sdhci_emmc: sdhci@12510000 {
@@ -97,15 +146,6 @@
97 }; 146 };
98 }; 147 };
99 148
100 tsp_reg: voltage-regulator {
101 compatible = "regulator-fixed";
102 regulator-name = "TSP_FIXED_VOLTAGES";
103 regulator-min-microvolt = <2800000>;
104 regulator-max-microvolt = <2800000>;
105 gpio = <&gpl0 3 0>;
106 enable-active-high;
107 };
108
109 i2c@13890000 { 149 i2c@13890000 {
110 samsung,i2c-sda-delay = <100>; 150 samsung,i2c-sda-delay = <100>;
111 samsung,i2c-slave-addr = <0x10>; 151 samsung,i2c-slave-addr = <0x10>;
@@ -218,6 +258,12 @@
218 regulator-always-on; 258 regulator-always-on;
219 }; 259 };
220 260
261 vtcam_reg: LDO12 {
262 regulator-name = "VT_CAM_1.8V";
263 regulator-min-microvolt = <1800000>;
264 regulator-max-microvolt = <1800000>;
265 };
266
221 vcclcd_reg: LDO13 { 267 vcclcd_reg: LDO13 {
222 regulator-name = "VCC_3.3V_LCD"; 268 regulator-name = "VCC_3.3V_LCD";
223 regulator-min-microvolt = <3300000>; 269 regulator-min-microvolt = <3300000>;
@@ -301,4 +347,26 @@
301 clock-frequency = <24000000>; 347 clock-frequency = <24000000>;
302 }; 348 };
303 }; 349 };
350
351 camera {
352 pinctrl-names = "default";
353 pinctrl-0 = <>;
354 status = "okay";
355
356 fimc_0: fimc@11800000 {
357 status = "okay";
358 };
359
360 fimc_1: fimc@11810000 {
361 status = "okay";
362 };
363
364 fimc_2: fimc@11820000 {
365 status = "okay";
366 };
367
368 fimc_3: fimc@11830000 {
369 status = "okay";
370 };
371 };
304}; 372};
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index b7f358a93bcb..ef8c2a5d2d7f 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -125,4 +125,34 @@
125 clock-names = "sclk_fimg2d", "fimg2d"; 125 clock-names = "sclk_fimg2d", "fimg2d";
126 status = "disabled"; 126 status = "disabled";
127 }; 127 };
128
129 camera {
130 clocks = <&clock 132>, <&clock 133>, <&clock 351>, <&clock 352>;
131 clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1";
132
133 fimc_0: fimc@11800000 {
134 samsung,pix-limits = <4224 8192 1920 4224>;
135 samsung,mainscaler-ext;
136 samsung,cam-if;
137 };
138
139 fimc_1: fimc@11810000 {
140 samsung,pix-limits = <4224 8192 1920 4224>;
141 samsung,mainscaler-ext;
142 samsung,cam-if;
143 };
144
145 fimc_2: fimc@11820000 {
146 samsung,pix-limits = <4224 8192 1920 4224>;
147 samsung,mainscaler-ext;
148 samsung,lcd-wb;
149 };
150
151 fimc_3: fimc@11830000 {
152 samsung,pix-limits = <1920 8192 1366 1920>;
153 samsung,rotators = <0>;
154 samsung,mainscaler-ext;
155 samsung,lcd-wb;
156 };
157 };
128}; 158};
diff --git a/arch/arm/boot/dts/exynos4412-origen.dts b/arch/arm/boot/dts/exynos4412-origen.dts
index 7993641cb32a..8768b03702e5 100644
--- a/arch/arm/boot/dts/exynos4412-origen.dts
+++ b/arch/arm/boot/dts/exynos4412-origen.dts
@@ -27,6 +27,11 @@
27 bootargs ="console=ttySAC2,115200"; 27 bootargs ="console=ttySAC2,115200";
28 }; 28 };
29 29
30 firmware@0203F000 {
31 compatible = "samsung,secure-firmware";
32 reg = <0x0203F000 0x1000>;
33 };
34
30 mmc_reg: voltage-regulator { 35 mmc_reg: voltage-regulator {
31 compatible = "regulator-fixed"; 36 compatible = "regulator-fixed";
32 regulator-name = "VMEM_VDD_2.8V"; 37 regulator-name = "VMEM_VDD_2.8V";
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts
new file mode 100644
index 000000000000..fb7b9ae5f399
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -0,0 +1,579 @@
1/*
2 * Samsung's Exynos4412 based Trats 2 board device tree source
3 *
4 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * Device tree source file for Samsung's Trats 2 board which is based on
8 * Samsung's Exynos4412 SoC.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15/dts-v1/;
16#include "exynos4412.dtsi"
17
18/ {
19 model = "Samsung Trats 2 based on Exynos4412";
20 compatible = "samsung,trats2", "samsung,exynos4412";
21
22 aliases {
23 i2c8 = &i2c_ak8975;
24 };
25
26 memory {
27 reg = <0x40000000 0x40000000>;
28 };
29
30 chosen {
31 bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rootwait earlyprintk panic=5";
32 };
33
34 firmware@0204F000 {
35 compatible = "samsung,secure-firmware";
36 reg = <0x0204F000 0x1000>;
37 };
38
39 fixed-rate-clocks {
40 xxti {
41 compatible = "samsung,clock-xxti", "fixed-clock";
42 clock-frequency = <0>;
43 };
44
45 xusbxti {
46 compatible = "samsung,clock-xusbxti", "fixed-clock";
47 clock-frequency = <24000000>;
48 };
49 };
50
51 regulators {
52 compatible = "simple-bus";
53 #address-cells = <1>;
54 #size-cells = <0>;
55
56 vemmc_reg: regulator-0 {
57 compatible = "regulator-fixed";
58 regulator-name = "VMEM_VDD_2.8V";
59 regulator-min-microvolt = <2800000>;
60 regulator-max-microvolt = <2800000>;
61 gpio = <&gpk0 2 0>;
62 enable-active-high;
63 };
64
65 cam_io_reg: voltage-regulator-1 {
66 compatible = "regulator-fixed";
67 regulator-name = "CAM_SENSOR_A";
68 regulator-min-microvolt = <2800000>;
69 regulator-max-microvolt = <2800000>;
70 gpio = <&gpm0 2 0>;
71 enable-active-high;
72 };
73
74 /* More to come */
75 };
76
77 gpio-keys {
78 compatible = "gpio-keys";
79
80 key-down {
81 interrupt-parent = <&gpj1>;
82 interrupts = <2 0>;
83 gpios = <&gpj1 2 1>;
84 linux,code = <114>;
85 label = "volume down";
86 debounce-interval = <10>;
87 };
88
89 key-up {
90 interrupt-parent = <&gpj1>;
91 interrupts = <1 0>;
92 gpios = <&gpj1 1 1>;
93 linux,code = <115>;
94 label = "volume up";
95 debounce-interval = <10>;
96 };
97
98 key-power {
99 interrupt-parent = <&gpx2>;
100 interrupts = <7 0>;
101 gpios = <&gpx2 7 1>;
102 linux,code = <116>;
103 label = "power";
104 debounce-interval = <10>;
105 gpio-key,wakeup;
106 };
107 };
108
109 i2c@13890000 {
110 samsung,i2c-sda-delay = <100>;
111 samsung,i2c-slave-addr = <0x10>;
112 samsung,i2c-max-bus-freq = <400000>;
113 pinctrl-0 = <&i2c3_bus>;
114 pinctrl-names = "default";
115 status = "okay";
116
117 mms114-touchscreen@48 {
118 compatible = "melfas,mms114";
119 reg = <0x48>;
120 interrupt-parent = <&gpm2>;
121 interrupts = <3 2>;
122 x-size = <720>;
123 y-size = <1280>;
124 avdd-supply = <&ldo23_reg>;
125 vdd-supply = <&ldo24_reg>;
126 };
127 };
128
129 i2c@138D0000 {
130 samsung,i2c-sda-delay = <100>;
131 samsung,i2c-slave-addr = <0x10>;
132 samsung,i2c-max-bus-freq = <100000>;
133 pinctrl-0 = <&i2c7_bus>;
134 pinctrl-names = "default";
135 status = "okay";
136
137 max77686_pmic@09 {
138 compatible = "maxim,max77686";
139 interrupt-parent = <&gpx0>;
140 interrupts = <7 0>;
141 reg = <0x09>;
142
143 voltage-regulators {
144 ldo1_reg: ldo1 {
145 regulator-compatible = "LDO1";
146 regulator-name = "VALIVE_1.0V_AP";
147 regulator-min-microvolt = <1000000>;
148 regulator-max-microvolt = <1000000>;
149 regulator-always-on;
150 regulator-mem-on;
151 };
152
153 ldo2_reg: ldo2 {
154 regulator-compatible = "LDO2";
155 regulator-name = "VM1M2_1.2V_AP";
156 regulator-min-microvolt = <1200000>;
157 regulator-max-microvolt = <1200000>;
158 regulator-always-on;
159 regulator-mem-on;
160 };
161
162 ldo3_reg: ldo3 {
163 regulator-compatible = "LDO3";
164 regulator-name = "VCC_1.8V_AP";
165 regulator-min-microvolt = <1800000>;
166 regulator-max-microvolt = <1800000>;
167 regulator-always-on;
168 regulator-mem-on;
169 };
170
171 ldo4_reg: ldo4 {
172 regulator-compatible = "LDO4";
173 regulator-name = "VCC_2.8V_AP";
174 regulator-min-microvolt = <2800000>;
175 regulator-max-microvolt = <2800000>;
176 regulator-always-on;
177 regulator-mem-on;
178 };
179
180 ldo5_reg: ldo5 {
181 regulator-compatible = "LDO5";
182 regulator-name = "VCC_1.8V_IO";
183 regulator-min-microvolt = <1800000>;
184 regulator-max-microvolt = <1800000>;
185 regulator-always-on;
186 regulator-mem-on;
187 };
188
189 ldo6_reg: ldo6 {
190 regulator-compatible = "LDO6";
191 regulator-name = "VMPLL_1.0V_AP";
192 regulator-min-microvolt = <1000000>;
193 regulator-max-microvolt = <1000000>;
194 regulator-always-on;
195 regulator-mem-on;
196 };
197
198 ldo7_reg: ldo7 {
199 regulator-compatible = "LDO7";
200 regulator-name = "VPLL_1.0V_AP";
201 regulator-min-microvolt = <1000000>;
202 regulator-max-microvolt = <1000000>;
203 regulator-always-on;
204 regulator-mem-on;
205 };
206
207 ldo8_reg: ldo8 {
208 regulator-compatible = "LDO8";
209 regulator-name = "VMIPI_1.0V";
210 regulator-min-microvolt = <1000000>;
211 regulator-max-microvolt = <1000000>;
212 regulator-mem-off;
213 };
214
215 ldo9_reg: ldo9 {
216 regulator-compatible = "LDO9";
217 regulator-name = "CAM_ISP_MIPI_1.2V";
218 regulator-min-microvolt = <1200000>;
219 regulator-max-microvolt = <1200000>;
220 regulator-mem-idle;
221 };
222
223 ldo10_reg: ldo10 {
224 regulator-compatible = "LDO10";
225 regulator-name = "VMIPI_1.8V";
226 regulator-min-microvolt = <1800000>;
227 regulator-max-microvolt = <1800000>;
228 regulator-mem-off;
229 };
230
231 ldo11_reg: ldo11 {
232 regulator-compatible = "LDO11";
233 regulator-name = "VABB1_1.95V";
234 regulator-min-microvolt = <1950000>;
235 regulator-max-microvolt = <1950000>;
236 regulator-always-on;
237 regulator-mem-off;
238 };
239
240 ldo12_reg: ldo12 {
241 regulator-compatible = "LDO12";
242 regulator-name = "VUOTG_3.0V";
243 regulator-min-microvolt = <3000000>;
244 regulator-max-microvolt = <3000000>;
245 regulator-mem-off;
246 };
247
248 ldo13_reg: ldo13 {
249 regulator-compatible = "LDO13";
250 regulator-name = "NFC_AVDD_1.8V";
251 regulator-min-microvolt = <1800000>;
252 regulator-max-microvolt = <1800000>;
253 regulator-mem-idle;
254 };
255
256 ldo14_reg: ldo14 {
257 regulator-compatible = "LDO14";
258 regulator-name = "VABB2_1.95V";
259 regulator-min-microvolt = <1950000>;
260 regulator-max-microvolt = <1950000>;
261 regulator-always-on;
262 regulator-mem-off;
263 };
264
265 ldo15_reg: ldo15 {
266 regulator-compatible = "LDO15";
267 regulator-name = "VHSIC_1.0V";
268 regulator-min-microvolt = <1000000>;
269 regulator-max-microvolt = <1000000>;
270 regulator-mem-off;
271 };
272
273 ldo16_reg: ldo16 {
274 regulator-compatible = "LDO16";
275 regulator-name = "VHSIC_1.8V";
276 regulator-min-microvolt = <1800000>;
277 regulator-max-microvolt = <1800000>;
278 regulator-mem-off;
279 };
280
281 ldo17_reg: ldo17 {
282 regulator-compatible = "LDO17";
283 regulator-name = "CAM_SENSOR_CORE_1.2V";
284 regulator-min-microvolt = <1200000>;
285 regulator-max-microvolt = <1200000>;
286 regulator-mem-idle;
287 };
288
289 ldo18_reg: ldo18 {
290 regulator-compatible = "LDO18";
291 regulator-name = "CAM_ISP_SEN_IO_1.8V";
292 regulator-min-microvolt = <1800000>;
293 regulator-max-microvolt = <1800000>;
294 regulator-mem-idle;
295 };
296
297 ldo19_reg: ldo19 {
298 regulator-compatible = "LDO19";
299 regulator-name = "VT_CAM_1.8V";
300 regulator-min-microvolt = <1800000>;
301 regulator-max-microvolt = <1800000>;
302 regulator-mem-idle;
303 };
304
305 ldo20_reg: ldo20 {
306 regulator-compatible = "LDO20";
307 regulator-name = "VDDQ_PRE_1.8V";
308 regulator-min-microvolt = <1800000>;
309 regulator-max-microvolt = <1800000>;
310 regulator-mem-idle;
311 };
312
313 ldo21_reg: ldo21 {
314 regulator-compatible = "LDO21";
315 regulator-name = "VTF_2.8V";
316 regulator-min-microvolt = <2800000>;
317 regulator-max-microvolt = <2800000>;
318 regulator-mem-idle;
319 };
320
321 ldo22_reg: ldo22 {
322 regulator-compatible = "LDO22";
323 regulator-name = "VMEM_VDD_2.8V";
324 regulator-min-microvolt = <2800000>;
325 regulator-max-microvolt = <2800000>;
326 regulator-always-on;
327 regulator-mem-off;
328 };
329
330 ldo23_reg: ldo23 {
331 regulator-compatible = "LDO23";
332 regulator-name = "TSP_AVDD_3.3V";
333 regulator-min-microvolt = <3300000>;
334 regulator-max-microvolt = <3300000>;
335 regulator-mem-idle;
336 };
337
338 ldo24_reg: ldo24 {
339 regulator-compatible = "LDO24";
340 regulator-name = "TSP_VDD_1.8V";
341 regulator-min-microvolt = <1800000>;
342 regulator-max-microvolt = <1800000>;
343 regulator-mem-idle;
344 };
345
346 ldo25_reg: ldo25 {
347 regulator-compatible = "LDO25";
348 regulator-name = "LCD_VCC_3.3V";
349 regulator-min-microvolt = <2800000>;
350 regulator-max-microvolt = <2800000>;
351 regulator-mem-idle;
352 };
353
354 ldo26_reg: ldo26 {
355 regulator-compatible = "LDO26";
356 regulator-name = "MOTOR_VCC_3.0V";
357 regulator-min-microvolt = <3000000>;
358 regulator-max-microvolt = <3000000>;
359 regulator-mem-idle;
360 };
361
362 buck1_reg: buck1 {
363 regulator-compatible = "BUCK1";
364 regulator-name = "vdd_mif";
365 regulator-min-microvolt = <850000>;
366 regulator-max-microvolt = <1100000>;
367 regulator-always-on;
368 regulator-boot-on;
369 regulator-mem-off;
370 };
371
372 buck2_reg: buck2 {
373 regulator-compatible = "BUCK2";
374 regulator-name = "vdd_arm";
375 regulator-min-microvolt = <850000>;
376 regulator-max-microvolt = <1500000>;
377 regulator-always-on;
378 regulator-boot-on;
379 regulator-mem-off;
380 };
381
382 buck3_reg: buck3 {
383 regulator-compatible = "BUCK3";
384 regulator-name = "vdd_int";
385 regulator-min-microvolt = <850000>;
386 regulator-max-microvolt = <1150000>;
387 regulator-always-on;
388 regulator-boot-on;
389 regulator-mem-off;
390 };
391
392 buck4_reg: buck4 {
393 regulator-compatible = "BUCK4";
394 regulator-name = "vdd_g3d";
395 regulator-min-microvolt = <850000>;
396 regulator-max-microvolt = <1150000>;
397 regulator-boot-on;
398 regulator-mem-off;
399 };
400
401 buck5_reg: buck5 {
402 regulator-compatible = "BUCK5";
403 regulator-name = "VMEM_1.2V_AP";
404 regulator-min-microvolt = <1200000>;
405 regulator-max-microvolt = <1200000>;
406 regulator-always-on;
407 };
408
409 buck6_reg: buck6 {
410 regulator-compatible = "BUCK6";
411 regulator-name = "VCC_SUB_1.35V";
412 regulator-min-microvolt = <1350000>;
413 regulator-max-microvolt = <1350000>;
414 regulator-always-on;
415 };
416
417 buck7_reg: buck7 {
418 regulator-compatible = "BUCK7";
419 regulator-name = "VCC_SUB_2.0V";
420 regulator-min-microvolt = <2000000>;
421 regulator-max-microvolt = <2000000>;
422 regulator-always-on;
423 };
424
425 buck8_reg: buck8 {
426 regulator-compatible = "BUCK8";
427 regulator-name = "VMEM_VDDF_3.0V";
428 regulator-min-microvolt = <2850000>;
429 regulator-max-microvolt = <2850000>;
430 regulator-always-on;
431 regulator-mem-off;
432 };
433
434 buck9_reg: buck9 {
435 regulator-compatible = "BUCK9";
436 regulator-name = "CAM_ISP_CORE_1.2V";
437 regulator-min-microvolt = <1000000>;
438 regulator-max-microvolt = <1200000>;
439 regulator-mem-off;
440 };
441 };
442 };
443 };
444
445 sdhci@12510000 {
446 bus-width = <8>;
447 non-removable;
448 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus8>;
449 pinctrl-names = "default";
450 vmmc-supply = <&vemmc_reg>;
451 status = "okay";
452 };
453
454 serial@13800000 {
455 status = "okay";
456 };
457
458 serial@13810000 {
459 status = "okay";
460 };
461
462 serial@13820000 {
463 status = "okay";
464 };
465
466 serial@13830000 {
467 status = "okay";
468 };
469
470 i2c_ak8975: i2c-gpio-0 {
471 compatible = "i2c-gpio";
472 gpios = <&gpy2 4 0>, <&gpy2 5 0>;
473 i2c-gpio,delay-us = <2>;
474 #address-cells = <1>;
475 #size-cells = <0>;
476 status = "okay";
477
478 ak8975@0c {
479 compatible = "ak,ak8975";
480 reg = <0x0c>;
481 gpios = <&gpj0 7 0>;
482 };
483 };
484
485 spi_1: spi@13930000 {
486 pinctrl-names = "default";
487 pinctrl-0 = <&spi1_bus>;
488 status = "okay";
489
490 s5c73m3_spi: s5c73m3 {
491 compatible = "samsung,s5c73m3";
492 spi-max-frequency = <50000000>;
493 reg = <0>;
494 controller-data {
495 cs-gpio = <&gpb 5 0>;
496 samsung,spi-feedback-delay = <2>;
497 };
498 };
499 };
500
501 camera {
502 pinctrl-0 = <&cam_port_b_clk_active>;
503 pinctrl-names = "default";
504 status = "okay";
505
506 fimc_0: fimc@11800000 {
507 status = "okay";
508 };
509
510 fimc_1: fimc@11810000 {
511 status = "okay";
512 };
513
514 fimc_2: fimc@11820000 {
515 status = "okay";
516 };
517
518 fimc_3: fimc@11830000 {
519 status = "okay";
520 };
521
522 csis_1: csis@11890000 {
523 vddcore-supply = <&ldo8_reg>;
524 vddio-supply = <&ldo10_reg>;
525 clock-frequency = <160000000>;
526 status = "okay";
527
528 /* Camera D (4) MIPI CSI-2 (CSIS1) */
529 port@4 {
530 reg = <4>;
531 csis1_ep: endpoint {
532 remote-endpoint = <&is_s5k6a3_ep>;
533 data-lanes = <1>;
534 samsung,csis-hs-settle = <18>;
535 samsung,csis-wclk;
536 };
537 };
538 };
539
540 fimc_lite_0: fimc-lite@12390000 {
541 status = "okay";
542 };
543
544 fimc_lite_1: fimc-lite@123A0000 {
545 status = "okay";
546 };
547
548 fimc-is@12000000 {
549 pinctrl-0 = <&fimc_is_uart>;
550 pinctrl-names = "default";
551 status = "okay";
552
553 i2c1_isp: i2c-isp@12140000 {
554 pinctrl-0 = <&fimc_is_i2c1>;
555 pinctrl-names = "default";
556
557 s5k6a3@10 {
558 compatible = "samsung,s5k6a3";
559 reg = <0x10>;
560 svdda-supply = <&cam_io_reg>;
561 svddio-supply = <&ldo19_reg>;
562 clock-frequency = <24000000>;
563 /* CAM_B_CLKOUT */
564 clocks = <&clock_cam 1>;
565 clock-names = "mclk";
566 samsung,camclk-out = <1>;
567 gpios = <&gpm1 6 0>;
568
569 port {
570 is_s5k6a3_ep: endpoint {
571 remote-endpoint = <&csis1_ep>;
572 data-lanes = <1>;
573 };
574 };
575 };
576 };
577 };
578 };
579};
diff --git a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
index 704290f7c5c0..99b26df8dbc7 100644
--- a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
@@ -401,13 +401,26 @@
401 samsung,pin-drv = <0>; 401 samsung,pin-drv = <0>;
402 }; 402 };
403 403
404 cam_port_a: cam-port-a { 404 cam_port_a_io: cam-port-a-io {
405 samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3", 405 samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3",
406 "gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7", 406 "gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7",
407 "gpj1-0", "gpj1-1", "gpj1-2", "gpj1-3", 407 "gpj1-0", "gpj1-1", "gpj1-2", "gpj1-4";
408 "gpj1-4";
409 samsung,pin-function = <2>; 408 samsung,pin-function = <2>;
410 samsung,pin-pud = <3>; 409 samsung,pin-pud = <0>;
410 samsung,pin-drv = <0>;
411 };
412
413 cam_port_a_clk_active: cam-port-a-clk-active {
414 samsung,pins = "gpj1-3";
415 samsung,pin-function = <2>;
416 samsung,pin-pud = <0>;
417 samsung,pin-drv = <3>;
418 };
419
420 cam_port_a_clk_idle: cam-port-a-clk-idle {
421 samsung,pins = "gpj1-3";
422 samsung,pin-function = <0>;
423 samsung,pin-pud = <1>;
411 samsung,pin-drv = <0>; 424 samsung,pin-drv = <0>;
412 }; 425 };
413 }; 426 };
@@ -778,16 +791,29 @@
778 samsung,pin-drv = <3>; 791 samsung,pin-drv = <3>;
779 }; 792 };
780 793
781 cam_port_b: cam-port-b { 794 cam_port_b_io: cam-port-b-io {
782 samsung,pins = "gpm0-0", "gpm0-1", "gpm0-2", "gpm0-3", 795 samsung,pins = "gpm0-0", "gpm0-1", "gpm0-2", "gpm0-3",
783 "gpm0-4", "gpm0-5", "gpm0-6", "gpm0-7", 796 "gpm0-4", "gpm0-5", "gpm0-6", "gpm0-7",
784 "gpm1-0", "gpm1-1", "gpm2-0", "gpm2-1", 797 "gpm1-0", "gpm1-1", "gpm2-0", "gpm2-1";
785 "gpm2-2";
786 samsung,pin-function = <3>; 798 samsung,pin-function = <3>;
787 samsung,pin-pud = <3>; 799 samsung,pin-pud = <3>;
788 samsung,pin-drv = <0>; 800 samsung,pin-drv = <0>;
789 }; 801 };
790 802
803 cam_port_b_clk_active: cam-port-b-clk-active {
804 samsung,pins = "gpm2-2";
805 samsung,pin-function = <3>;
806 samsung,pin-pud = <0>;
807 samsung,pin-drv = <3>;
808 };
809
810 cam_port_b_clk_idle: cam-port-b-clk-idle {
811 samsung,pins = "gpm2-2";
812 samsung,pin-function = <0>;
813 samsung,pin-pud = <1>;
814 samsung,pin-drv = <0>;
815 };
816
791 eint0: ext-int0 { 817 eint0: ext-int0 {
792 samsung,pins = "gpx0-0"; 818 samsung,pins = "gpx0-0";
793 samsung,pin-function = <0xf>; 819 samsung,pin-function = <0xf>;
@@ -822,6 +848,27 @@
822 samsung,pin-pud = <0>; 848 samsung,pin-pud = <0>;
823 samsung,pin-drv = <0>; 849 samsung,pin-drv = <0>;
824 }; 850 };
851
852 fimc_is_i2c0: fimc-is-i2c0 {
853 samsung,pins = "gpm4-0", "gpm4-1";
854 samsung,pin-function = <2>;
855 samsung,pin-pud = <0>;
856 samsung,pin-drv = <0>;
857 };
858
859 fimc_is_i2c1: fimc-is-i2c1 {
860 samsung,pins = "gpm4-2", "gpm4-3";
861 samsung,pin-function = <2>;
862 samsung,pin-pud = <0>;
863 samsung,pin-drv = <0>;
864 };
865
866 fimc_is_uart: fimc-is-uart {
867 samsung,pins = "gpm3-5", "gpm3-7";
868 samsung,pin-function = <3>;
869 samsung,pin-pud = <0>;
870 samsung,pin-drv = <0>;
871 };
825 }; 872 };
826 873
827 pinctrl@03860000 { 874 pinctrl@03860000 {
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
index 01da194ba329..954628c7f167 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -26,6 +26,13 @@
26 pinctrl1 = &pinctrl_1; 26 pinctrl1 = &pinctrl_1;
27 pinctrl2 = &pinctrl_2; 27 pinctrl2 = &pinctrl_2;
28 pinctrl3 = &pinctrl_3; 28 pinctrl3 = &pinctrl_3;
29 fimc-lite0 = &fimc_lite_0;
30 fimc-lite1 = &fimc_lite_1;
31 };
32
33 pd_isp: isp-power-domain@10023CA0 {
34 compatible = "samsung,exynos4210-pd";
35 reg = <0x10023CA0 0x20>;
29 }; 36 };
30 37
31 clock: clock-controller@0x10030000 { 38 clock: clock-controller@0x10030000 {
@@ -73,4 +80,100 @@
73 clock-names = "sclk_fimg2d", "fimg2d"; 80 clock-names = "sclk_fimg2d", "fimg2d";
74 status = "disabled"; 81 status = "disabled";
75 }; 82 };
83
84 camera {
85 clocks = <&clock 132>, <&clock 133>, <&clock 351>, <&clock 352>;
86 clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1";
87
88 fimc_0: fimc@11800000 {
89 compatible = "samsung,exynos4212-fimc";
90 samsung,pix-limits = <4224 8192 1920 4224>;
91 samsung,mainscaler-ext;
92 samsung,isp-wb;
93 samsung,cam-if;
94 };
95
96 fimc_1: fimc@11810000 {
97 compatible = "samsung,exynos4212-fimc";
98 samsung,pix-limits = <4224 8192 1920 4224>;
99 samsung,mainscaler-ext;
100 samsung,isp-wb;
101 samsung,cam-if;
102 };
103
104 fimc_2: fimc@11820000 {
105 compatible = "samsung,exynos4212-fimc";
106 samsung,pix-limits = <4224 8192 1920 4224>;
107 samsung,mainscaler-ext;
108 samsung,isp-wb;
109 samsung,lcd-wb;
110 samsung,cam-if;
111 };
112
113 fimc_3: fimc@11830000 {
114 compatible = "samsung,exynos4212-fimc";
115 samsung,pix-limits = <1920 8192 1366 1920>;
116 samsung,rotators = <0>;
117 samsung,mainscaler-ext;
118 samsung,isp-wb;
119 samsung,lcd-wb;
120 };
121
122 fimc_lite_0: fimc-lite@12390000 {
123 compatible = "samsung,exynos4212-fimc-lite";
124 reg = <0x12390000 0x1000>;
125 interrupts = <0 105 0>;
126 samsung,power-domain = <&pd_isp>;
127 clocks = <&clock 353>;
128 clock-names = "flite";
129 status = "disabled";
130 };
131
132 fimc_lite_1: fimc-lite@123A0000 {
133 compatible = "samsung,exynos4212-fimc-lite";
134 reg = <0x123A0000 0x1000>;
135 interrupts = <0 106 0>;
136 samsung,power-domain = <&pd_isp>;
137 clocks = <&clock 354>;
138 clock-names = "flite";
139 status = "disabled";
140 };
141
142 fimc_is: fimc-is@12000000 {
143 compatible = "samsung,exynos4212-fimc-is", "simple-bus";
144 reg = <0x12000000 0x260000>;
145 interrupts = <0 90 0>, <0 95 0>;
146 samsung,power-domain = <&pd_isp>;
147 clocks = <&clock 353>, <&clock 354>, <&clock 355>,
148 <&clock 356>, <&clock 17>, <&clock 357>,
149 <&clock 358>, <&clock 359>, <&clock 360>,
150 <&clock 450>,<&clock 451>, <&clock 452>,
151 <&clock 453>, <&clock 176>, <&clock 13>,
152 <&clock 454>, <&clock 395>, <&clock 455>;
153 clock-names = "lite0", "lite1", "ppmuispx",
154 "ppmuispmx", "mpll", "isp",
155 "drc", "fd", "mcuisp",
156 "ispdiv0", "ispdiv1", "mcuispdiv0",
157 "mcuispdiv1", "uart", "aclk200",
158 "div_aclk200", "aclk400mcuisp",
159 "div_aclk400mcuisp";
160 #address-cells = <1>;
161 #size-cells = <1>;
162 ranges;
163 status = "disabled";
164
165 pmu {
166 reg = <0x10020000 0x3000>;
167 };
168
169 i2c1_isp: i2c-isp@12140000 {
170 compatible = "samsung,exynos4212-i2c-isp";
171 reg = <0x12140000 0x100>;
172 clocks = <&clock 370>;
173 clock-names = "i2c_isp";
174 #address-cells = <1>;
175 #size-cells = <0>;
176 };
177 };
178 };
76}; 179};
diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index f65e124c04a6..6afa57d2fecc 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -108,4 +108,23 @@
108 interrupts = <0 42 0>; 108 interrupts = <0 42 0>;
109 status = "disabled"; 109 status = "disabled";
110 }; 110 };
111
112 fimd@14400000 {
113 compatible = "samsung,exynos5250-fimd";
114 interrupt-parent = <&combiner>;
115 reg = <0x14400000 0x40000>;
116 interrupt-names = "fifo", "vsync", "lcd_sys";
117 interrupts = <18 4>, <18 5>, <18 6>;
118 status = "disabled";
119 };
120
121 dp-controller@145B0000 {
122 compatible = "samsung,exynos5-dp";
123 reg = <0x145B0000 0x1000>;
124 interrupts = <10 3>;
125 interrupt-parent = <&combiner>;
126 #address-cells = <1>;
127 #size-cells = <0>;
128 status = "disabled";
129 };
111}; 130};
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
index abc7272c7afd..452d0b04d273 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -11,6 +11,7 @@
11 11
12/dts-v1/; 12/dts-v1/;
13#include "exynos5250.dtsi" 13#include "exynos5250.dtsi"
14#include <dt-bindings/interrupt-controller/irq.h>
14 15
15/ { 16/ {
16 model = "Insignal Arndale evaluation board based on EXYNOS5250"; 17 model = "Insignal Arndale evaluation board based on EXYNOS5250";
@@ -37,6 +38,28 @@
37 s5m8767_pmic@66 { 38 s5m8767_pmic@66 {
38 compatible = "samsung,s5m8767-pmic"; 39 compatible = "samsung,s5m8767-pmic";
39 reg = <0x66>; 40 reg = <0x66>;
41 interrupt-parent = <&gpx3>;
42 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
43
44 vinb1-supply = <&main_dc_reg>;
45 vinb2-supply = <&main_dc_reg>;
46 vinb3-supply = <&main_dc_reg>;
47 vinb4-supply = <&main_dc_reg>;
48 vinb5-supply = <&main_dc_reg>;
49 vinb6-supply = <&main_dc_reg>;
50 vinb7-supply = <&main_dc_reg>;
51 vinb8-supply = <&main_dc_reg>;
52 vinb9-supply = <&main_dc_reg>;
53
54 vinl1-supply = <&buck7_reg>;
55 vinl2-supply = <&buck7_reg>;
56 vinl3-supply = <&buck7_reg>;
57 vinl4-supply = <&main_dc_reg>;
58 vinl5-supply = <&main_dc_reg>;
59 vinl6-supply = <&main_dc_reg>;
60 vinl7-supply = <&main_dc_reg>;
61 vinl8-supply = <&buck8_reg>;
62 vinl9-supply = <&buck8_reg>;
40 63
41 s5m8767,pmic-buck2-dvs-voltage = <1300000>; 64 s5m8767,pmic-buck2-dvs-voltage = <1300000>;
42 s5m8767,pmic-buck3-dvs-voltage = <1100000>; 65 s5m8767,pmic-buck3-dvs-voltage = <1100000>;
@@ -276,6 +299,16 @@
276 op_mode = <1>; 299 op_mode = <1>;
277 }; 300 };
278 301
302 buck7_reg: BUCK7 {
303 regulator-name = "PVDD_BUCK7";
304 regulator-always-on;
305 };
306
307 buck8_reg: BUCK8 {
308 regulator-name = "PVDD_BUCK8";
309 regulator-always-on;
310 };
311
279 buck9_reg: BUCK9 { 312 buck9_reg: BUCK9 {
280 regulator-name = "VDD_33_OFF_EXT1"; 313 regulator-name = "VDD_33_OFF_EXT1";
281 regulator-min-microvolt = <750000>; 314 regulator-min-microvolt = <750000>;
@@ -295,7 +328,22 @@
295 }; 328 };
296 329
297 i2c@12C90000 { 330 i2c@12C90000 {
298 status = "disabled"; 331 wm1811a@1a {
332 compatible = "wlf,wm1811";
333 reg = <0x1a>;
334
335 AVDD2-supply = <&main_dc_reg>;
336 CPVDD-supply = <&main_dc_reg>;
337 DBVDD1-supply = <&main_dc_reg>;
338 DBVDD2-supply = <&main_dc_reg>;
339 DBVDD3-supply = <&main_dc_reg>;
340 LDO1VDD-supply = <&main_dc_reg>;
341 SPKVDD1-supply = <&main_dc_reg>;
342 SPKVDD2-supply = <&main_dc_reg>;
343
344 wlf,ldo1ena = <&gpb0 0 0>;
345 wlf,ldo2ena = <&gpb0 1 0>;
346 };
299 }; 347 };
300 348
301 i2c@12CA0000 { 349 i2c@12CA0000 {
@@ -429,18 +477,29 @@
429 vdd-supply = <&ldo8_reg>; 477 vdd-supply = <&ldo8_reg>;
430 }; 478 };
431 479
432 mmc_reg: voltage-regulator { 480 regulators {
433 compatible = "regulator-fixed"; 481 compatible = "simple-bus";
434 regulator-name = "VDD_33ON_2.8V"; 482 #address-cells = <1>;
435 regulator-min-microvolt = <2800000>; 483 #size-cells = <0>;
436 regulator-max-microvolt = <2800000>;
437 gpio = <&gpx1 1 1>;
438 enable-active-high;
439 };
440 484
441 reg_hdmi_en: fixedregulator@0 { 485 main_dc_reg: fixedregulator@1 {
442 compatible = "regulator-fixed"; 486 compatible = "regulator-fixed";
443 regulator-name = "hdmi-en"; 487 regulator-name = "MAIN_DC";
488 };
489
490 mmc_reg: voltage-regulator {
491 compatible = "regulator-fixed";
492 regulator-name = "VDD_33ON_2.8V";
493 regulator-min-microvolt = <2800000>;
494 regulator-max-microvolt = <2800000>;
495 gpio = <&gpx1 1 1>;
496 enable-active-high;
497 };
498
499 reg_hdmi_en: fixedregulator@0 {
500 compatible = "regulator-fixed";
501 regulator-name = "hdmi-en";
502 };
444 }; 503 };
445 504
446 fixed-rate-clocks { 505 fixed-rate-clocks {
@@ -450,16 +509,18 @@
450 }; 509 };
451 }; 510 };
452 511
453 dp-controller { 512 dp-controller@145B0000 {
454 samsung,color-space = <0>; 513 samsung,color-space = <0>;
455 samsung,dynamic-range = <0>; 514 samsung,dynamic-range = <0>;
456 samsung,ycbcr-coeff = <0>; 515 samsung,ycbcr-coeff = <0>;
457 samsung,color-depth = <1>; 516 samsung,color-depth = <1>;
458 samsung,link-rate = <0x0a>; 517 samsung,link-rate = <0x0a>;
459 samsung,lane-count = <4>; 518 samsung,lane-count = <4>;
519 status = "okay";
460 }; 520 };
461 521
462 fimd: fimd@14400000 { 522 fimd: fimd@14400000 {
523 status = "okay";
463 display-timings { 524 display-timings {
464 native-mode = <&timing0>; 525 native-mode = <&timing0>;
465 timing0: timing@0 { 526 timing0: timing@0 {
@@ -480,4 +541,22 @@
480 rtc { 541 rtc {
481 status = "okay"; 542 status = "okay";
482 }; 543 };
544
545 usb_hub_bus {
546 compatible = "simple-bus";
547 #address-cells = <1>;
548 #size-cells = <0>;
549
550 // SMSC USB3503 connected in hardware only mode as a PHY
551 usb_hub: usb_hub {
552 compatible = "smsc,usb3503a";
553
554 reset-gpios = <&gpx3 5 1>;
555 connect-gpios = <&gpd1 7 1>;
556 };
557 };
558
559 usb@12110000 {
560 usb-phy = <&usb2_phy>;
561 };
483}; 562};
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index 49f18c24a576..2538b329f2ce 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -250,7 +250,7 @@
250 samsung,vbus-gpio = <&gpx2 6 0>; 250 samsung,vbus-gpio = <&gpx2 6 0>;
251 }; 251 };
252 252
253 dp-controller { 253 dp-controller@145B0000 {
254 samsung,color-space = <0>; 254 samsung,color-space = <0>;
255 samsung,dynamic-range = <0>; 255 samsung,dynamic-range = <0>;
256 samsung,ycbcr-coeff = <0>; 256 samsung,ycbcr-coeff = <0>;
@@ -260,21 +260,25 @@
260 260
261 pinctrl-names = "default"; 261 pinctrl-names = "default";
262 pinctrl-0 = <&dp_hpd>; 262 pinctrl-0 = <&dp_hpd>;
263 status = "okay";
263 }; 264 };
264 265
265 display-timings { 266 fimd@14400000 {
266 native-mode = <&timing0>; 267 status = "okay";
267 timing0: timing@0 { 268 display-timings {
268 /* 1280x800 */ 269 native-mode = <&timing0>;
269 clock-frequency = <50000>; 270 timing0: timing@0 {
270 hactive = <1280>; 271 /* 1280x800 */
271 vactive = <800>; 272 clock-frequency = <50000>;
272 hfront-porch = <4>; 273 hactive = <1280>;
273 hback-porch = <4>; 274 vactive = <800>;
274 hsync-len = <4>; 275 hfront-porch = <4>;
275 vback-porch = <4>; 276 hback-porch = <4>;
276 vfront-porch = <4>; 277 hsync-len = <4>;
277 vsync-len = <4>; 278 vback-porch = <4>;
279 vfront-porch = <4>;
280 vsync-len = <4>;
281 };
278 }; 282 };
279 }; 283 };
280 284
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index ef57277fc38f..63ef1246b9d5 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -163,11 +163,21 @@
163 clock-names = "watchdog"; 163 clock-names = "watchdog";
164 }; 164 };
165 165
166 g2d@10850000 {
167 compatible = "samsung,exynos5250-g2d";
168 reg = <0x10850000 0x1000>;
169 interrupts = <0 91 0>;
170 clocks = <&clock 345>;
171 clock-names = "fimg2d";
172 };
173
166 codec@11000000 { 174 codec@11000000 {
167 compatible = "samsung,mfc-v6"; 175 compatible = "samsung,mfc-v6";
168 reg = <0x11000000 0x10000>; 176 reg = <0x11000000 0x10000>;
169 interrupts = <0 96 0>; 177 interrupts = <0 96 0>;
170 samsung,power-domain = <&pd_mfc>; 178 samsung,power-domain = <&pd_mfc>;
179 clocks = <&clock 266>;
180 clock-names = "mfc";
171 }; 181 };
172 182
173 rtc { 183 rtc {
@@ -614,28 +624,20 @@
614 interrupts = <0 94 0>; 624 interrupts = <0 94 0>;
615 }; 625 };
616 626
617 dp-controller { 627 dp_phy: video-phy@10040720 {
618 compatible = "samsung,exynos5-dp"; 628 compatible = "samsung,exynos5250-dp-video-phy";
619 reg = <0x145b0000 0x1000>; 629 reg = <0x10040720 4>;
620 interrupts = <10 3>; 630 #phy-cells = <0>;
621 interrupt-parent = <&combiner>; 631 };
632
633 dp-controller@145B0000 {
622 clocks = <&clock 342>; 634 clocks = <&clock 342>;
623 clock-names = "dp"; 635 clock-names = "dp";
624 #address-cells = <1>; 636 phys = <&dp_phy>;
625 #size-cells = <0>; 637 phy-names = "dp";
626
627 dptx-phy {
628 reg = <0x10040720>;
629 samsung,enable-mask = <1>;
630 };
631 }; 638 };
632 639
633 fimd { 640 fimd@14400000 {
634 compatible = "samsung,exynos5250-fimd";
635 interrupt-parent = <&combiner>;
636 reg = <0x14400000 0x40000>;
637 interrupt-names = "fifo", "vsync", "lcd_sys";
638 interrupts = <18 4>, <18 5>, <18 6>;
639 clocks = <&clock 133>, <&clock 339>; 641 clocks = <&clock 133>, <&clock 339>;
640 clock-names = "sclk_fimd", "fimd"; 642 clock-names = "sclk_fimd", "fimd";
641 }; 643 };
diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
index 5848c425ae4d..e695aba5f73c 100644
--- a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
@@ -59,6 +59,13 @@
59 interrupt-controller; 59 interrupt-controller;
60 #interrupt-cells = <2>; 60 #interrupt-cells = <2>;
61 }; 61 };
62
63 dp_hpd: dp_hpd {
64 samsung,pins = "gpx0-7";
65 samsung,pin-function = <3>;
66 samsung,pin-pud = <0>;
67 samaung,pin-drv = <0>;
68 };
62 }; 69 };
63 70
64 pinctrl@13410000 { 71 pinctrl@13410000 {
diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts
index 08607df6a180..bafba25ba7c2 100644
--- a/arch/arm/boot/dts/exynos5420-smdk5420.dts
+++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
@@ -30,4 +30,35 @@
30 clock-frequency = <24000000>; 30 clock-frequency = <24000000>;
31 }; 31 };
32 }; 32 };
33
34 dp-controller@145B0000 {
35 pinctrl-names = "default";
36 pinctrl-0 = <&dp_hpd>;
37 samsung,color-space = <0>;
38 samsung,dynamic-range = <0>;
39 samsung,ycbcr-coeff = <0>;
40 samsung,color-depth = <1>;
41 samsung,link-rate = <0x0a>;
42 samsung,lane-count = <4>;
43 status = "okay";
44 };
45
46 fimd@14400000 {
47 status = "okay";
48 display-timings {
49 native-mode = <&timing0>;
50 timing0: timing@0 {
51 clock-frequency = <50000>;
52 hactive = <2560>;
53 vactive = <1600>;
54 hfront-porch = <48>;
55 hback-porch = <80>;
56 hsync-len = <32>;
57 vback-porch = <16>;
58 vfront-porch = <8>;
59 vsync-len = <6>;
60 };
61 };
62 };
63
33}; 64};
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 8c54c4b74f0e..c950bad5f341 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -14,7 +14,10 @@
14 */ 14 */
15 15
16#include "exynos5.dtsi" 16#include "exynos5.dtsi"
17/include/ "exynos5420-pinctrl.dtsi" 17#include "exynos5420-pinctrl.dtsi"
18
19#include <dt-bindings/clk/exynos-audss-clk.h>
20
18/ { 21/ {
19 compatible = "samsung,exynos5420"; 22 compatible = "samsung,exynos5420";
20 23
@@ -65,6 +68,22 @@
65 #clock-cells = <1>; 68 #clock-cells = <1>;
66 }; 69 };
67 70
71 clock_audss: audss-clock-controller@3810000 {
72 compatible = "samsung,exynos5420-audss-clock";
73 reg = <0x03810000 0x0C>;
74 #clock-cells = <1>;
75 clocks = <&clock 148>;
76 clock-names = "sclk_audio";
77 };
78
79 codec@11000000 {
80 compatible = "samsung,mfc-v7";
81 reg = <0x11000000 0x10000>;
82 interrupts = <0 96 0>;
83 clocks = <&clock 401>;
84 clock-names = "mfc";
85 };
86
68 mct@101C0000 { 87 mct@101C0000 {
69 compatible = "samsung,exynos4210-mct"; 88 compatible = "samsung,exynos4210-mct";
70 reg = <0x101C0000 0x800>; 89 reg = <0x101C0000 0x800>;
@@ -90,6 +109,41 @@
90 }; 109 };
91 }; 110 };
92 111
112 gsc_pd: power-domain@10044000 {
113 compatible = "samsung,exynos4210-pd";
114 reg = <0x10044000 0x20>;
115 };
116
117 isp_pd: power-domain@10044020 {
118 compatible = "samsung,exynos4210-pd";
119 reg = <0x10044020 0x20>;
120 };
121
122 mfc_pd: power-domain@10044060 {
123 compatible = "samsung,exynos4210-pd";
124 reg = <0x10044060 0x20>;
125 };
126
127 disp_pd: power-domain@100440C0 {
128 compatible = "samsung,exynos4210-pd";
129 reg = <0x100440C0 0x20>;
130 };
131
132 mau_pd: power-domain@100440E0 {
133 compatible = "samsung,exynos4210-pd";
134 reg = <0x100440E0 0x20>;
135 };
136
137 g2d_pd: power-domain@10044100 {
138 compatible = "samsung,exynos4210-pd";
139 reg = <0x10044100 0x20>;
140 };
141
142 msc_pd: power-domain@10044120 {
143 compatible = "samsung,exynos4210-pd";
144 reg = <0x10044120 0x20>;
145 };
146
93 pinctrl_0: pinctrl@13400000 { 147 pinctrl_0: pinctrl@13400000 {
94 compatible = "samsung,exynos5420-pinctrl"; 148 compatible = "samsung,exynos5420-pinctrl";
95 reg = <0x13400000 0x1000>; 149 reg = <0x13400000 0x1000>;
@@ -145,4 +199,23 @@
145 clocks = <&clock 260>, <&clock 131>; 199 clocks = <&clock 260>, <&clock 131>;
146 clock-names = "uart", "clk_uart_baud0"; 200 clock-names = "uart", "clk_uart_baud0";
147 }; 201 };
202
203 dp_phy: video-phy@10040728 {
204 compatible = "samsung,exynos5250-dp-video-phy";
205 reg = <0x10040728 4>;
206 #phy-cells = <0>;
207 };
208
209 dp-controller@145B0000 {
210 clocks = <&clock 412>;
211 clock-names = "dp";
212 phys = <&dp_phy>;
213 phy-names = "dp";
214 };
215
216 fimd@14400000 {
217 samsung,power-domain = <&disp_pd>;
218 clocks = <&clock 147>, <&clock 421>;
219 clock-names = "sclk_fimd", "fimd";
220 };
148}; 221};
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
index ff7f5d855845..606da5f39269 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -18,6 +18,9 @@
18 18
19 aliases { 19 aliases {
20 spi0 = &spi_0; 20 spi0 = &spi_0;
21 tmuctrl0 = &tmuctrl_0;
22 tmuctrl1 = &tmuctrl_1;
23 tmuctrl2 = &tmuctrl_2;
21 }; 24 };
22 25
23 clock: clock-controller@0x160000 { 26 clock: clock-controller@0x160000 {
@@ -207,6 +210,30 @@
207 clock-names = "rtc"; 210 clock-names = "rtc";
208 }; 211 };
209 212
213 tmuctrl_0: tmuctrl@160118 {
214 compatible = "samsung,exynos5440-tmu";
215 reg = <0x160118 0x230>, <0x160368 0x10>;
216 interrupts = <0 58 0>;
217 clocks = <&clock 21>;
218 clock-names = "tmu_apbif";
219 };
220
221 tmuctrl_1: tmuctrl@16011C {
222 compatible = "samsung,exynos5440-tmu";
223 reg = <0x16011C 0x230>, <0x160368 0x10>;
224 interrupts = <0 58 0>;
225 clocks = <&clock 21>;
226 clock-names = "tmu_apbif";
227 };
228
229 tmuctrl_2: tmuctrl@160120 {
230 compatible = "samsung,exynos5440-tmu";
231 reg = <0x160120 0x230>, <0x160368 0x10>;
232 interrupts = <0 58 0>;
233 clocks = <&clock 21>;
234 clock-names = "tmu_apbif";
235 };
236
210 sata@210000 { 237 sata@210000 {
211 compatible = "snps,exynos5440-ahci"; 238 compatible = "snps,exynos5440-ahci";
212 reg = <0x210000 0x10000>; 239 reg = <0x210000 0x10000>;
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-21 17:42:52 -0400