diff options
author | Axel Lin <axel.lin@ingics.com> | 2013-10-02 08:49:29 -0400 |
---|---|---|
committer | Mark Brown <broonie@linaro.org> | 2013-10-03 11:49:34 -0400 |
commit | 5e965704803dcbcbfbf97e8a976b3778b245834b (patch) | |
tree | 24fe94a8b276f1a9f87314c0ad0ef04c64d242c6 | |
parent | 43f6fc9542d6c42cc2e5783536ed31d90516c999 (diff) |
regulator: as3722: Fix off-by-one n_voltages setting for SDx
AS3722_SDx_VSEL_MAX means the maximum selecter, the n_voltages should be
AS3722_SDx_VSEL_MAX + 1.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
-rw-r--r-- | drivers/regulator/as3722-regulator.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/regulator/as3722-regulator.c b/drivers/regulator/as3722-regulator.c index 01a8b1788981..d7b71a9c41f1 100644 --- a/drivers/regulator/as3722-regulator.c +++ b/drivers/regulator/as3722-regulator.c | |||
@@ -99,7 +99,7 @@ static const struct as3722_register_mapping as3722_reg_lookup[] = { | |||
99 | .sleep_ctrl_mask = AS3722_SD0_EXT_ENABLE_MASK, | 99 | .sleep_ctrl_mask = AS3722_SD0_EXT_ENABLE_MASK, |
100 | .control_reg = AS3722_SD0_CONTROL_REG, | 100 | .control_reg = AS3722_SD0_CONTROL_REG, |
101 | .mode_mask = AS3722_SD0_MODE_FAST, | 101 | .mode_mask = AS3722_SD0_MODE_FAST, |
102 | .n_voltages = AS3722_SD0_VSEL_MAX, | 102 | .n_voltages = AS3722_SD0_VSEL_MAX + 1, |
103 | }, | 103 | }, |
104 | { | 104 | { |
105 | .regulator_id = AS3722_REGULATOR_ID_SD1, | 105 | .regulator_id = AS3722_REGULATOR_ID_SD1, |
@@ -112,7 +112,7 @@ static const struct as3722_register_mapping as3722_reg_lookup[] = { | |||
112 | .sleep_ctrl_mask = AS3722_SD1_EXT_ENABLE_MASK, | 112 | .sleep_ctrl_mask = AS3722_SD1_EXT_ENABLE_MASK, |
113 | .control_reg = AS3722_SD1_CONTROL_REG, | 113 | .control_reg = AS3722_SD1_CONTROL_REG, |
114 | .mode_mask = AS3722_SD1_MODE_FAST, | 114 | .mode_mask = AS3722_SD1_MODE_FAST, |
115 | .n_voltages = AS3722_SD0_VSEL_MAX, | 115 | .n_voltages = AS3722_SD0_VSEL_MAX + 1, |
116 | }, | 116 | }, |
117 | { | 117 | { |
118 | .regulator_id = AS3722_REGULATOR_ID_SD2, | 118 | .regulator_id = AS3722_REGULATOR_ID_SD2, |
@@ -126,7 +126,7 @@ static const struct as3722_register_mapping as3722_reg_lookup[] = { | |||
126 | .sleep_ctrl_mask = AS3722_SD2_EXT_ENABLE_MASK, | 126 | .sleep_ctrl_mask = AS3722_SD2_EXT_ENABLE_MASK, |
127 | .control_reg = AS3722_SD23_CONTROL_REG, | 127 | .control_reg = AS3722_SD23_CONTROL_REG, |
128 | .mode_mask = AS3722_SD2_MODE_FAST, | 128 | .mode_mask = AS3722_SD2_MODE_FAST, |
129 | .n_voltages = AS3722_SD2_VSEL_MAX, | 129 | .n_voltages = AS3722_SD2_VSEL_MAX + 1, |
130 | }, | 130 | }, |
131 | { | 131 | { |
132 | .regulator_id = AS3722_REGULATOR_ID_SD3, | 132 | .regulator_id = AS3722_REGULATOR_ID_SD3, |
@@ -140,7 +140,7 @@ static const struct as3722_register_mapping as3722_reg_lookup[] = { | |||
140 | .sleep_ctrl_mask = AS3722_SD3_EXT_ENABLE_MASK, | 140 | .sleep_ctrl_mask = AS3722_SD3_EXT_ENABLE_MASK, |
141 | .control_reg = AS3722_SD23_CONTROL_REG, | 141 | .control_reg = AS3722_SD23_CONTROL_REG, |
142 | .mode_mask = AS3722_SD3_MODE_FAST, | 142 | .mode_mask = AS3722_SD3_MODE_FAST, |
143 | .n_voltages = AS3722_SD2_VSEL_MAX, | 143 | .n_voltages = AS3722_SD2_VSEL_MAX + 1, |
144 | }, | 144 | }, |
145 | { | 145 | { |
146 | .regulator_id = AS3722_REGULATOR_ID_SD4, | 146 | .regulator_id = AS3722_REGULATOR_ID_SD4, |
@@ -154,7 +154,7 @@ static const struct as3722_register_mapping as3722_reg_lookup[] = { | |||
154 | .sleep_ctrl_mask = AS3722_SD4_EXT_ENABLE_MASK, | 154 | .sleep_ctrl_mask = AS3722_SD4_EXT_ENABLE_MASK, |
155 | .control_reg = AS3722_SD4_CONTROL_REG, | 155 | .control_reg = AS3722_SD4_CONTROL_REG, |
156 | .mode_mask = AS3722_SD4_MODE_FAST, | 156 | .mode_mask = AS3722_SD4_MODE_FAST, |
157 | .n_voltages = AS3722_SD2_VSEL_MAX, | 157 | .n_voltages = AS3722_SD2_VSEL_MAX + 1, |
158 | }, | 158 | }, |
159 | { | 159 | { |
160 | .regulator_id = AS3722_REGULATOR_ID_SD5, | 160 | .regulator_id = AS3722_REGULATOR_ID_SD5, |
@@ -168,7 +168,7 @@ static const struct as3722_register_mapping as3722_reg_lookup[] = { | |||
168 | .sleep_ctrl_mask = AS3722_SD5_EXT_ENABLE_MASK, | 168 | .sleep_ctrl_mask = AS3722_SD5_EXT_ENABLE_MASK, |
169 | .control_reg = AS3722_SD5_CONTROL_REG, | 169 | .control_reg = AS3722_SD5_CONTROL_REG, |
170 | .mode_mask = AS3722_SD5_MODE_FAST, | 170 | .mode_mask = AS3722_SD5_MODE_FAST, |
171 | .n_voltages = AS3722_SD2_VSEL_MAX, | 171 | .n_voltages = AS3722_SD2_VSEL_MAX + 1, |
172 | }, | 172 | }, |
173 | { | 173 | { |
174 | .regulator_id = AS3722_REGULATOR_ID_SD6, | 174 | .regulator_id = AS3722_REGULATOR_ID_SD6, |
@@ -181,7 +181,7 @@ static const struct as3722_register_mapping as3722_reg_lookup[] = { | |||
181 | .sleep_ctrl_mask = AS3722_SD6_EXT_ENABLE_MASK, | 181 | .sleep_ctrl_mask = AS3722_SD6_EXT_ENABLE_MASK, |
182 | .control_reg = AS3722_SD6_CONTROL_REG, | 182 | .control_reg = AS3722_SD6_CONTROL_REG, |
183 | .mode_mask = AS3722_SD6_MODE_FAST, | 183 | .mode_mask = AS3722_SD6_MODE_FAST, |
184 | .n_voltages = AS3722_SD0_VSEL_MAX, | 184 | .n_voltages = AS3722_SD0_VSEL_MAX + 1, |
185 | }, | 185 | }, |
186 | { | 186 | { |
187 | .regulator_id = AS3722_REGULATOR_ID_LDO0, | 187 | .regulator_id = AS3722_REGULATOR_ID_LDO0, |