diff options
| author | H. Peter Anvin <hpa@linux.intel.com> | 2012-09-24 19:05:48 -0400 |
|---|---|---|
| committer | H. Peter Anvin <hpa@linux.intel.com> | 2012-09-26 18:06:22 -0400 |
| commit | 5a5a51db78ef24aa61a4cb2ae36f07f6fa37356d (patch) | |
| tree | 22b37361c0d876beeea542f769fdb76444878b36 | |
| parent | e139e95590dfebab81841bf7a3ac46500f51a47c (diff) | |
x86-32: Start out eflags and cr4 clean
%cr4 is supposed to reflect a set of features into which the operating
system is opting in. If the BIOS or bootloader leaks bits here, this
is not desirable. Consider a bootloader passing in %cr4.pae set to a
legacy paging kernel, for example -- it will not have any immediate
effect, but the kernel would crash when turning paging on.
A similar argument applies to %eflags, and since we have to look for
%eflags.id being settable we can use a sequence which clears %eflags
as a side effect.
Note that we already do this for x86-64.
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Link: http://lkml.kernel.org/r/1348529239-17943-1-git-send-email-hpa@linux.intel.com
| -rw-r--r-- | arch/x86/kernel/head_32.S | 31 |
1 files changed, 16 insertions, 15 deletions
diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S index d42ab17b7397..957a47aec64e 100644 --- a/arch/x86/kernel/head_32.S +++ b/arch/x86/kernel/head_32.S | |||
| @@ -287,27 +287,28 @@ ENTRY(startup_32_smp) | |||
| 287 | leal -__PAGE_OFFSET(%ecx),%esp | 287 | leal -__PAGE_OFFSET(%ecx),%esp |
| 288 | 288 | ||
| 289 | default_entry: | 289 | default_entry: |
| 290 | |||
| 291 | /* | 290 | /* |
| 292 | * New page tables may be in 4Mbyte page mode and may | 291 | * New page tables may be in 4Mbyte page mode and may |
| 293 | * be using the global pages. | 292 | * be using the global pages. |
| 294 | * | 293 | * |
| 295 | * NOTE! If we are on a 486 we may have no cr4 at all! | 294 | * NOTE! If we are on a 486 we may have no cr4 at all! |
| 296 | * So we do not try to touch it unless we really have | 295 | * Specifically, cr4 exists if and only if CPUID exists, |
| 297 | * some bits in it to set. This won't work if the BSP | 296 | * which in turn exists if and only if EFLAGS.ID exists. |
| 298 | * implements cr4 but this AP does not -- very unlikely | ||
| 299 | * but be warned! The same applies to the pse feature | ||
| 300 | * if not equally supported. --macro | ||
| 301 | * | ||
| 302 | * NOTE! We have to correct for the fact that we're | ||
| 303 | * not yet offset PAGE_OFFSET.. | ||
| 304 | */ | 297 | */ |
| 305 | #define cr4_bits pa(mmu_cr4_features) | 298 | movl $X86_EFLAGS_ID,%ecx |
| 306 | movl cr4_bits,%edx | 299 | pushl %ecx |
| 307 | andl %edx,%edx | 300 | popfl |
| 308 | jz 6f | 301 | pushfl |
| 309 | movl %cr4,%eax # Turn on paging options (PSE,PAE,..) | 302 | popl %eax |
| 310 | orl %edx,%eax | 303 | pushl $0 |
| 304 | popfl | ||
| 305 | pushfl | ||
| 306 | popl %edx | ||
| 307 | xorl %edx,%eax | ||
| 308 | testl %ecx,%eax | ||
| 309 | jz 6f # No ID flag = no CPUID = no CR4 | ||
| 310 | |||
| 311 | movl pa(mmu_cr4_features),%eax | ||
| 311 | movl %eax,%cr4 | 312 | movl %eax,%cr4 |
| 312 | 313 | ||
| 313 | testb $X86_CR4_PAE, %al # check if PAE is enabled | 314 | testb $X86_CR4_PAE, %al # check if PAE is enabled |
