Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux

3 radeon fixes, I have some exynos fixes to push later but I'll queue
them separately once I've looked them over a bit.

* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
  drm/radeon/kms: fix MSI re-arm on rv370+
  drm/radeon/kms/atom: bios scratch reg handling updates
  drm/radeon/kms: drop lock in return path of radeon_fence_count_emitted.

4 files changed, 22 insertions, 7 deletions

diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index bfd36ab643a6..18cd84fae99c 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -789,9 +789,7 @@ int r100_irq_process(struct radeon_device *rdev)
                         WREG32(RADEON_AIC_CNTL, msi_rearm | RS400_MSI_REARM);
                         break;
                 default:
-                        msi_rearm = RREG32(RADEON_MSI_REARM_EN) & ~RV370_MSI_REARM_EN;
-                        WREG32(RADEON_MSI_REARM_EN, msi_rearm);
-                        WREG32(RADEON_MSI_REARM_EN, msi_rearm | RV370_MSI_REARM_EN);
+                        WREG32(RADEON_MSI_REARM_EN, RV370_MSI_REARM_EN);
                         break;
                 }
         }
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c
index 5082d17d14dc..9e72daeeddc6 100644
--- a/drivers/gpu/drm/radeon/radeon_atombios.c
+++ b/drivers/gpu/drm/radeon/radeon_atombios.c
@@ -2931,6 +2931,20 @@ radeon_atombios_connected_scratch_regs(struct drm_connector *connector,
                         bios_6_scratch &= ~ATOM_S6_ACC_REQ_DFP5;
                 }
         }
+        if ((radeon_encoder->devices & ATOM_DEVICE_DFP6_SUPPORT) &&
+            (radeon_connector->devices & ATOM_DEVICE_DFP6_SUPPORT)) {
+                if (connected) {
+                        DRM_DEBUG_KMS("DFP6 connected\n");
+                        bios_0_scratch |= ATOM_S0_DFP6;
+                        bios_3_scratch |= ATOM_S3_DFP6_ACTIVE;
+                        bios_6_scratch |= ATOM_S6_ACC_REQ_DFP6;
+                } else {
+                        DRM_DEBUG_KMS("DFP6 disconnected\n");
+                        bios_0_scratch &= ~ATOM_S0_DFP6;
+                        bios_3_scratch &= ~ATOM_S3_DFP6_ACTIVE;
+                        bios_6_scratch &= ~ATOM_S6_ACC_REQ_DFP6;
+                }
+        }
 
         if (rdev->family >= CHIP_R600) {
                 WREG32(R600_BIOS_0_SCRATCH, bios_0_scratch);
@@ -2951,6 +2965,9 @@ radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc)
         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
         uint32_t bios_3_scratch;
 
+        if (ASIC_IS_DCE4(rdev))
+                return;
+
         if (rdev->family >= CHIP_R600)
                 bios_3_scratch = RREG32(R600_BIOS_3_SCRATCH);
         else
diff --git a/drivers/gpu/drm/radeon/radeon_fence.c b/drivers/gpu/drm/radeon/radeon_fence.c
index 64ea3dd9e6ff..4bd36a354fbe 100644
--- a/drivers/gpu/drm/radeon/radeon_fence.c
+++ b/drivers/gpu/drm/radeon/radeon_fence.c
@@ -364,8 +364,10 @@ int radeon_fence_count_emitted(struct radeon_device *rdev, int ring)
         int not_processed = 0;
 
         read_lock_irqsave(&rdev->fence_lock, irq_flags);
-        if (!rdev->fence_drv[ring].initialized)
+        if (!rdev->fence_drv[ring].initialized) {
+                read_unlock_irqrestore(&rdev->fence_lock, irq_flags);
                 return 0;
+        }
 
         if (!list_empty(&rdev->fence_drv[ring].emitted)) {
                 struct list_head *ptr;
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index ec46eb45e34c..c05865e5521f 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -684,9 +684,7 @@ int rs600_irq_process(struct radeon_device *rdev)
                         WREG32(RADEON_BUS_CNTL, msi_rearm | RS600_MSI_REARM);
                         break;
                 default:
-                        msi_rearm = RREG32(RADEON_MSI_REARM_EN) & ~RV370_MSI_REARM_EN;
-                        WREG32(RADEON_MSI_REARM_EN, msi_rearm);
-                        WREG32(RADEON_MSI_REARM_EN, msi_rearm | RV370_MSI_REARM_EN);
+                        WREG32(RADEON_MSI_REARM_EN, RV370_MSI_REARM_EN);
                         break;
                 }
         }