diff options
author | Lucas Stach <l.stach@pengutronix.de> | 2014-04-07 10:29:27 -0400 |
---|---|---|
committer | Shawn Guo <shawn.guo@freescale.com> | 2014-04-13 22:22:38 -0400 |
commit | 52d13453df9aef536da6b93c7253fd618292a1cf (patch) | |
tree | 61bbf658105dd26c77e7165c07ecc8beb70e7e76 | |
parent | 8dde78e8d62ac5b5b8c07cd965928536c3556bc0 (diff) |
ARM: dts: imx6: edmqmx6: add second STMPE
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
-rw-r--r-- | arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts | 38 |
1 files changed, 29 insertions, 9 deletions
diff --git a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts index e7762e456cbe..e4ae38fd0269 100644 --- a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts +++ b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts | |||
@@ -19,7 +19,10 @@ | |||
19 | compatible = "dmo,imx6q-edmqmx6", "fsl,imx6q"; | 19 | compatible = "dmo,imx6q-edmqmx6", "fsl,imx6q"; |
20 | 20 | ||
21 | aliases { | 21 | aliases { |
22 | gpio7 = &stmpe_gpio; | 22 | gpio7 = &stmpe_gpio1; |
23 | gpio8 = &stmpe_gpio2; | ||
24 | stmpe-i2c0 = &stmpe1; | ||
25 | stmpe-i2c1 = &stmpe2; | ||
23 | }; | 26 | }; |
24 | 27 | ||
25 | memory { | 28 | memory { |
@@ -67,23 +70,23 @@ | |||
67 | 70 | ||
68 | led-blue { | 71 | led-blue { |
69 | label = "blue"; | 72 | label = "blue"; |
70 | gpios = <&stmpe_gpio 8 GPIO_ACTIVE_HIGH>; | 73 | gpios = <&stmpe_gpio1 8 GPIO_ACTIVE_HIGH>; |
71 | linux,default-trigger = "heartbeat"; | 74 | linux,default-trigger = "heartbeat"; |
72 | }; | 75 | }; |
73 | 76 | ||
74 | led-green { | 77 | led-green { |
75 | label = "green"; | 78 | label = "green"; |
76 | gpios = <&stmpe_gpio 9 GPIO_ACTIVE_HIGH>; | 79 | gpios = <&stmpe_gpio1 9 GPIO_ACTIVE_HIGH>; |
77 | }; | 80 | }; |
78 | 81 | ||
79 | led-pink { | 82 | led-pink { |
80 | label = "pink"; | 83 | label = "pink"; |
81 | gpios = <&stmpe_gpio 10 GPIO_ACTIVE_HIGH>; | 84 | gpios = <&stmpe_gpio1 10 GPIO_ACTIVE_HIGH>; |
82 | }; | 85 | }; |
83 | 86 | ||
84 | led-red { | 87 | led-red { |
85 | label = "red"; | 88 | label = "red"; |
86 | gpios = <&stmpe_gpio 11 GPIO_ACTIVE_HIGH>; | 89 | gpios = <&stmpe_gpio1 11 GPIO_ACTIVE_HIGH>; |
87 | }; | 90 | }; |
88 | }; | 91 | }; |
89 | }; | 92 | }; |
@@ -101,7 +104,8 @@ | |||
101 | clock-frequency = <100000>; | 104 | clock-frequency = <100000>; |
102 | pinctrl-names = "default"; | 105 | pinctrl-names = "default"; |
103 | pinctrl-0 = <&pinctrl_i2c2 | 106 | pinctrl-0 = <&pinctrl_i2c2 |
104 | &pinctrl_stmpe>; | 107 | &pinctrl_stmpe1 |
108 | &pinctrl_stmpe2>; | ||
105 | status = "okay"; | 109 | status = "okay"; |
106 | 110 | ||
107 | pmic: pfuze100@08 { | 111 | pmic: pfuze100@08 { |
@@ -207,13 +211,25 @@ | |||
207 | }; | 211 | }; |
208 | }; | 212 | }; |
209 | 213 | ||
210 | stmpe: stmpe1601@40 { | 214 | stmpe1: stmpe1601@40 { |
211 | compatible = "st,stmpe1601"; | 215 | compatible = "st,stmpe1601"; |
212 | reg = <0x40>; | 216 | reg = <0x40>; |
213 | interrupts = <30 0>; | 217 | interrupts = <30 0>; |
214 | interrupt-parent = <&gpio3>; | 218 | interrupt-parent = <&gpio3>; |
215 | 219 | ||
216 | stmpe_gpio: stmpe_gpio { | 220 | stmpe_gpio1: stmpe_gpio { |
221 | #gpio-cells = <2>; | ||
222 | compatible = "st,stmpe-gpio"; | ||
223 | }; | ||
224 | }; | ||
225 | |||
226 | stmpe2: stmpe1601@44 { | ||
227 | compatible = "st,stmpe1601"; | ||
228 | reg = <0x44>; | ||
229 | interrupts = <2 0>; | ||
230 | interrupt-parent = <&gpio5>; | ||
231 | |||
232 | stmpe_gpio2: stmpe_gpio { | ||
217 | #gpio-cells = <2>; | 233 | #gpio-cells = <2>; |
218 | compatible = "st,stmpe-gpio"; | 234 | compatible = "st,stmpe-gpio"; |
219 | }; | 235 | }; |
@@ -275,10 +291,14 @@ | |||
275 | >; | 291 | >; |
276 | }; | 292 | }; |
277 | 293 | ||
278 | pinctrl_stmpe: stmpegrp { | 294 | pinctrl_stmpe1: stmpe1grp { |
279 | fsl,pins = <MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x80000000>; | 295 | fsl,pins = <MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x80000000>; |
280 | }; | 296 | }; |
281 | 297 | ||
298 | pinctrl_stmpe2: stmpe2grp { | ||
299 | fsl,pins = <MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000>; | ||
300 | }; | ||
301 | |||
282 | pinctrl_uart1: uart1grp { | 302 | pinctrl_uart1: uart1grp { |
283 | fsl,pins = < | 303 | fsl,pins = < |
284 | MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 | 304 | MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 |