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authorLothar Waßmann <LW@KARO-electronics.de>2014-01-18 03:18:38 -0500
committerShawn Guo <shawn.guo@linaro.org>2014-02-09 08:33:48 -0500
commit4f5b6ba6fa284cc8107444a353b07136b53e76fc (patch)
treefb5dafb10a2920a71bc6c18731a0ff81351b6a31
parent153f1d84ab99605594c9cbaa2f6f794b53af06b7 (diff)
ARM: dts: imx53: add support for Ka-Ro TX53 modules
This patch adds support for the Ka-Ro electronics GmbH TX53 modules. There are two distinct module types. One with an LVDS display interface and SATA support, the other with a parallel LCD interface and no SATA interface. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat
-rw-r--r--arch/arm/boot/dts/Makefile2
-rw-r--r--arch/arm/boot/dts/imx53-tx53-x03x.dts315
-rw-r--r--arch/arm/boot/dts/imx53-tx53-x13x.dts243
-rw-r--r--arch/arm/boot/dts/imx53-tx53.dtsi508
4 files changed, 1027 insertions, 41 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index f665187c8add..77f653648e61 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -155,6 +155,8 @@ dtb-$(CONFIG_ARCH_MXC) += \
155 imx53-qsb.dtb \ 155 imx53-qsb.dtb \
156 imx53-qsrb.dtb \ 156 imx53-qsrb.dtb \
157 imx53-smd.dtb \ 157 imx53-smd.dtb \
158 imx53-tx53-x03x.dtb \
159 imx53-tx53-x13x.dtb \
158 imx53-voipac-bsb.dtb \ 160 imx53-voipac-bsb.dtb \
159 imx6dl-cubox-i.dtb \ 161 imx6dl-cubox-i.dtb \
160 imx6dl-hummingboard.dtb \ 162 imx6dl-hummingboard.dtb \
diff --git a/arch/arm/boot/dts/imx53-tx53-x03x.dts b/arch/arm/boot/dts/imx53-tx53-x03x.dts
new file mode 100644
index 000000000000..0217dde3b36b
--- /dev/null
+++ b/arch/arm/boot/dts/imx53-tx53-x03x.dts
@@ -0,0 +1,315 @@
1/*
2 * Copyright 2013 Lothar Waßmann <LW@KARO-electronics.de>
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
13#include "imx53-tx53.dtsi"
14#include <dt-bindings/input/input.h>
15#include <dt-bindings/pwm/pwm.h>
16
17/ {
18 model = "Ka-Ro electronics TX53 module (LCD)";
19 compatible = "karo,tx53", "fsl,imx53";
20
21 aliases {
22 display = &display;
23 };
24
25 soc {
26 display: display@di0 {
27 compatible = "fsl,imx-parallel-display";
28 crtcs = <&ipu 0>;
29 interface-pix-fmt = "rgb24";
30 pinctrl-names = "default";
31 pinctrl-0 = <&pinctrl_rgb24_vga1>;
32 status = "okay";
33
34 display-timings {
35 VGA {
36 clock-frequency = <25200000>;
37 hactive = <640>;
38 vactive = <480>;
39 hback-porch = <48>;
40 hsync-len = <96>;
41 hfront-porch = <16>;
42 vback-porch = <31>;
43 vsync-len = <2>;
44 vfront-porch = <12>;
45 hsync-active = <0>;
46 vsync-active = <0>;
47 de-active = <1>;
48 pixelclk-active = <0>;
49 };
50
51 ETV570 {
52 clock-frequency = <25200000>;
53 hactive = <640>;
54 vactive = <480>;
55 hback-porch = <114>;
56 hsync-len = <30>;
57 hfront-porch = <16>;
58 vback-porch = <32>;
59 vsync-len = <3>;
60 vfront-porch = <10>;
61 hsync-active = <0>;
62 vsync-active = <0>;
63 de-active = <1>;
64 pixelclk-active = <0>;
65 };
66
67 ET0350 {
68 clock-frequency = <6413760>;
69 hactive = <320>;
70 vactive = <240>;
71 hback-porch = <34>;
72 hsync-len = <34>;
73 hfront-porch = <20>;
74 vback-porch = <15>;
75 vsync-len = <3>;
76 vfront-porch = <4>;
77 hsync-active = <0>;
78 vsync-active = <0>;
79 de-active = <1>;
80 pixelclk-active = <0>;
81 };
82
83 ET0430 {
84 clock-frequency = <9009000>;
85 hactive = <480>;
86 vactive = <272>;
87 hback-porch = <2>;
88 hsync-len = <41>;
89 hfront-porch = <2>;
90 vback-porch = <2>;
91 vsync-len = <10>;
92 vfront-porch = <2>;
93 hsync-active = <0>;
94 vsync-active = <0>;
95 de-active = <1>;
96 pixelclk-active = <1>;
97 };
98
99 ET0500 {
100 clock-frequency = <33264000>;
101 hactive = <800>;
102 vactive = <480>;
103 hback-porch = <88>;
104 hsync-len = <128>;
105 hfront-porch = <40>;
106 vback-porch = <33>;
107 vsync-len = <2>;
108 vfront-porch = <10>;
109 hsync-active = <0>;
110 vsync-active = <0>;
111 de-active = <1>;
112 pixelclk-active = <0>;
113 };
114
115 ET0700 { /* same as ET0500 */
116 clock-frequency = <33264000>;
117 hactive = <800>;
118 vactive = <480>;
119 hback-porch = <88>;
120 hsync-len = <128>;
121 hfront-porch = <40>;
122 vback-porch = <33>;
123 vsync-len = <2>;
124 vfront-porch = <10>;
125 hsync-active = <0>;
126 vsync-active = <0>;
127 de-active = <1>;
128 pixelclk-active = <0>;
129 };
130
131 ETQ570 {
132 clock-frequency = <6596040>;
133 hactive = <320>;
134 vactive = <240>;
135 hback-porch = <38>;
136 hsync-len = <30>;
137 hfront-porch = <30>;
138 vback-porch = <16>;
139 vsync-len = <3>;
140 vfront-porch = <4>;
141 hsync-active = <0>;
142 vsync-active = <0>;
143 de-active = <1>;
144 pixelclk-active = <0>;
145 };
146 };
147 };
148 };
149
150 backlight: backlight {
151 compatible = "pwm-backlight";
152 pwms = <&pwm2 0 500000 PWM_POLARITY_INVERTED>;
153 power-supply = <&reg_3v3>;
154 brightness-levels = <
155 0 1 2 3 4 5 6 7 8 9
156 10 11 12 13 14 15 16 17 18 19
157 20 21 22 23 24 25 26 27 28 29
158 30 31 32 33 34 35 36 37 38 39
159 40 41 42 43 44 45 46 47 48 49
160 50 51 52 53 54 55 56 57 58 59
161 60 61 62 63 64 65 66 67 68 69
162 70 71 72 73 74 75 76 77 78 79
163 80 81 82 83 84 85 86 87 88 89
164 90 91 92 93 94 95 96 97 98 99
165 100
166 >;
167 default-brightness-level = <50>;
168 };
169
170 regulators {
171 reg_lcd_pwr: regulator@5 {
172 compatible = "regulator-fixed";
173 reg = <5>;
174 regulator-name = "LCD POWER";
175 regulator-min-microvolt = <3300000>;
176 regulator-max-microvolt = <3300000>;
177 gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>;
178 enable-active-high;
179 regulator-boot-on;
180 };
181
182 reg_lcd_reset: regulator@6 {
183 compatible = "regulator-fixed";
184 reg = <6>;
185 regulator-name = "LCD RESET";
186 regulator-min-microvolt = <3300000>;
187 regulator-max-microvolt = <3300000>;
188 gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>;
189 enable-active-high;
190 regulator-boot-on;
191 };
192 };
193};
194
195&i2c3 {
196 pinctrl-names = "default";
197 pinctrl-0 = <&pinctrl_i2c3>;
198 status = "okay";
199
200 sgtl5000: codec@0a {
201 compatible = "fsl,sgtl5000";
202 reg = <0x0a>;
203 VDDA-supply = <&reg_2v5>;
204 VDDIO-supply = <&reg_3v3>;
205 clocks = <&mclk>;
206 };
207
208 polytouch: edt-ft5x06@38 {
209 compatible = "edt,edt-ft5x06";
210 reg = <0x38>;
211 pinctrl-names = "default";
212 pinctrl-0 = <&pinctrl_edt_ft5x06_1>;
213 interrupt-parent = <&gpio6>;
214 interrupts = <15 0>;
215 reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
216 wake-gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
217 };
218
219 touchscreen: tsc2007@48 {
220 compatible = "ti,tsc2007";
221 reg = <0x48>;
222 pinctrl-names = "default";
223 pinctrl-0 = <&pinctrl_tsc2007>;
224 interrupt-parent = <&gpio3>;
225 interrupts = <26 0>;
226 gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
227 ti,x-plate-ohms = <660>;
228 linux,wakeup;
229 };
230};
231
232&iomuxc {
233 imx53-tx53-x03x {
234 pinctrl_edt_ft5x06_1: edt-ft5x06grp-1 {
235 fsl,pins = <
236 MX53_PAD_NANDF_CS2__GPIO6_15 0x1f0 /* Interrupt */
237 MX53_PAD_EIM_A16__GPIO2_22 0x04 /* Reset */
238 MX53_PAD_EIM_A17__GPIO2_21 0x04 /* Wake */
239 >;
240 };
241
242 pinctrl_kpp: kppgrp {
243 fsl,pins = <
244 MX53_PAD_GPIO_9__KPP_COL_6 0x1f4
245 MX53_PAD_GPIO_4__KPP_COL_7 0x1f4
246 MX53_PAD_KEY_COL2__KPP_COL_2 0x1f4
247 MX53_PAD_KEY_COL3__KPP_COL_3 0x1f4
248 MX53_PAD_GPIO_2__KPP_ROW_6 0x1f4
249 MX53_PAD_GPIO_5__KPP_ROW_7 0x1f4
250 MX53_PAD_KEY_ROW2__KPP_ROW_2 0x1f4
251 MX53_PAD_KEY_ROW3__KPP_ROW_3 0x1f4
252 >;
253 };
254
255 pinctrl_rgb24_vga1: rgb24-vgagrp1 {
256 fsl,pins = <
257 MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK 0x5
258 MX53_PAD_DI0_PIN15__IPU_DI0_PIN15 0x5
259 MX53_PAD_DI0_PIN2__IPU_DI0_PIN2 0x5
260 MX53_PAD_DI0_PIN3__IPU_DI0_PIN3 0x5
261 MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0 0x5
262 MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1 0x5
263 MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2 0x5
264 MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3 0x5
265 MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4 0x5
266 MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5 0x5
267 MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6 0x5
268 MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7 0x5
269 MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8 0x5
270 MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9 0x5
271 MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10 0x5
272 MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11 0x5
273 MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12 0x5
274 MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13 0x5
275 MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14 0x5
276 MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15 0x5
277 MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16 0x5
278 MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17 0x5
279 MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18 0x5
280 MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19 0x5
281 MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20 0x5
282 MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21 0x5
283 MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22 0x5
284 MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23 0x5
285 >;
286 };
287
288 pinctrl_tsc2007: tsc2007grp {
289 fsl,pins = <
290 MX53_PAD_EIM_D26__GPIO3_26 0x1f0 /* Interrupt */
291 >;
292 };
293 };
294};
295
296&kpp {
297 pinctrl-names = "default";
298 pinctrl-0 = <&pinctrl_kpp>;
299 /* sample keymap */
300 /* row/col 0,1 are mapped to KPP row/col 6,7 */
301 linux,keymap = <
302 MATRIX_KEY(6, 6, KEY_POWER)
303 MATRIX_KEY(6, 7, KEY_KP0)
304 MATRIX_KEY(6, 2, KEY_KP1)
305 MATRIX_KEY(6, 3, KEY_KP2)
306 MATRIX_KEY(7, 6, KEY_KP3)
307 MATRIX_KEY(7, 7, KEY_KP4)
308 MATRIX_KEY(7, 2, KEY_KP5)
309 MATRIX_KEY(7, 3, KEY_KP6)
310 MATRIX_KEY(2, 6, KEY_KP7)
311 MATRIX_KEY(2, 7, KEY_KP8)
312 MATRIX_KEY(2, 2, KEY_KP9)
313 >;
314 status = "okay";
315};
diff --git a/arch/arm/boot/dts/imx53-tx53-x13x.dts b/arch/arm/boot/dts/imx53-tx53-x13x.dts
new file mode 100644
index 000000000000..64804719f0f4
--- /dev/null
+++ b/arch/arm/boot/dts/imx53-tx53-x13x.dts
@@ -0,0 +1,243 @@
1/*
2 * Copyright 2013 Lothar Waßmann <LW@KARO-electronics.de>
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
13#include "imx53-tx53.dtsi"
14#include <dt-bindings/input/input.h>
15
16/ {
17 model = "Ka-Ro electronics TX53 module (LVDS)";
18 compatible = "karo,tx53", "fsl,imx53";
19
20 aliases {
21 display = &lvds0;
22 lvds0 = &lvds0;
23 lvds1 = &lvds1;
24 };
25
26 backlight0: backlight0 {
27 compatible = "pwm-backlight";
28 pwms = <&pwm2 0 500000 0>;
29 power-supply = <&reg_3v3>;
30 brightness-levels = <
31 0 1 2 3 4 5 6 7 8 9
32 10 11 12 13 14 15 16 17 18 19
33 20 21 22 23 24 25 26 27 28 29
34 30 31 32 33 34 35 36 37 38 39
35 40 41 42 43 44 45 46 47 48 49
36 50 51 52 53 54 55 56 57 58 59
37 60 61 62 63 64 65 66 67 68 69
38 70 71 72 73 74 75 76 77 78 79
39 80 81 82 83 84 85 86 87 88 89
40 90 91 92 93 94 95 96 97 98 99
41 100
42 >;
43 default-brightness-level = <50>;
44 };
45
46 backlight1: backlight1 {
47 compatible = "pwm-backlight";
48 pwms = <&pwm1 0 500000 0>;
49 power-supply = <&reg_3v3>;
50 brightness-levels = <
51 0 1 2 3 4 5 6 7 8 9
52 10 11 12 13 14 15 16 17 18 19
53 20 21 22 23 24 25 26 27 28 29
54 30 31 32 33 34 35 36 37 38 39
55 40 41 42 43 44 45 46 47 48 49
56 50 51 52 53 54 55 56 57 58 59
57 60 61 62 63 64 65 66 67 68 69
58 70 71 72 73 74 75 76 77 78 79
59 80 81 82 83 84 85 86 87 88 89
60 90 91 92 93 94 95 96 97 98 99
61 100
62 >;
63 default-brightness-level = <50>;
64 };
65
66 regulators {
67 reg_lcd_pwr0: regulator@5 {
68 compatible = "regulator-fixed";
69 reg = <5>;
70 regulator-name = "LVDS0 POWER";
71 regulator-min-microvolt = <3300000>;
72 regulator-max-microvolt = <3300000>;
73 gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>;
74 enable-active-high;
75 regulator-boot-on;
76 };
77
78 reg_lcd_pwr1: regulator@6 {
79 compatible = "regulator-fixed";
80 reg = <6>;
81 regulator-name = "LVDS1 POWER";
82 regulator-min-microvolt = <3300000>;
83 regulator-max-microvolt = <3300000>;
84 gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>;
85 enable-active-high;
86 regulator-boot-on;
87 };
88 };
89};
90
91&i2c2 {
92 pinctrl-names = "default";
93 pinctrl-0 = <&pinctrl_i2c2>;
94 status = "okay";
95
96 touchscreen2: eeti@04 {
97 compatible = "eeti,egalax_ts";
98 reg = <0x04>;
99 pinctrl-names = "default";
100 pinctrl-0 = <&pinctrl_eeti2>;
101 interrupt-parent = <&gpio3>;
102 interrupts = <23 0>;
103 wakeup-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
104 linux,wakeup;
105 };
106};
107
108&i2c3 {
109 pinctrl-names = "default";
110 pinctrl-0 = <&pinctrl_i2c3>;
111 status = "okay";
112
113 sgtl5000: codec@0a {
114 compatible = "fsl,sgtl5000";
115 reg = <0x0a>;
116 VDDA-supply = <&reg_2v5>;
117 VDDIO-supply = <&reg_3v3>;
118 clocks = <&mclk>;
119 };
120
121 touchscreen1: eeti@04 {
122 compatible = "eeti,egalax_ts";
123 reg = <0x04>;
124 pinctrl-names = "default";
125 pinctrl-0 = <&pinctrl_eeti1>;
126 interrupt-parent = <&gpio3>;
127 interrupts = <22 0>;
128 wakeup-gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;
129 linux,wakeup;
130 };
131};
132
133&iomuxc {
134 imx53-tx53-x13x {
135 pinctrl_i2c2: i2c2-grp1 {
136 fsl,pins = <
137 MX53_PAD_KEY_ROW3__I2C2_SDA 0xc0000000
138 MX53_PAD_KEY_COL3__I2C2_SCL 0xc0000000
139 >;
140 };
141
142 pinctrl_lvds0: lvds0grp {
143 fsl,pins = <
144 MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 0x80000000
145 MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 0x80000000
146 MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 0x80000000
147 MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 0x80000000
148 MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 0x80000000
149 >;
150 };
151
152 pinctrl_lvds1: lvds1grp {
153 fsl,pins = <
154 MX53_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3 0x80000000
155 MX53_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2 0x80000000
156 MX53_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK 0x80000000
157 MX53_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1 0x80000000
158 MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0 0x80000000
159 >;
160 };
161
162 pinctrl_pwm1: pwm1grp {
163 fsl,pins = <MX53_PAD_GPIO_9__PWM1_PWMO 0x04>;
164 };
165
166 pinctrl_eeti1: eeti1grp {
167 fsl,pins = <
168 MX53_PAD_EIM_D22__GPIO3_22 0x1f0 /* Interrupt */
169 >;
170 };
171
172 pinctrl_eeti2: eeti2grp {
173 fsl,pins = <
174 MX53_PAD_EIM_D23__GPIO3_23 0x1f0 /* Interrupt */
175 >;
176 };
177 };
178};
179
180&ldb {
181 pinctrl-names = "default";
182 pinctrl-0 = <&pinctrl_lvds0 &pinctrl_lvds1>;
183 status = "okay";
184
185 lvds0: lvds-channel@0 {
186 fsl,data-mapping = "jeida";
187 fsl,data-width = <24>;
188 status = "okay";
189
190 display-timings {
191 native-mode = <&lvds_timing0>;
192 lvds_timing0: hsd100pxn1 {
193 clock-frequency = <65000000>;
194 hactive = <1024>;
195 vactive = <768>;
196 hback-porch = <220>;
197 hsync-len = <60>;
198 hfront-porch = <40>;
199 vback-porch = <21>;
200 vsync-len = <10>;
201 vfront-porch = <7>;
202 hsync-active = <0>;
203 vsync-active = <0>;
204 de-active = <1>;
205 pixelclk-active = <0>;
206 };
207 };
208 };
209
210 lvds1: lvds-channel@1 {
211 fsl,data-mapping = "jeida";
212 fsl,data-width = <24>;
213 status = "okay";
214
215 display-timings {
216 native-mode = <&lvds_timing1>;
217 lvds_timing1: hsd100pxn1 {
218 clock-frequency = <65000000>;
219 hactive = <1024>;
220 vactive = <768>;
221 hback-porch = <220>;
222 hsync-len = <60>;
223 hfront-porch = <40>;
224 vback-porch = <21>;
225 vsync-len = <10>;
226 vfront-porch = <7>;
227 hsync-active = <0>;
228 vsync-active = <0>;
229 de-active = <1>;
230 pixelclk-active = <0>;
231 };
232 };
233 };
234};
235
236&pwm1 {
237 pinctrl-names = "default";
238 pinctrl-0 = <&pinctrl_pwm1>;
239};
240
241&sata {
242 status = "okay";
243};
diff --git a/arch/arm/boot/dts/imx53-tx53.dtsi b/arch/arm/boot/dts/imx53-tx53.dtsi
index db4255c8e7e8..a44403a37af7 100644
--- a/arch/arm/boot/dts/imx53-tx53.dtsi
+++ b/arch/arm/boot/dts/imx53-tx53.dtsi
@@ -1,22 +1,69 @@
1/* 1/*
2 * Copyright 2013 Steffen Trumtrar <s.trumtrar@pengutronix.de> 2 * Copyright 2012 <LW@KARO-electronics.de>
3 * based on imx53-qsb.dts
4 * Copyright 2011 Freescale Semiconductor, Inc.
5 * Copyright 2011 Linaro Ltd.
3 * 6 *
4 * The code contained herein is licensed under the GNU General Public 7 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License 8 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations: 9 * Version 2 at the following locations:
7 * 10 *
8 * http://www.opensource.org/licenses/gpl-license.html 11 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html 12 * http://www.gnu.org/copyleft/gpl.html
10 */ 13 */
11 14
12/include/ "imx53.dtsi" 15#include "imx53.dtsi"
16#include <dt-bindings/gpio/gpio.h>
13 17
14/ { 18/ {
15 model = "Ka-Ro TX53"; 19 model = "Ka-Ro electronics TX53 module";
16 compatible = "karo,tx53", "fsl,imx53"; 20 compatible = "karo,tx53", "fsl,imx53";
17 21
18 memory { 22 aliases {
19 reg = <0x70000000 0x40000000>; /* Up to 1GiB */ 23 can0 = &can2; /* Make the can interface indices consistent with TX28/TX48 modules */
24 can1 = &can1;
25 ipu = &ipu;
26 reg_can_xcvr = &reg_can_xcvr;
27 usbh1 = &usbh1;
28 usbotg = &usbotg;
29 };
30
31 clocks {
32 ckih1 {
33 clock-frequency = <0>;
34 };
35
36 mclk: clock@0 {
37 compatible = "fixed-clock";
38 reg = <0>;
39 #clock-cells = <0>;
40 clock-frequency = <27000000>;
41 };
42 };
43
44 gpio-keys {
45 compatible = "gpio-keys";
46 pinctrl-names = "default";
47 pinctrl-0 = <&pinctrl_gpio_key>;
48
49 power {
50 label = "Power Button";
51 gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
52 linux,code = <116>; /* KEY_POWER */
53 gpio-key,wakeup;
54 };
55 };
56
57 leds {
58 compatible = "gpio-leds";
59 pinctrl-names = "default";
60 pinctrl-0 = <&pinctrl_stk5led>;
61
62 user {
63 label = "Heartbeat";
64 gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
65 linux,default-trigger = "heartbeat";
66 };
20 }; 67 };
21 68
22 regulators { 69 regulators {
@@ -24,102 +71,481 @@
24 #address-cells = <1>; 71 #address-cells = <1>;
25 #size-cells = <0>; 72 #size-cells = <0>;
26 73
27 reg_3p3v: regulator@0 { 74 reg_2v5: regulator@0 {
28 compatible = "regulator-fixed"; 75 compatible = "regulator-fixed";
29 reg = <0>; 76 reg = <0>;
30 regulator-name = "3P3V"; 77 regulator-name = "2V5";
78 regulator-min-microvolt = <2500000>;
79 regulator-max-microvolt = <2500000>;
80 };
81
82 reg_3v3: regulator@1 {
83 compatible = "regulator-fixed";
84 reg = <1>;
85 regulator-name = "3V3";
86 regulator-min-microvolt = <3300000>;
87 regulator-max-microvolt = <3300000>;
88 };
89
90 reg_can_xcvr: regulator@2 {
91 compatible = "regulator-fixed";
92 reg = <2>;
93 regulator-name = "CAN XCVR";
31 regulator-min-microvolt = <3300000>; 94 regulator-min-microvolt = <3300000>;
32 regulator-max-microvolt = <3300000>; 95 regulator-max-microvolt = <3300000>;
33 regulator-always-on; 96 pinctrl-names = "default";
97 pinctrl-0 = <&pinctrl_can_xcvr>;
98 gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
99 enable-active-low;
34 }; 100 };
101
102 reg_usbh1_vbus: regulator@3 {
103 compatible = "regulator-fixed";
104 reg = <3>;
105 regulator-name = "usbh1_vbus";
106 regulator-min-microvolt = <5000000>;
107 regulator-max-microvolt = <5000000>;
108 pinctrl-names = "default";
109 pinctrl-0 = <&pinctrl_usbh1_vbus>;
110 gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
111 enable-active-high;
112 };
113
114 reg_usbotg_vbus: regulator@4 {
115 compatible = "regulator-fixed";
116 reg = <4>;
117 regulator-name = "usbotg_vbus";
118 regulator-min-microvolt = <5000000>;
119 regulator-max-microvolt = <5000000>;
120 pinctrl-names = "default";
121 pinctrl-0 = <&pinctrl_usbotg_vbus>;
122 gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
123 enable-active-high;
124 };
125 };
126
127 sound {
128 compatible = "karo,tx53-audio-sgtl5000", "fsl,imx-audio-sgtl5000";
129 model = "tx53-audio-sgtl5000";
130 ssi-controller = <&ssi1>;
131 audio-codec = <&sgtl5000>;
132 audio-routing =
133 "MIC_IN", "Mic Jack",
134 "Mic Jack", "Mic Bias",
135 "Headphone Jack", "HP_OUT";
136 /* '1' based port numbers according to datasheet names */
137 mux-int-port = <1>;
138 mux-ext-port = <5>;
35 }; 139 };
36}; 140};
37 141
142&audmux {
143 pinctrl-names = "default";
144 pinctrl-0 = <&pinctrl_ssi1>;
145 status = "okay";
146};
147
38&can1 { 148&can1 {
39 pinctrl-names = "default"; 149 pinctrl-names = "default";
40 pinctrl-0 = <&pinctrl_can1_2>; 150 pinctrl-0 = <&pinctrl_can1>;
41 status = "disabled"; 151 xceiver-supply = <&reg_can_xcvr>;
152 status = "okay";
42}; 153};
43 154
44&can2 { 155&can2 {
45 pinctrl-names = "default"; 156 pinctrl-names = "default";
46 pinctrl-0 = <&pinctrl_can2_1>; 157 pinctrl-0 = <&pinctrl_can2>;
47 status = "disabled"; 158 xceiver-supply = <&reg_can_xcvr>;
159 status = "okay";
48}; 160};
49 161
50&ecspi1 { 162&ecspi1 {
51 pinctrl-names = "default"; 163 pinctrl-names = "default";
52 pinctrl-0 = <&pinctrl_ecspi1_2>; 164 pinctrl-0 = <&pinctrl_ecspi1>;
53 status = "disabled"; 165 fsl,spi-num-chipselects = <2>;
166 status = "okay";
167
168 cs-gpios = <
169 &gpio2 30 GPIO_ACTIVE_HIGH
170 &gpio3 19 GPIO_ACTIVE_HIGH
171 >;
172
173 spidev0: spi@0 {
174 compatible = "spidev";
175 reg = <0>;
176 spi-max-frequency = <54000000>;
177 };
178
179 spidev1: spi@1 {
180 compatible = "spidev";
181 reg = <1>;
182 spi-max-frequency = <54000000>;
183 };
54}; 184};
55 185
56&esdhc1 { 186&esdhc1 {
187 cd-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>;
188 fsl,wp-controller;
57 pinctrl-names = "default"; 189 pinctrl-names = "default";
58 pinctrl-0 = <&pinctrl_esdhc1_2>; 190 pinctrl-0 = <&pinctrl_esdhc1>;
59 status = "disabled"; 191 status = "okay";
60}; 192};
61 193
62&esdhc2 { 194&esdhc2 {
195 cd-gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>;
196 fsl,wp-controller;
63 pinctrl-names = "default"; 197 pinctrl-names = "default";
64 pinctrl-0 = <&pinctrl_esdhc2_1>; 198 pinctrl-0 = <&pinctrl_esdhc2>;
65 status = "disabled"; 199 status = "okay";
66}; 200};
67 201
68&fec { 202&fec {
69 pinctrl-names = "default"; 203 pinctrl-names = "default";
70 pinctrl-0 = <&pinctrl_fec_1>; 204 pinctrl-0 = <&pinctrl_fec>;
71 phy-mode = "rmii"; 205 phy-mode = "rmii";
72 status = "disabled"; 206 phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_HIGH>;
207 phy-handle = <&phy0>;
208 mac-address = [000000000000]; /* placeholder; will be overwritten by bootloader */
209 status = "okay";
210
211 phy0: ethernet-phy@0 {
212 interrupt-parent = <&gpio2>;
213 interrupts = <4>;
214 device_type = "ethernet-phy";
215 };
73}; 216};
74 217
75&i2c3 { 218&i2c1 {
76 pinctrl-names = "default"; 219 pinctrl-names = "default";
77 pinctrl-0 = <&pinctrl_i2c3_2>; 220 pinctrl-0 = <&pinctrl_i2c1>;
78 status = "disabled"; 221 clock-frequency = <400000>;
222 status = "okay";
223
224 rtc1: ds1339@68 {
225 compatible = "dallas,ds1339";
226 reg = <0x68>;
227 pinctrl-names = "default";
228 pinctrl-0 = <&pinctrl_ds1339>;
229 interrupt-parent = <&gpio4>;
230 interrupts = <20 0>;
231 };
79}; 232};
80 233
81&owire { 234&iomuxc {
82 pinctrl-names = "default"; 235 pinctrl-names = "default";
83 pinctrl-0 = <&pinctrl_owire_1>; 236 pinctrl-0 = <&pinctrl_hog>;
84 status = "disabled"; 237
238 imx53-tx53 {
239 pinctrl_hog: hoggrp {
240 /* pins not in use by any device on the Starterkit board series */
241 fsl,pins = <
242 /* CMOS Sensor Interface */
243 MX53_PAD_CSI0_DAT12__GPIO5_30 0x1f4
244 MX53_PAD_CSI0_DAT13__GPIO5_31 0x1f4
245 MX53_PAD_CSI0_DAT14__GPIO6_0 0x1f4
246 MX53_PAD_CSI0_DAT15__GPIO6_1 0x1f4
247 MX53_PAD_CSI0_DAT16__GPIO6_2 0x1f4
248 MX53_PAD_CSI0_DAT17__GPIO6_3 0x1f4
249 MX53_PAD_CSI0_DAT18__GPIO6_4 0x1f4
250 MX53_PAD_CSI0_DAT19__GPIO6_5 0x1f4
251 MX53_PAD_CSI0_MCLK__GPIO5_19 0x1f4
252 MX53_PAD_CSI0_VSYNC__GPIO5_21 0x1f4
253 MX53_PAD_CSI0_PIXCLK__GPIO5_18 0x1f4
254 MX53_PAD_GPIO_0__GPIO1_0 0x1f4
255 /* Module Specific Signal */
256 /* MX53_PAD_NANDF_CS2__GPIO6_15 0x1f4 maybe used by EDT-FT5x06 */
257 /* MX53_PAD_EIM_A16__GPIO2_22 0x1f4 maybe used by EDT-FT5x06 */
258 MX53_PAD_EIM_D29__GPIO3_29 0x1f4
259 MX53_PAD_EIM_EB3__GPIO2_31 0x1f4
260 /* MX53_PAD_EIM_A17__GPIO2_21 0x1f4 maybe used by EDT-FT5x06 */
261 /* MX53_PAD_EIM_A18__GPIO2_20 0x1f4 used by LED */
262 MX53_PAD_EIM_A19__GPIO2_19 0x1f4
263 MX53_PAD_EIM_A20__GPIO2_18 0x1f4
264 MX53_PAD_EIM_A21__GPIO2_17 0x1f4
265 MX53_PAD_EIM_A22__GPIO2_16 0x1f4
266 MX53_PAD_EIM_A23__GPIO6_6 0x1f4
267 MX53_PAD_EIM_A24__GPIO5_4 0x1f4
268 MX53_PAD_CSI0_DAT8__GPIO5_26 0x1f4
269 MX53_PAD_CSI0_DAT9__GPIO5_27 0x1f4
270 MX53_PAD_CSI0_DAT10__GPIO5_28 0x1f4
271 MX53_PAD_CSI0_DAT11__GPIO5_29 0x1f4
272 /* MX53_PAD_EIM_D22__GPIO3_22 0x1f4 maybe used by EETI touchpanel driver */
273 /* MX53_PAD_EIM_D23__GPIO3_23 0x1f4 maybe used by EETI touchpanel driver */
274 MX53_PAD_GPIO_13__GPIO4_3 0x1f4
275 MX53_PAD_EIM_CS0__GPIO2_23 0x1f4
276 MX53_PAD_EIM_CS1__GPIO2_24 0x1f4
277 MX53_PAD_CSI0_DATA_EN__GPIO5_20 0x1f4
278 MX53_PAD_EIM_WAIT__GPIO5_0 0x1f4
279 MX53_PAD_EIM_EB0__GPIO2_28 0x1f4
280 MX53_PAD_EIM_EB1__GPIO2_29 0x1f4
281 MX53_PAD_EIM_OE__GPIO2_25 0x1f4
282 MX53_PAD_EIM_LBA__GPIO2_27 0x1f4
283 MX53_PAD_EIM_RW__GPIO2_26 0x1f4
284 MX53_PAD_EIM_DA8__GPIO3_8 0x1f4
285 MX53_PAD_EIM_DA9__GPIO3_9 0x1f4
286 MX53_PAD_EIM_DA10__GPIO3_10 0x1f4
287 MX53_PAD_EIM_DA11__GPIO3_11 0x1f4
288 MX53_PAD_EIM_DA12__GPIO3_12 0x1f4
289 MX53_PAD_EIM_DA13__GPIO3_13 0x1f4
290 MX53_PAD_EIM_DA14__GPIO3_14 0x1f4
291 MX53_PAD_EIM_DA15__GPIO3_15 0x1f4
292 >;
293 };
294
295 pinctrl_can1: can1grp {
296 fsl,pins = <
297 MX53_PAD_GPIO_7__CAN1_TXCAN 0x80000000
298 MX53_PAD_GPIO_8__CAN1_RXCAN 0x80000000
299 >;
300 };
301
302 pinctrl_can2: can2grp {
303 fsl,pins = <
304 MX53_PAD_KEY_COL4__CAN2_TXCAN 0x80000000
305 MX53_PAD_KEY_ROW4__CAN2_RXCAN 0x80000000
306 >;
307 };
308
309 pinctrl_can_xcvr: can-xcvrgrp {
310 fsl,pins = <MX53_PAD_DISP0_DAT0__GPIO4_21 0xe0>; /* Flexcan XCVR enable */
311 };
312
313 pinctrl_ds1339: ds1339grp {
314 fsl,pins = <MX53_PAD_DI0_PIN4__GPIO4_20 0xe0>;
315 };
316
317 pinctrl_ecspi1: ecspi1grp {
318 fsl,pins = <
319 MX53_PAD_GPIO_19__ECSPI1_RDY 0x80000000
320 MX53_PAD_EIM_EB2__ECSPI1_SS0 0x80000000
321 MX53_PAD_EIM_D16__ECSPI1_SCLK 0x80000000
322 MX53_PAD_EIM_D17__ECSPI1_MISO 0x80000000
323 MX53_PAD_EIM_D18__ECSPI1_MOSI 0x80000000
324 MX53_PAD_EIM_D19__ECSPI1_SS1 0x80000000
325 >;
326 };
327
328 pinctrl_esdhc1: esdhc1grp {
329 fsl,pins = <
330 MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
331 MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
332 MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
333 MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
334 MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
335 MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
336 MX53_PAD_EIM_D24__GPIO3_24 0x1f0
337 >;
338 };
339
340 pinctrl_esdhc2: esdhc2grp {
341 fsl,pins = <
342 MX53_PAD_SD2_CMD__ESDHC2_CMD 0x1d5
343 MX53_PAD_SD2_CLK__ESDHC2_CLK 0x1d5
344 MX53_PAD_SD2_DATA0__ESDHC2_DAT0 0x1d5
345 MX53_PAD_SD2_DATA1__ESDHC2_DAT1 0x1d5
346 MX53_PAD_SD2_DATA2__ESDHC2_DAT2 0x1d5
347 MX53_PAD_SD2_DATA3__ESDHC2_DAT3 0x1d5
348 MX53_PAD_EIM_D25__GPIO3_25 0x1f0
349 >;
350 };
351
352 pinctrl_fec: fecgrp {
353 fsl,pins = <
354 MX53_PAD_FEC_MDC__FEC_MDC 0x80000000
355 MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000
356 MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000
357 MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000
358 MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000
359 MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000
360 MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000
361 MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000
362 MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000
363 MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000
364 >;
365 };
366
367 pinctrl_gpio_key: gpio-keygrp {
368 fsl,pins = <MX53_PAD_EIM_A25__GPIO5_2 0x1f4>;
369 };
370
371 pinctrl_i2c1: i2c1grp {
372 fsl,pins = <
373 MX53_PAD_EIM_D21__I2C1_SCL 0xc0000000
374 MX53_PAD_EIM_D28__I2C1_SDA 0xc0000000
375 >;
376 };
377
378 pinctrl_i2c3: i2c3grp {
379 fsl,pins = <
380 MX53_PAD_GPIO_3__I2C3_SCL 0xc0000000
381 MX53_PAD_GPIO_6__I2C3_SDA 0xc0000000
382 >;
383 };
384
385 pinctrl_nand: nandgrp {
386 fsl,pins = <
387 MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B 0x4
388 MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B 0x4
389 MX53_PAD_NANDF_CLE__EMI_NANDF_CLE 0x4
390 MX53_PAD_NANDF_ALE__EMI_NANDF_ALE 0x4
391 MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B 0xe0
392 MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0 0xe0
393 MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0 0x4
394 MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 0xa4
395 MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 0xa4
396 MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 0xa4
397 MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 0xa4
398 MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 0xa4
399 MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 0xa4
400 MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 0xa4
401 MX53_PAD_EIM_DA7__EMI_NAND_WEIM_DA_7 0xa4
402 >;
403 };
404
405 pinctrl_pwm2: pwm2grp {
406 fsl,pins = <
407 MX53_PAD_GPIO_1__PWM2_PWMO 0x80000000
408 >;
409 };
410
411 pinctrl_ssi1: ssi1grp {
412 fsl,pins = <
413 MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC 0x80000000
414 MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD 0x80000000
415 MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS 0x80000000
416 MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD 0x80000000
417 >;
418 };
419
420 pinctrl_ssi2: ssi2grp {
421 fsl,pins = <
422 MX53_PAD_CSI0_DAT4__AUDMUX_AUD3_TXC 0x80000000
423 MX53_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD 0x80000000
424 MX53_PAD_CSI0_DAT6__AUDMUX_AUD3_TXFS 0x80000000
425 MX53_PAD_CSI0_DAT7__AUDMUX_AUD3_RXD 0x80000000
426 MX53_PAD_EIM_D27__GPIO3_27 0x1f0
427 >;
428 };
429
430 pinctrl_stk5led: stk5ledgrp {
431 fsl,pins = <MX53_PAD_EIM_A18__GPIO2_20 0xc0>;
432 };
433
434 pinctrl_uart1: uart1grp {
435 fsl,pins = <
436 MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4
437 MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4
438 MX53_PAD_PATA_RESET_B__UART1_CTS 0x1c5
439 MX53_PAD_PATA_IORDY__UART1_RTS 0x1c5
440 >;
441 };
442
443 pinctrl_uart2: uart2grp {
444 fsl,pins = <
445 MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1c5
446 MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1c5
447 MX53_PAD_PATA_DIOR__UART2_RTS 0x1c5
448 MX53_PAD_PATA_INTRQ__UART2_CTS 0x1c5
449 >;
450 };
451
452 pinctrl_uart3: uart3grp {
453 fsl,pins = <
454 MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
455 MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
456 MX53_PAD_PATA_DA_1__UART3_CTS 0x1e4
457 MX53_PAD_PATA_DA_2__UART3_RTS 0x1e4
458 >;
459 };
460
461 pinctrl_usbh1: usbh1grp {
462 fsl,pins = <
463 MX53_PAD_EIM_D30__GPIO3_30 0x100 /* OC */
464 >;
465 };
466
467 pinctrl_usbh1_vbus: usbh1-vbusgrp {
468 fsl,pins = <
469 MX53_PAD_EIM_D31__GPIO3_31 0xe0 /* VBUS ENABLE */
470 >;
471 };
472
473 pinctrl_usbotg_vbus: usbotg-vbusgrp {
474 fsl,pins = <
475 MX53_PAD_GPIO_7__GPIO1_7 0xe0 /* VBUS ENABLE */
476 MX53_PAD_GPIO_8__GPIO1_8 0x100 /* OC */
477 >;
478 };
479 };
480};
481
482&ipu {
483 status = "okay";
484};
485
486&nfc {
487 pinctrl-names = "default";
488 pinctrl-0 = <&pinctrl_nand>;
489 nand-bus-width = <8>;
490 nand-ecc-mode = "hw";
491 nand-on-flash-bbt;
492 status = "okay";
85}; 493};
86 494
87&pwm2 { 495&pwm2 {
88 pinctrl-names = "default"; 496 pinctrl-names = "default";
89 pinctrl-0 = <&pinctrl_pwm2_1>; 497 pinctrl-0 = <&pinctrl_pwm2>;
90 status = "disabled"; 498 #pwm-cells = <3>;
499};
500
501&sdma {
502 fsl,sdma-ram-script-name = "sdma-imx53.bin";
91}; 503};
92 504
93&ssi1 { 505&ssi1 {
94 pinctrl-names = "default"; 506 fsl,mode = "i2s-slave";
95 pinctrl-0 = <&pinctrl_audmux_1>; 507 codec-handle = <&sgtl5000>;
96 status = "disabled"; 508 status = "okay";
97}; 509};
98 510
99&ssi2 { 511&ssi2 {
100 pinctrl-names = "default";
101 pinctrl-0 = <&pinctrl_audmux_2>;
102 status = "disabled"; 512 status = "disabled";
103}; 513};
104 514
105&uart1 { 515&uart1 {
106 pinctrl-names = "default"; 516 pinctrl-names = "default";
107 pinctrl-0 = <&pinctrl_uart1_2>, 517 pinctrl-0 = <&pinctrl_uart1>;
108 <&pinctrl_uart1_3>;
109 fsl,uart-has-rtscts; 518 fsl,uart-has-rtscts;
110 status = "disabled"; 519 status = "okay";
111}; 520};
112 521
113&uart2 { 522&uart2 {
114 pinctrl-names = "default"; 523 pinctrl-names = "default";
115 pinctrl-0 = <&pinctrl_uart2_2>; 524 pinctrl-0 = <&pinctrl_uart2>;
116 fsl,uart-has-rtscts; 525 fsl,uart-has-rtscts;
117 status = "disabled"; 526 status = "okay";
118}; 527};
119 528
120&uart3 { 529&uart3 {
121 pinctrl-names = "default"; 530 pinctrl-names = "default";
122 pinctrl-0 = <&pinctrl_uart3_1>; 531 pinctrl-0 = <&pinctrl_uart3>;
123 fsl,uart-has-rtscts; 532 fsl,uart-has-rtscts;
124 status = "disabled"; 533 status = "okay";
534};
535
536&usbh1 {
537 pinctrl-names = "default";
538 pinctrl-0 = <&pinctrl_usbh1>;
539 phy_type = "utmi";
540 disable-over-current;
541 vbus-supply = <&reg_usbh1_vbus>;
542 status = "okay";
543};
544
545&usbotg {
546 phy_type = "utmi";
547 dr_mode = "peripheral";
548 disable-over-current;
549 vbus-supply = <&reg_usbotg_vbus>;
550 status = "okay";
125}; 551};
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-20 22:17:18 -0400