Merge tag 'sirf-dts-for-3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux into next/dt

ARM: sirf: dts update for 3.14

From Barry Song:
some missed dt nodes or props for sirf dts for 3.14.
Among them:
 - add lost clocks for cphifbg
 - add lost bus_width, clock and status for sdhci
 - add clock, frequence-voltage table for CPU0
 - add lost minigpsrtc device node
 - add lost usp1_uart_nostreamctrl pin group for atlas6
 - add pin group for USP0 with only RX or TX frame sync

* tag 'sirf-dts-for-3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux:
  ARM: dts: SiRF: add pin group for USP0 with only RX or TX frame sync
  ARM: dts: SiRF: add lost usp1_uart_nostreamctrl pin group for atlas6
  ARM: dts: sirf: add lost minigpsrtc device node
  ARM: dts: sirf: add clock, frequence-voltage table for CPU0
  ARM: dts: sirf: add lost bus_width, clock and status for sdhci
  ARM: dts: sirf: add lost clocks for cphifbg

Signed-off-by: Kevin Hilman <khilman@linaro.org>

2 files changed, 67 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/atlas6.dtsi b/arch/arm/boot/dts/atlas6.dtsi
index 978bab4991df..f8674bcc4489 100644
--- a/arch/arm/boot/dts/atlas6.dtsi
+++ b/arch/arm/boot/dts/atlas6.dtsi
@@ -27,6 +27,15 @@
                         timebase-frequency = <0>;
                         bus-frequency = <0>;
                         clock-frequency = <0>;
+                        clocks = <&clks 12>;
+                        operating-points = <
+                                /* kHz    uV */
+                                200000  1025000
+                                400000  1025000
+                                600000  1050000
+                                800000  1100000
+                        >;
+                        clock-latency = <150000>;
                 };
         };
 
@@ -69,6 +78,7 @@
                         cphifbg@88030000 {
                                 compatible = "sirf,prima2-cphifbg";
                                 reg = <0x88030000 0x1000>;
+                                clocks = <&clks 42>;
                         };
                 };
 
@@ -546,6 +556,12 @@
                                                 sirf,function = "usp1";
                                         };
                                 };
+                                usp1_uart_nostreamctrl_pins_a: usp1@1 {
+                                        usp1 {
+                                                sirf,pins = "usp1_uart_nostreamctrl_grp";
+                                                sirf,function = "usp1_uart_nostreamctrl";
+                                        };
+                                };
                                 usb0_upli_drvbus_pins_a: usb0_upli_drvbus@0 {
                                         usb0_upli_drvbus {
                                                 sirf,pins = "usb0_upli_drvbusgrp";
@@ -636,6 +652,7 @@
                                         reg = <0x56100000 0x100000>;
                                         interrupts = <38>;
                                         status = "disabled";
+                                        bus-width = <4>;
                                         clocks = <&clks 36>;
                                 };
 
@@ -645,6 +662,7 @@
                                         reg = <0x56200000 0x100000>;
                                         interrupts = <23>;
                                         status = "disabled";
+                                        bus-width = <4>;
                                         clocks = <&clks 37>;
                                 };
 
@@ -654,6 +672,7 @@
                                         reg = <0x56300000 0x100000>;
                                         interrupts = <23>;
                                         status = "disabled";
+                                        bus-width = <4>;
                                         clocks = <&clks 37>;
                                 };
 
@@ -663,6 +682,7 @@
                                         reg = <0x56500000 0x100000>;
                                         interrupts = <39>;
                                         status = "disabled";
+                                        bus-width = <4>;
                                         clocks = <&clks 38>;
                                 };
 
@@ -697,6 +717,12 @@
                                 interrupts = <52 53 54>;
                         };
 
+                        minigpsrtc@2000 {
+                                compatible = "sirf,prima2-minigpsrtc";
+                                reg = <0x2000 0x1000>;
+                                interrupts = <54>;
+                        };
+
                         pwrc@3000 {
                                 compatible = "sirf,prima2-pwrc";
                                 reg = <0x3000 0x1000>;
diff --git a/arch/arm/boot/dts/prima2.dtsi b/arch/arm/boot/dts/prima2.dtsi
index daee58944e15..0e219932d7cc 100644
--- a/arch/arm/boot/dts/prima2.dtsi
+++ b/arch/arm/boot/dts/prima2.dtsi
@@ -29,6 +29,15 @@
                         timebase-frequency = <0>;
                         bus-frequency = <0>;
                         clock-frequency = <0>;
+                        clocks = <&clks 12>;
+                        operating-points = <
+                                /* kHz    uV */
+                                200000  1025000
+                                400000  1025000
+                                664000  1050000
+                                800000  1100000
+                        >;
+                        clock-latency = <150000>;
                 };
         };
 
@@ -80,6 +89,7 @@
                         cphifbg@88030000 {
                                 compatible = "sirf,prima2-cphifbg";
                                 reg = <0x88030000 0x1000>;
+                                clocks = <&clks 42>;
                         };
                 };
 
@@ -540,6 +550,18 @@
                                                         "usp0_uart_nostreamctrl";
                                         };
                                 };
+                                usp0_only_utfs_pins_a: usp0@2 {
+                                        usp0 {
+                                                sirf,pins = "usp0_only_utfs_grp";
+                                                sirf,function = "usp0_only_utfs";
+                                        };
+                                };
+                                usp0_only_urfs_pins_a: usp0@3 {
+                                        usp0 {
+                                                sirf,pins = "usp0_only_urfs_grp";
+                                                sirf,function = "usp0_only_urfs";
+                                        };
+                                };
                                 usp1_pins_a: usp1@0 {
                                         usp1 {
                                                 sirf,pins = "usp1grp";
@@ -648,6 +670,9 @@
                                         compatible = "sirf,prima2-sdhc";
                                         reg = <0x56000000 0x100000>;
                                         interrupts = <38>;
+                                        status = "disabled";
+                                        bus-width = <8>;
+                                        clocks = <&clks 36>;
                                 };
 
                                 sd1: sdhci@56100000 {
@@ -655,6 +680,9 @@
                                         compatible = "sirf,prima2-sdhc";
                                         reg = <0x56100000 0x100000>;
                                         interrupts = <38>;
+                                        status = "disabled";
+                                        bus-width = <4>;
+                                        clocks = <&clks 36>;
                                 };
 
                                 sd2: sdhci@56200000 {
@@ -662,6 +690,8 @@
                                         compatible = "sirf,prima2-sdhc";
                                         reg = <0x56200000 0x100000>;
                                         interrupts = <23>;
+                                        status = "disabled";
+                                        clocks = <&clks 37>;
                                 };
 
                                 sd3: sdhci@56300000 {
@@ -669,6 +699,8 @@
                                         compatible = "sirf,prima2-sdhc";
                                         reg = <0x56300000 0x100000>;
                                         interrupts = <23>;
+                                        status = "disabled";
+                                        clocks = <&clks 37>;
                                 };
 
                                 sd4: sdhci@56400000 {
@@ -676,6 +708,8 @@
                                         compatible = "sirf,prima2-sdhc";
                                         reg = <0x56400000 0x100000>;
                                         interrupts = <39>;
+                                        status = "disabled";
+                                        clocks = <&clks 38>;
                                 };
 
                                 sd5: sdhci@56500000 {
@@ -683,6 +717,7 @@
                                         compatible = "sirf,prima2-sdhc";
                                         reg = <0x56500000 0x100000>;
                                         interrupts = <39>;
+                                        clocks = <&clks 38>;
                                 };
 
                                 pci-copy@57900000 {
@@ -716,6 +751,12 @@
                                 interrupts = <52 53 54>;
                         };
 
+                        minigpsrtc@2000 {
+                                compatible = "sirf,prima2-minigpsrtc";
+                                reg = <0x2000 0x1000>;
+                                interrupts = <54>;
+                        };
+
                         pwrc@3000 {
                                 compatible = "sirf,prima2-pwrc";
                                 reg = <0x3000 0x1000>;