diff options
author | Axel Lin <axel.lin@ingics.com> | 2014-02-10 08:49:49 -0500 |
---|---|---|
committer | Mark Brown <broonie@linaro.org> | 2014-02-11 07:07:50 -0500 |
commit | 44830b4c2f978a1bc667d1557d26277a7e593cf5 (patch) | |
tree | df3f0a98769f815e38b1934f7727bddbc03d7e9a | |
parent | 383840d92f8e5e4c3ab4090e5d8f2ca5cf893802 (diff) |
spi: tegra20-sflash: Convert to use master->max_speed_hz
Use master->max_speed_hz instead of tspi->spi_max_frequency, so spi core will
handle checking transfer speed.
In additional, since commit 052eb2d49006 'spi: core: Set max_speed_hz of
spi_device default to max_speed_hz of controller',
spi core will also set default spi->max_speed_hz if it is not set.
So remove tegra_sflash_setup().
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
-rw-r--r-- | drivers/spi/spi-tegra20-sflash.c | 24 |
1 files changed, 3 insertions, 21 deletions
diff --git a/drivers/spi/spi-tegra20-sflash.c b/drivers/spi/spi-tegra20-sflash.c index 08794977f21a..c60d5df054ee 100644 --- a/drivers/spi/spi-tegra20-sflash.c +++ b/drivers/spi/spi-tegra20-sflash.c | |||
@@ -121,7 +121,6 @@ struct tegra_sflash_data { | |||
121 | struct reset_control *rst; | 121 | struct reset_control *rst; |
122 | void __iomem *base; | 122 | void __iomem *base; |
123 | unsigned irq; | 123 | unsigned irq; |
124 | u32 spi_max_frequency; | ||
125 | u32 cur_speed; | 124 | u32 cur_speed; |
126 | 125 | ||
127 | struct spi_device *cur_spi; | 126 | struct spi_device *cur_spi; |
@@ -315,15 +314,6 @@ static int tegra_sflash_start_transfer_one(struct spi_device *spi, | |||
315 | return tegra_sflash_start_cpu_based_transfer(tsd, t); | 314 | return tegra_sflash_start_cpu_based_transfer(tsd, t); |
316 | } | 315 | } |
317 | 316 | ||
318 | static int tegra_sflash_setup(struct spi_device *spi) | ||
319 | { | ||
320 | struct tegra_sflash_data *tsd = spi_master_get_devdata(spi->master); | ||
321 | |||
322 | /* Set speed to the spi max fequency if spi device has not set */ | ||
323 | spi->max_speed_hz = spi->max_speed_hz ? : tsd->spi_max_frequency; | ||
324 | return 0; | ||
325 | } | ||
326 | |||
327 | static int tegra_sflash_transfer_one_message(struct spi_master *master, | 317 | static int tegra_sflash_transfer_one_message(struct spi_master *master, |
328 | struct spi_message *msg) | 318 | struct spi_message *msg) |
329 | { | 319 | { |
@@ -430,15 +420,6 @@ static irqreturn_t tegra_sflash_isr(int irq, void *context_data) | |||
430 | return handle_cpu_based_xfer(tsd); | 420 | return handle_cpu_based_xfer(tsd); |
431 | } | 421 | } |
432 | 422 | ||
433 | static void tegra_sflash_parse_dt(struct tegra_sflash_data *tsd) | ||
434 | { | ||
435 | struct device_node *np = tsd->dev->of_node; | ||
436 | |||
437 | if (of_property_read_u32(np, "spi-max-frequency", | ||
438 | &tsd->spi_max_frequency)) | ||
439 | tsd->spi_max_frequency = 25000000; /* 25MHz */ | ||
440 | } | ||
441 | |||
442 | static struct of_device_id tegra_sflash_of_match[] = { | 423 | static struct of_device_id tegra_sflash_of_match[] = { |
443 | { .compatible = "nvidia,tegra20-sflash", }, | 424 | { .compatible = "nvidia,tegra20-sflash", }, |
444 | {} | 425 | {} |
@@ -467,7 +448,6 @@ static int tegra_sflash_probe(struct platform_device *pdev) | |||
467 | 448 | ||
468 | /* the spi->mode bits understood by this driver: */ | 449 | /* the spi->mode bits understood by this driver: */ |
469 | master->mode_bits = SPI_CPOL | SPI_CPHA; | 450 | master->mode_bits = SPI_CPOL | SPI_CPHA; |
470 | master->setup = tegra_sflash_setup; | ||
471 | master->transfer_one_message = tegra_sflash_transfer_one_message; | 451 | master->transfer_one_message = tegra_sflash_transfer_one_message; |
472 | master->auto_runtime_pm = true; | 452 | master->auto_runtime_pm = true; |
473 | master->num_chipselect = MAX_CHIP_SELECT; | 453 | master->num_chipselect = MAX_CHIP_SELECT; |
@@ -479,7 +459,9 @@ static int tegra_sflash_probe(struct platform_device *pdev) | |||
479 | tsd->dev = &pdev->dev; | 459 | tsd->dev = &pdev->dev; |
480 | spin_lock_init(&tsd->lock); | 460 | spin_lock_init(&tsd->lock); |
481 | 461 | ||
482 | tegra_sflash_parse_dt(tsd); | 462 | if (of_property_read_u32(tsd->dev->of_node, "spi-max-frequency", |
463 | &master->max_speed_hz)) | ||
464 | master->max_speed_hz = 25000000; /* 25MHz */ | ||
483 | 465 | ||
484 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 466 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
485 | tsd->base = devm_ioremap_resource(&pdev->dev, r); | 467 | tsd->base = devm_ioremap_resource(&pdev->dev, r); |