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authorCharles Keepax <ckeepax@opensource.wolfsonmicro.com>2014-05-13 08:45:15 -0400
committerMark Brown <broonie@linaro.org>2014-05-13 14:02:30 -0400
commit44330ab516c15dda8a1e660eeaf0003f84e43e3f (patch)
tree477b5afcb5d64e2babe2e7fc783c21d91a121fc5
parentc9eaa447e77efe77b7fa4c953bd62de8297fd6c5 (diff)
ASoC: wm8962: Update register CLASS_D_CONTROL_1 to be non-volatile
The register CLASS_D_CONTROL_1 is marked as volatile because it contains a bit, DAC_MUTE, which is also mirrored in the ADC_DAC_CONTROL_1 register. This causes problems for the "Speaker Switch" control, which will report an error if the CODEC is suspended because it relies on a volatile register. To resolve this issue mark CLASS_D_CONTROL_1 as non-volatile and manually keep the register cache in sync by updating both bits when changing the mute status. Reported-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Mark Brown <broonie@linaro.org> Cc: stable@vger.kernel.org
-rw-r--r--sound/soc/codecs/wm8962.c15
-rw-r--r--sound/soc/codecs/wm8962.h4
2 files changed, 16 insertions, 3 deletions
diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c
index 5522d2566c67..ecd26dd2e442 100644
--- a/sound/soc/codecs/wm8962.c
+++ b/sound/soc/codecs/wm8962.c
@@ -154,6 +154,7 @@ static struct reg_default wm8962_reg[] = {
154 { 40, 0x0000 }, /* R40 - SPKOUTL volume */ 154 { 40, 0x0000 }, /* R40 - SPKOUTL volume */
155 { 41, 0x0000 }, /* R41 - SPKOUTR volume */ 155 { 41, 0x0000 }, /* R41 - SPKOUTR volume */
156 156
157 { 49, 0x0010 }, /* R49 - Class D Control 1 */
157 { 51, 0x0003 }, /* R51 - Class D Control 2 */ 158 { 51, 0x0003 }, /* R51 - Class D Control 2 */
158 159
159 { 56, 0x0506 }, /* R56 - Clocking 4 */ 160 { 56, 0x0506 }, /* R56 - Clocking 4 */
@@ -795,7 +796,6 @@ static bool wm8962_volatile_register(struct device *dev, unsigned int reg)
795 case WM8962_ALC2: 796 case WM8962_ALC2:
796 case WM8962_THERMAL_SHUTDOWN_STATUS: 797 case WM8962_THERMAL_SHUTDOWN_STATUS:
797 case WM8962_ADDITIONAL_CONTROL_4: 798 case WM8962_ADDITIONAL_CONTROL_4:
798 case WM8962_CLASS_D_CONTROL_1:
799 case WM8962_DC_SERVO_6: 799 case WM8962_DC_SERVO_6:
800 case WM8962_INTERRUPT_STATUS_1: 800 case WM8962_INTERRUPT_STATUS_1:
801 case WM8962_INTERRUPT_STATUS_2: 801 case WM8962_INTERRUPT_STATUS_2:
@@ -2929,13 +2929,22 @@ static int wm8962_set_fll(struct snd_soc_codec *codec, int fll_id, int source,
2929static int wm8962_mute(struct snd_soc_dai *dai, int mute) 2929static int wm8962_mute(struct snd_soc_dai *dai, int mute)
2930{ 2930{
2931 struct snd_soc_codec *codec = dai->codec; 2931 struct snd_soc_codec *codec = dai->codec;
2932 int val; 2932 int val, ret;
2933 2933
2934 if (mute) 2934 if (mute)
2935 val = WM8962_DAC_MUTE; 2935 val = WM8962_DAC_MUTE | WM8962_DAC_MUTE_ALT;
2936 else 2936 else
2937 val = 0; 2937 val = 0;
2938 2938
2939 /**
2940 * The DAC mute bit is mirrored in two registers, update both to keep
2941 * the register cache consistent.
2942 */
2943 ret = snd_soc_update_bits(codec, WM8962_CLASS_D_CONTROL_1,
2944 WM8962_DAC_MUTE_ALT, val);
2945 if (ret < 0)
2946 return ret;
2947
2939 return snd_soc_update_bits(codec, WM8962_ADC_DAC_CONTROL_1, 2948 return snd_soc_update_bits(codec, WM8962_ADC_DAC_CONTROL_1,
2940 WM8962_DAC_MUTE, val); 2949 WM8962_DAC_MUTE, val);
2941} 2950}
diff --git a/sound/soc/codecs/wm8962.h b/sound/soc/codecs/wm8962.h
index a1a5d5294c19..910aafd09d21 100644
--- a/sound/soc/codecs/wm8962.h
+++ b/sound/soc/codecs/wm8962.h
@@ -1954,6 +1954,10 @@
1954#define WM8962_SPKOUTL_ENA_MASK 0x0040 /* SPKOUTL_ENA */ 1954#define WM8962_SPKOUTL_ENA_MASK 0x0040 /* SPKOUTL_ENA */
1955#define WM8962_SPKOUTL_ENA_SHIFT 6 /* SPKOUTL_ENA */ 1955#define WM8962_SPKOUTL_ENA_SHIFT 6 /* SPKOUTL_ENA */
1956#define WM8962_SPKOUTL_ENA_WIDTH 1 /* SPKOUTL_ENA */ 1956#define WM8962_SPKOUTL_ENA_WIDTH 1 /* SPKOUTL_ENA */
1957#define WM8962_DAC_MUTE_ALT 0x0010 /* DAC_MUTE */
1958#define WM8962_DAC_MUTE_ALT_MASK 0x0010 /* DAC_MUTE */
1959#define WM8962_DAC_MUTE_ALT_SHIFT 4 /* DAC_MUTE */
1960#define WM8962_DAC_MUTE_ALT_WIDTH 1 /* DAC_MUTE */
1957#define WM8962_SPKOUTL_PGA_MUTE 0x0002 /* SPKOUTL_PGA_MUTE */ 1961#define WM8962_SPKOUTL_PGA_MUTE 0x0002 /* SPKOUTL_PGA_MUTE */
1958#define WM8962_SPKOUTL_PGA_MUTE_MASK 0x0002 /* SPKOUTL_PGA_MUTE */ 1962#define WM8962_SPKOUTL_PGA_MUTE_MASK 0x0002 /* SPKOUTL_PGA_MUTE */
1959#define WM8962_SPKOUTL_PGA_MUTE_SHIFT 1 /* SPKOUTL_PGA_MUTE */ 1963#define WM8962_SPKOUTL_PGA_MUTE_SHIFT 1 /* SPKOUTL_PGA_MUTE */