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authorHeiko Stübner <heiko@sntech.de>2014-07-02 20:00:44 -0400
committerMike Turquette <mturquette@linaro.org>2014-07-13 15:17:08 -0400
commit43aea81778e280a4e1d7ef144b3511bbc4aace11 (patch)
treec2d398ad7b10a41f4c6a4f677284be3ffd756740
parent85fa0c7f8d05eb6baf2c122e85d45d928df0992b (diff)
dt-bindings: add documentation for rk3188 clock and reset unit
This add bindings documentation for the clock and reset unit found on rk3188 and rk3066 SoCs from Rockchip. Also deprecate the old gate clock binding, as these shouldn't be used in the future. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-By: Max Schwarz <max.schwarz@online.de> Tested-By: Max Schwarz <max.schwarz@online.de> Signed-off-by: Mike Turquette <mturquette@linaro.org>
-rw-r--r--Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.txt61
-rw-r--r--Documentation/devicetree/bindings/clock/rockchip.txt3
2 files changed, 64 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.txt
new file mode 100644
index 000000000000..0c2bf5eba43e
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.txt
@@ -0,0 +1,61 @@
1* Rockchip RK3188/RK3066 Clock and Reset Unit
2
3The RK3188/RK3066 clock controller generates and supplies clock to various
4controllers within the SoC and also implements a reset controller for SoC
5peripherals.
6
7Required Properties:
8
9- compatible: should be "rockchip,rk3188-cru", "rockchip,rk3188a-cru" or
10 "rockchip,rk3066a-cru"
11- reg: physical base address of the controller and length of memory mapped
12 region.
13- #clock-cells: should be 1.
14- #reset-cells: should be 1.
15
16Optional Properties:
17
18- rockchip,grf: phandle to the syscon managing the "general register files"
19 If missing pll rates are not changable, due to the missing pll lock status.
20
21Each clock is assigned an identifier and client nodes can use this identifier
22to specify the clock which they consume. All available clocks are defined as
23preprocessor macros in the dt-bindings/clock/rk3188-cru.h and
24dt-bindings/clock/rk3066-cru.h headers and can be used in device tree sources.
25Similar macros exist for the reset sources in these files.
26
27External clocks:
28
29There are several clocks that are generated outside the SoC. It is expected
30that they are defined using standard clock bindings with following
31clock-output-names:
32 - "xin24m" - crystal input - required,
33 - "xin32k" - rtc clock - optional,
34 - "xin27m" - 27mhz crystal input on rk3066 - optional,
35 - "ext_hsadc" - external HSADC clock - optional,
36 - "ext_cif0" - external camera clock - optional,
37 - "ext_rmii" - external RMII clock - optional,
38 - "ext_jtag" - externalJTAG clock - optional
39
40Example: Clock controller node:
41
42 cru: cru@20000000 {
43 compatible = "rockchip,rk3188-cru";
44 reg = <0x20000000 0x1000>;
45 rockchip,grf = <&grf>;
46
47 #clock-cells = <1>;
48 #reset-cells = <1>;
49 };
50
51Example: UART controller node that consumes the clock generated by the clock
52 controller:
53
54 uart0: serial@10124000 {
55 compatible = "snps,dw-apb-uart";
56 reg = <0x10124000 0x400>;
57 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
58 reg-shift = <2>;
59 reg-io-width = <1>;
60 clocks = <&cru SCLK_UART0>;
61 };
diff --git a/Documentation/devicetree/bindings/clock/rockchip.txt b/Documentation/devicetree/bindings/clock/rockchip.txt
index a891c823ed44..22f6769e5d4a 100644
--- a/Documentation/devicetree/bindings/clock/rockchip.txt
+++ b/Documentation/devicetree/bindings/clock/rockchip.txt
@@ -6,6 +6,9 @@ This binding uses the common clock binding[1].
6 6
7== Gate clocks == 7== Gate clocks ==
8 8
9These bindings are deprecated!
10Please use the soc specific CRU bindings instead.
11
9The gate registers form a continuos block which makes the dt node 12The gate registers form a continuos block which makes the dt node
10structure a matter of taste, as either all gates can be put into 13structure a matter of taste, as either all gates can be put into
11one gate clock spanning all registers or they can be divided into 14one gate clock spanning all registers or they can be divided into