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authorSimon Horman <horms+renesas@verge.net.au>2013-12-26 00:16:54 -0500
committerSimon Horman <horms+renesas@verge.net.au>2013-12-26 00:16:54 -0500
commit3effae8c26f451a9d572255c08dfbe342dd1dc98 (patch)
tree5d0f66fa84926178535ba58a1318588376fe970b
parent4d0810257a7f1d040526a6dc5bde5a4737994a7e (diff)
Revert "ARM: shmobile: r8a7791: Add SSI clocks in device tree"
This reverts commit b652896b02df3dfde3a68957cce01f2aa4585842. Unfortunately this commit prevents multiplatform from booting to the point where a serial console is available. Revert it while a solution is sought. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--arch/arm/boot/dts/r8a7791.dtsi20
-rw-r--r--include/dt-bindings/clock/r8a7791-clock.h13
2 files changed, 0 insertions, 33 deletions
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index e92c1f7aedd0..19c65509a22d 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -495,26 +495,6 @@
495 "rcan1", "rcan0", "qspi_mod", "i2c5", "i2c4", "i2c3", 495 "rcan1", "rcan0", "qspi_mod", "i2c5", "i2c4", "i2c3",
496 "i2c2", "i2c1", "i2c0"; 496 "i2c2", "i2c1", "i2c0";
497 }; 497 };
498 mstp10_clks: mstp10_clks@e6150998 {
499 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
500 reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>;
501 clocks = <&p_clk>, <&mstp10_clks R8A7791_CLK_SSI>,
502 <&mstp10_clks R8A7791_CLK_SSI>, <&mstp10_clks R8A7791_CLK_SSI>,
503 <&mstp10_clks R8A7791_CLK_SSI>, <&mstp10_clks R8A7791_CLK_SSI>,
504 <&mstp10_clks R8A7791_CLK_SSI>, <&mstp10_clks R8A7791_CLK_SSI>,
505 <&mstp10_clks R8A7791_CLK_SSI>, <&mstp10_clks R8A7791_CLK_SSI>,
506 <&mstp10_clks R8A7791_CLK_SSI>;
507 #clock-cells = <1>;
508 renesas,clock-indices = <
509 R8A7791_CLK_SSI R8A7791_CLK_SSI9 R8A7791_CLK_SSI8
510 R8A7791_CLK_SSI7 R8A7791_CLK_SSI6 R8A7791_CLK_SSI5
511 R8A7791_CLK_SSI4 R8A7791_CLK_SSI3 R8A7791_CLK_SSI2
512 R8A7791_CLK_SSI1 R8A7791_CLK_SSI0
513 >;
514 clock-output-names =
515 "ssi", "ssi9", "ssi8", "ssi7", "ssi6", "ssi5",
516 "ssi4", "ssi3", "ssi2", "ssi1", "ssi0";
517 };
518 mstp11_clks: mstp11_clks@e615099c { 498 mstp11_clks: mstp11_clks@e615099c {
519 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; 499 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
520 reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>; 500 reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>;
diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h
index 1c8f00d0d88b..30f82f286e29 100644
--- a/include/dt-bindings/clock/r8a7791-clock.h
+++ b/include/dt-bindings/clock/r8a7791-clock.h
@@ -103,19 +103,6 @@
103#define R8A7791_CLK_I2C1 30 103#define R8A7791_CLK_I2C1 30
104#define R8A7791_CLK_I2C0 31 104#define R8A7791_CLK_I2C0 31
105 105
106/* MSTP10 */
107#define R8A7791_CLK_SSI 5
108#define R8A7791_CLK_SSI9 6
109#define R8A7791_CLK_SSI8 7
110#define R8A7791_CLK_SSI7 8
111#define R8A7791_CLK_SSI6 9
112#define R8A7791_CLK_SSI5 10
113#define R8A7791_CLK_SSI4 11
114#define R8A7791_CLK_SSI3 12
115#define R8A7791_CLK_SSI2 13
116#define R8A7791_CLK_SSI1 14
117#define R8A7791_CLK_SSI0 15
118
119/* MSTP11 */ 106/* MSTP11 */
120#define R8A7791_CLK_SCIFA3 6 107#define R8A7791_CLK_SCIFA3 6
121#define R8A7791_CLK_SCIFA4 7 108#define R8A7791_CLK_SCIFA4 7