diff options
author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2010-04-28 13:36:10 -0400 |
---|---|---|
committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2010-04-30 11:12:44 -0400 |
commit | 39b8eab7e7fe429d8d57f18c0ebdb7c25df55f5c (patch) | |
tree | d5b1aac224feb20edcca4ced5b1e95b9b032f8fe | |
parent | dde3a7e9cb187e25deeac0269733116d4840f91e (diff) |
ASoC: Add WM9090 amplifier driver
The WM9090 is a high performance low power audio subsystem, including
headphone and class D speaker drivers.
Note that this driver is a standalone CODEC driver and so is only
immediately suitable for use with the WM9090 as a standalone sound card
taking line inputs, or with a DAC with no software control. The pending
ASoC multi-CODEC support will expand the range of systems that can use
the driver, or system-specific adaptations can be made.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
-rw-r--r-- | include/sound/wm9090.h | 28 | ||||
-rw-r--r-- | sound/soc/codecs/Kconfig | 4 | ||||
-rw-r--r-- | sound/soc/codecs/Makefile | 2 | ||||
-rw-r--r-- | sound/soc/codecs/wm9090.c | 773 | ||||
-rw-r--r-- | sound/soc/codecs/wm9090.h | 715 |
5 files changed, 1522 insertions, 0 deletions
diff --git a/include/sound/wm9090.h b/include/sound/wm9090.h new file mode 100644 index 000000000000..3718928cde1a --- /dev/null +++ b/include/sound/wm9090.h | |||
@@ -0,0 +1,28 @@ | |||
1 | /* | ||
2 | * linux/sound/wm9090.h -- Platform data for WM9090 | ||
3 | * | ||
4 | * Copyright 2009, 2010 Wolfson Microelectronics. PLC. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #ifndef __LINUX_SND_WM9090_H | ||
12 | #define __LINUX_SND_WM9090_H | ||
13 | |||
14 | struct wm9090_platform_data { | ||
15 | /* Line inputs 1 & 2 can optionally be differential */ | ||
16 | unsigned int lin1_diff:1; | ||
17 | unsigned int lin2_diff:1; | ||
18 | |||
19 | /* AGC configuration. This is intended to protect the speaker | ||
20 | * against overdriving and will therefore depend on the | ||
21 | * hardware setup with incorrect runtime configuration | ||
22 | * potentially causing hardware damage. | ||
23 | */ | ||
24 | unsigned int agc_ena:1; | ||
25 | u16 agc[3]; | ||
26 | }; | ||
27 | |||
28 | #endif | ||
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index bc0ab47e156b..31ac5538fe7e 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig | |||
@@ -66,6 +66,7 @@ config SND_SOC_ALL_CODECS | |||
66 | select SND_SOC_WM8993 if I2C | 66 | select SND_SOC_WM8993 if I2C |
67 | select SND_SOC_WM8994 if MFD_WM8994 | 67 | select SND_SOC_WM8994 if MFD_WM8994 |
68 | select SND_SOC_WM9081 if I2C | 68 | select SND_SOC_WM9081 if I2C |
69 | select SND_SOC_WM9090 if I2C | ||
69 | select SND_SOC_WM9705 if SND_SOC_AC97_BUS | 70 | select SND_SOC_WM9705 if SND_SOC_AC97_BUS |
70 | select SND_SOC_WM9712 if SND_SOC_AC97_BUS | 71 | select SND_SOC_WM9712 if SND_SOC_AC97_BUS |
71 | select SND_SOC_WM9713 if SND_SOC_AC97_BUS | 72 | select SND_SOC_WM9713 if SND_SOC_AC97_BUS |
@@ -277,3 +278,6 @@ config SND_SOC_TPA6130A2 | |||
277 | 278 | ||
278 | config SND_SOC_WM2000 | 279 | config SND_SOC_WM2000 |
279 | tristate | 280 | tristate |
281 | |||
282 | config SND_SOC_WM9090 | ||
283 | tristate | ||
diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index 337904167358..91429eab0707 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile | |||
@@ -61,6 +61,7 @@ snd-soc-wm-hubs-objs := wm_hubs.o | |||
61 | snd-soc-max9877-objs := max9877.o | 61 | snd-soc-max9877-objs := max9877.o |
62 | snd-soc-tpa6130a2-objs := tpa6130a2.o | 62 | snd-soc-tpa6130a2-objs := tpa6130a2.o |
63 | snd-soc-wm2000-objs := wm2000.o | 63 | snd-soc-wm2000-objs := wm2000.o |
64 | snd-soc-wm9090-objs := wm9090.o | ||
64 | 65 | ||
65 | obj-$(CONFIG_SND_SOC_AC97_CODEC) += snd-soc-ac97.o | 66 | obj-$(CONFIG_SND_SOC_AC97_CODEC) += snd-soc-ac97.o |
66 | obj-$(CONFIG_SND_SOC_AD1836) += snd-soc-ad1836.o | 67 | obj-$(CONFIG_SND_SOC_AD1836) += snd-soc-ad1836.o |
@@ -125,3 +126,4 @@ obj-$(CONFIG_SND_SOC_WM_HUBS) += snd-soc-wm-hubs.o | |||
125 | obj-$(CONFIG_SND_SOC_MAX9877) += snd-soc-max9877.o | 126 | obj-$(CONFIG_SND_SOC_MAX9877) += snd-soc-max9877.o |
126 | obj-$(CONFIG_SND_SOC_TPA6130A2) += snd-soc-tpa6130a2.o | 127 | obj-$(CONFIG_SND_SOC_TPA6130A2) += snd-soc-tpa6130a2.o |
127 | obj-$(CONFIG_SND_SOC_WM2000) += snd-soc-wm2000.o | 128 | obj-$(CONFIG_SND_SOC_WM2000) += snd-soc-wm2000.o |
129 | obj-$(CONFIG_SND_SOC_WM9090) += snd-soc-wm9090.o | ||
diff --git a/sound/soc/codecs/wm9090.c b/sound/soc/codecs/wm9090.c new file mode 100644 index 000000000000..1592250daec0 --- /dev/null +++ b/sound/soc/codecs/wm9090.c | |||
@@ -0,0 +1,773 @@ | |||
1 | /* | ||
2 | * ALSA SoC WM9090 driver | ||
3 | * | ||
4 | * Copyright 2009, 2010 Wolfson Microelectronics | ||
5 | * | ||
6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License | ||
10 | * version 2 as published by the Free Software Foundation. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, but | ||
13 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
15 | * General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | ||
20 | * 02110-1301 USA | ||
21 | */ | ||
22 | |||
23 | #include <linux/module.h> | ||
24 | #include <linux/errno.h> | ||
25 | #include <linux/device.h> | ||
26 | #include <linux/i2c.h> | ||
27 | #include <linux/delay.h> | ||
28 | #include <linux/slab.h> | ||
29 | #include <sound/initval.h> | ||
30 | #include <sound/soc.h> | ||
31 | #include <sound/soc-dapm.h> | ||
32 | #include <sound/tlv.h> | ||
33 | #include <sound/wm9090.h> | ||
34 | |||
35 | #include "wm9090.h" | ||
36 | |||
37 | static struct snd_soc_codec *wm9090_codec; | ||
38 | |||
39 | static const u16 wm9090_reg_defaults[] = { | ||
40 | 0x9093, /* R0 - Software Reset */ | ||
41 | 0x0006, /* R1 - Power Management (1) */ | ||
42 | 0x6000, /* R2 - Power Management (2) */ | ||
43 | 0x0000, /* R3 - Power Management (3) */ | ||
44 | 0x0000, /* R4 */ | ||
45 | 0x0000, /* R5 */ | ||
46 | 0x01C0, /* R6 - Clocking 1 */ | ||
47 | 0x0000, /* R7 */ | ||
48 | 0x0000, /* R8 */ | ||
49 | 0x0000, /* R9 */ | ||
50 | 0x0000, /* R10 */ | ||
51 | 0x0000, /* R11 */ | ||
52 | 0x0000, /* R12 */ | ||
53 | 0x0000, /* R13 */ | ||
54 | 0x0000, /* R14 */ | ||
55 | 0x0000, /* R15 */ | ||
56 | 0x0000, /* R16 */ | ||
57 | 0x0000, /* R17 */ | ||
58 | 0x0000, /* R18 */ | ||
59 | 0x0000, /* R19 */ | ||
60 | 0x0000, /* R20 */ | ||
61 | 0x0000, /* R21 */ | ||
62 | 0x0003, /* R22 - IN1 Line Control */ | ||
63 | 0x0003, /* R23 - IN2 Line Control */ | ||
64 | 0x0083, /* R24 - IN1 Line Input A Volume */ | ||
65 | 0x0083, /* R25 - IN1 Line Input B Volume */ | ||
66 | 0x0083, /* R26 - IN2 Line Input A Volume */ | ||
67 | 0x0083, /* R27 - IN2 Line Input B Volume */ | ||
68 | 0x002D, /* R28 - Left Output Volume */ | ||
69 | 0x002D, /* R29 - Right Output Volume */ | ||
70 | 0x0000, /* R30 */ | ||
71 | 0x0000, /* R31 */ | ||
72 | 0x0000, /* R32 */ | ||
73 | 0x0000, /* R33 */ | ||
74 | 0x0100, /* R34 - SPKMIXL Attenuation */ | ||
75 | 0x0000, /* R35 */ | ||
76 | 0x0010, /* R36 - SPKOUT Mixers */ | ||
77 | 0x0140, /* R37 - ClassD3 */ | ||
78 | 0x0039, /* R38 - Speaker Volume Left */ | ||
79 | 0x0000, /* R39 */ | ||
80 | 0x0000, /* R40 */ | ||
81 | 0x0000, /* R41 */ | ||
82 | 0x0000, /* R42 */ | ||
83 | 0x0000, /* R43 */ | ||
84 | 0x0000, /* R44 */ | ||
85 | 0x0000, /* R45 - Output Mixer1 */ | ||
86 | 0x0000, /* R46 - Output Mixer2 */ | ||
87 | 0x0100, /* R47 - Output Mixer3 */ | ||
88 | 0x0100, /* R48 - Output Mixer4 */ | ||
89 | 0x0000, /* R49 */ | ||
90 | 0x0000, /* R50 */ | ||
91 | 0x0000, /* R51 */ | ||
92 | 0x0000, /* R52 */ | ||
93 | 0x0000, /* R53 */ | ||
94 | 0x0000, /* R54 - Speaker Mixer */ | ||
95 | 0x0000, /* R55 */ | ||
96 | 0x0000, /* R56 */ | ||
97 | 0x000D, /* R57 - AntiPOP2 */ | ||
98 | 0x0000, /* R58 */ | ||
99 | 0x0000, /* R59 */ | ||
100 | 0x0000, /* R60 */ | ||
101 | 0x0000, /* R61 */ | ||
102 | 0x0000, /* R62 */ | ||
103 | 0x0000, /* R63 */ | ||
104 | 0x0000, /* R64 */ | ||
105 | 0x0000, /* R65 */ | ||
106 | 0x0000, /* R66 */ | ||
107 | 0x0000, /* R67 */ | ||
108 | 0x0000, /* R68 */ | ||
109 | 0x0000, /* R69 */ | ||
110 | 0x0000, /* R70 - Write Sequencer 0 */ | ||
111 | 0x0000, /* R71 - Write Sequencer 1 */ | ||
112 | 0x0000, /* R72 - Write Sequencer 2 */ | ||
113 | 0x0000, /* R73 - Write Sequencer 3 */ | ||
114 | 0x0000, /* R74 - Write Sequencer 4 */ | ||
115 | 0x0000, /* R75 - Write Sequencer 5 */ | ||
116 | 0x1F25, /* R76 - Charge Pump 1 */ | ||
117 | 0x0000, /* R77 */ | ||
118 | 0x0000, /* R78 */ | ||
119 | 0x0000, /* R79 */ | ||
120 | 0x0000, /* R80 */ | ||
121 | 0x0000, /* R81 */ | ||
122 | 0x0000, /* R82 */ | ||
123 | 0x0000, /* R83 */ | ||
124 | 0x0000, /* R84 - DC Servo 0 */ | ||
125 | 0x054A, /* R85 - DC Servo 1 */ | ||
126 | 0x0000, /* R86 */ | ||
127 | 0x0000, /* R87 - DC Servo 3 */ | ||
128 | 0x0000, /* R88 - DC Servo Readback 0 */ | ||
129 | 0x0000, /* R89 - DC Servo Readback 1 */ | ||
130 | 0x0000, /* R90 - DC Servo Readback 2 */ | ||
131 | 0x0000, /* R91 */ | ||
132 | 0x0000, /* R92 */ | ||
133 | 0x0000, /* R93 */ | ||
134 | 0x0000, /* R94 */ | ||
135 | 0x0000, /* R95 */ | ||
136 | 0x0100, /* R96 - Analogue HP 0 */ | ||
137 | 0x0000, /* R97 */ | ||
138 | 0x8640, /* R98 - AGC Control 0 */ | ||
139 | 0xC000, /* R99 - AGC Control 1 */ | ||
140 | 0x0200, /* R100 - AGC Control 2 */ | ||
141 | }; | ||
142 | |||
143 | /* This struct is used to save the context */ | ||
144 | struct wm9090_priv { | ||
145 | /* We're not really registering as a CODEC since ASoC core | ||
146 | * does not yet support multiple CODECs but having the CODEC | ||
147 | * structure means we can reuse some of the ASoC core | ||
148 | * features. | ||
149 | */ | ||
150 | struct snd_soc_codec codec; | ||
151 | struct mutex mutex; | ||
152 | u16 reg_cache[WM9090_MAX_REGISTER + 1]; | ||
153 | struct wm9090_platform_data pdata; | ||
154 | }; | ||
155 | |||
156 | static int wm9090_volatile(unsigned int reg) | ||
157 | { | ||
158 | switch (reg) { | ||
159 | case WM9090_SOFTWARE_RESET: | ||
160 | case WM9090_DC_SERVO_0: | ||
161 | case WM9090_DC_SERVO_READBACK_0: | ||
162 | case WM9090_DC_SERVO_READBACK_1: | ||
163 | case WM9090_DC_SERVO_READBACK_2: | ||
164 | return 1; | ||
165 | |||
166 | default: | ||
167 | return 0; | ||
168 | } | ||
169 | } | ||
170 | |||
171 | static void wait_for_dc_servo(struct snd_soc_codec *codec) | ||
172 | { | ||
173 | unsigned int reg; | ||
174 | int count = 0; | ||
175 | |||
176 | dev_dbg(codec->dev, "Waiting for DC servo...\n"); | ||
177 | do { | ||
178 | count++; | ||
179 | msleep(1); | ||
180 | reg = snd_soc_read(codec, WM9090_DC_SERVO_READBACK_0); | ||
181 | dev_dbg(codec->dev, "DC servo status: %x\n", reg); | ||
182 | } while ((reg & WM9090_DCS_CAL_COMPLETE_MASK) | ||
183 | != WM9090_DCS_CAL_COMPLETE_MASK && count < 1000); | ||
184 | |||
185 | if ((reg & WM9090_DCS_CAL_COMPLETE_MASK) | ||
186 | != WM9090_DCS_CAL_COMPLETE_MASK) | ||
187 | dev_err(codec->dev, "Timed out waiting for DC Servo\n"); | ||
188 | } | ||
189 | |||
190 | static const unsigned int in_tlv[] = { | ||
191 | TLV_DB_RANGE_HEAD(6), | ||
192 | 0, 0, TLV_DB_SCALE_ITEM(-600, 0, 0), | ||
193 | 1, 3, TLV_DB_SCALE_ITEM(-350, 350, 0), | ||
194 | 4, 6, TLV_DB_SCALE_ITEM(600, 600, 0), | ||
195 | }; | ||
196 | static const unsigned int mix_tlv[] = { | ||
197 | TLV_DB_RANGE_HEAD(4), | ||
198 | 0, 2, TLV_DB_SCALE_ITEM(-1200, 300, 0), | ||
199 | 3, 3, TLV_DB_SCALE_ITEM(0, 0, 0), | ||
200 | }; | ||
201 | static const DECLARE_TLV_DB_SCALE(out_tlv, -5700, 100, 0); | ||
202 | static const unsigned int spkboost_tlv[] = { | ||
203 | TLV_DB_RANGE_HEAD(7), | ||
204 | 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0), | ||
205 | 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0), | ||
206 | }; | ||
207 | |||
208 | static const struct snd_kcontrol_new wm9090_controls[] = { | ||
209 | SOC_SINGLE_TLV("IN1A Volume", WM9090_IN1_LINE_INPUT_A_VOLUME, 0, 6, 0, | ||
210 | in_tlv), | ||
211 | SOC_SINGLE("IN1A Switch", WM9090_IN1_LINE_INPUT_A_VOLUME, 7, 1, 1), | ||
212 | SOC_SINGLE("IN1A ZC Switch", WM9090_IN1_LINE_INPUT_A_VOLUME, 6, 1, 0), | ||
213 | |||
214 | SOC_SINGLE_TLV("IN2A Volume", WM9090_IN2_LINE_INPUT_A_VOLUME, 0, 6, 0, | ||
215 | in_tlv), | ||
216 | SOC_SINGLE("IN2A Switch", WM9090_IN2_LINE_INPUT_A_VOLUME, 7, 1, 1), | ||
217 | SOC_SINGLE("IN2A ZC Switch", WM9090_IN2_LINE_INPUT_A_VOLUME, 6, 1, 0), | ||
218 | |||
219 | SOC_SINGLE("MIXOUTL Switch", WM9090_OUTPUT_MIXER3, 8, 1, 1), | ||
220 | SOC_SINGLE_TLV("MIXOUTL IN1A Volume", WM9090_OUTPUT_MIXER3, 6, 3, 1, | ||
221 | mix_tlv), | ||
222 | SOC_SINGLE_TLV("MIXOUTL IN2A Volume", WM9090_OUTPUT_MIXER3, 2, 3, 1, | ||
223 | mix_tlv), | ||
224 | |||
225 | SOC_SINGLE("MIXOUTR Switch", WM9090_OUTPUT_MIXER4, 8, 1, 1), | ||
226 | SOC_SINGLE_TLV("MIXOUTR IN1A Volume", WM9090_OUTPUT_MIXER4, 6, 3, 1, | ||
227 | mix_tlv), | ||
228 | SOC_SINGLE_TLV("MIXOUTR IN2A Volume", WM9090_OUTPUT_MIXER4, 2, 3, 1, | ||
229 | mix_tlv), | ||
230 | |||
231 | SOC_SINGLE("SPKMIX Switch", WM9090_SPKMIXL_ATTENUATION, 8, 1, 1), | ||
232 | SOC_SINGLE_TLV("SPKMIX IN1A Volume", WM9090_SPKMIXL_ATTENUATION, 6, 3, 1, | ||
233 | mix_tlv), | ||
234 | SOC_SINGLE_TLV("SPKMIX IN2A Volume", WM9090_SPKMIXL_ATTENUATION, 2, 3, 1, | ||
235 | mix_tlv), | ||
236 | |||
237 | SOC_DOUBLE_R_TLV("Headphone Volume", WM9090_LEFT_OUTPUT_VOLUME, | ||
238 | WM9090_RIGHT_OUTPUT_VOLUME, 0, 63, 0, out_tlv), | ||
239 | SOC_DOUBLE_R("Headphone Switch", WM9090_LEFT_OUTPUT_VOLUME, | ||
240 | WM9090_RIGHT_OUTPUT_VOLUME, 6, 1, 1), | ||
241 | SOC_DOUBLE_R("Headphone ZC Switch", WM9090_LEFT_OUTPUT_VOLUME, | ||
242 | WM9090_RIGHT_OUTPUT_VOLUME, 7, 1, 0), | ||
243 | |||
244 | SOC_SINGLE_TLV("Speaker Volume", WM9090_SPEAKER_VOLUME_LEFT, 0, 63, 0, | ||
245 | out_tlv), | ||
246 | SOC_SINGLE("Speaker Switch", WM9090_SPEAKER_VOLUME_LEFT, 6, 1, 1), | ||
247 | SOC_SINGLE("Speaker ZC Switch", WM9090_SPEAKER_VOLUME_LEFT, 7, 1, 0), | ||
248 | SOC_SINGLE_TLV("Speaker Boost Volume", WM9090_CLASSD3, 3, 7, 0, spkboost_tlv), | ||
249 | }; | ||
250 | |||
251 | static const struct snd_kcontrol_new wm9090_in1_se_controls[] = { | ||
252 | SOC_SINGLE_TLV("IN1B Volume", WM9090_IN1_LINE_INPUT_B_VOLUME, 0, 6, 0, | ||
253 | in_tlv), | ||
254 | SOC_SINGLE("IN1B Switch", WM9090_IN1_LINE_INPUT_B_VOLUME, 7, 1, 1), | ||
255 | SOC_SINGLE("IN1B ZC Switch", WM9090_IN1_LINE_INPUT_B_VOLUME, 6, 1, 0), | ||
256 | |||
257 | SOC_SINGLE_TLV("SPKMIX IN1B Volume", WM9090_SPKMIXL_ATTENUATION, 4, 3, 1, | ||
258 | mix_tlv), | ||
259 | SOC_SINGLE_TLV("MIXOUTL IN1B Volume", WM9090_OUTPUT_MIXER3, 4, 3, 1, | ||
260 | mix_tlv), | ||
261 | SOC_SINGLE_TLV("MIXOUTR IN1B Volume", WM9090_OUTPUT_MIXER4, 4, 3, 1, | ||
262 | mix_tlv), | ||
263 | }; | ||
264 | |||
265 | static const struct snd_kcontrol_new wm9090_in2_se_controls[] = { | ||
266 | SOC_SINGLE_TLV("IN2B Volume", WM9090_IN2_LINE_INPUT_B_VOLUME, 0, 6, 0, | ||
267 | in_tlv), | ||
268 | SOC_SINGLE("IN2B Switch", WM9090_IN2_LINE_INPUT_B_VOLUME, 7, 1, 1), | ||
269 | SOC_SINGLE("IN2B ZC Switch", WM9090_IN2_LINE_INPUT_B_VOLUME, 6, 1, 0), | ||
270 | |||
271 | SOC_SINGLE_TLV("SPKMIX IN2B Volume", WM9090_SPKMIXL_ATTENUATION, 0, 3, 1, | ||
272 | mix_tlv), | ||
273 | SOC_SINGLE_TLV("MIXOUTL IN2B Volume", WM9090_OUTPUT_MIXER3, 0, 3, 1, | ||
274 | mix_tlv), | ||
275 | SOC_SINGLE_TLV("MIXOUTR IN2B Volume", WM9090_OUTPUT_MIXER4, 0, 3, 1, | ||
276 | mix_tlv), | ||
277 | }; | ||
278 | |||
279 | static int hp_ev(struct snd_soc_dapm_widget *w, | ||
280 | struct snd_kcontrol *kcontrol, int event) | ||
281 | { | ||
282 | struct snd_soc_codec *codec = w->codec; | ||
283 | unsigned int reg = snd_soc_read(codec, WM9090_ANALOGUE_HP_0); | ||
284 | |||
285 | switch (event) { | ||
286 | case SND_SOC_DAPM_POST_PMU: | ||
287 | snd_soc_update_bits(codec, WM9090_CHARGE_PUMP_1, | ||
288 | WM9090_CP_ENA, WM9090_CP_ENA); | ||
289 | |||
290 | msleep(5); | ||
291 | |||
292 | snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_1, | ||
293 | WM9090_HPOUT1L_ENA | WM9090_HPOUT1R_ENA, | ||
294 | WM9090_HPOUT1L_ENA | WM9090_HPOUT1R_ENA); | ||
295 | |||
296 | reg |= WM9090_HPOUT1L_DLY | WM9090_HPOUT1R_DLY; | ||
297 | snd_soc_write(codec, WM9090_ANALOGUE_HP_0, reg); | ||
298 | |||
299 | /* Start the DC servo. We don't currently use the | ||
300 | * ability to save the state since we don't have full | ||
301 | * control of the analogue paths and they can change | ||
302 | * DC offsets; see the WM8904 driver for an example of | ||
303 | * doing so. | ||
304 | */ | ||
305 | snd_soc_write(codec, WM9090_DC_SERVO_0, | ||
306 | WM9090_DCS_ENA_CHAN_0 | | ||
307 | WM9090_DCS_ENA_CHAN_1 | | ||
308 | WM9090_DCS_TRIG_STARTUP_1 | | ||
309 | WM9090_DCS_TRIG_STARTUP_0); | ||
310 | wait_for_dc_servo(codec); | ||
311 | |||
312 | reg |= WM9090_HPOUT1R_OUTP | WM9090_HPOUT1R_RMV_SHORT | | ||
313 | WM9090_HPOUT1L_OUTP | WM9090_HPOUT1L_RMV_SHORT; | ||
314 | snd_soc_write(codec, WM9090_ANALOGUE_HP_0, reg); | ||
315 | break; | ||
316 | |||
317 | case SND_SOC_DAPM_PRE_PMD: | ||
318 | reg &= ~(WM9090_HPOUT1L_RMV_SHORT | | ||
319 | WM9090_HPOUT1L_DLY | | ||
320 | WM9090_HPOUT1L_OUTP | | ||
321 | WM9090_HPOUT1R_RMV_SHORT | | ||
322 | WM9090_HPOUT1R_DLY | | ||
323 | WM9090_HPOUT1R_OUTP); | ||
324 | |||
325 | snd_soc_write(codec, WM9090_ANALOGUE_HP_0, reg); | ||
326 | |||
327 | snd_soc_write(codec, WM9090_DC_SERVO_0, 0); | ||
328 | |||
329 | snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_1, | ||
330 | WM9090_HPOUT1L_ENA | WM9090_HPOUT1R_ENA, | ||
331 | 0); | ||
332 | |||
333 | snd_soc_update_bits(codec, WM9090_CHARGE_PUMP_1, | ||
334 | WM9090_CP_ENA, 0); | ||
335 | break; | ||
336 | } | ||
337 | |||
338 | return 0; | ||
339 | } | ||
340 | |||
341 | static const struct snd_kcontrol_new spkmix[] = { | ||
342 | SOC_DAPM_SINGLE("IN1A Switch", WM9090_SPEAKER_MIXER, 6, 1, 0), | ||
343 | SOC_DAPM_SINGLE("IN1B Switch", WM9090_SPEAKER_MIXER, 4, 1, 0), | ||
344 | SOC_DAPM_SINGLE("IN2A Switch", WM9090_SPEAKER_MIXER, 2, 1, 0), | ||
345 | SOC_DAPM_SINGLE("IN2B Switch", WM9090_SPEAKER_MIXER, 0, 1, 0), | ||
346 | }; | ||
347 | |||
348 | static const struct snd_kcontrol_new spkout[] = { | ||
349 | SOC_DAPM_SINGLE("Mixer Switch", WM9090_SPKOUT_MIXERS, 4, 1, 0), | ||
350 | }; | ||
351 | |||
352 | static const struct snd_kcontrol_new mixoutl[] = { | ||
353 | SOC_DAPM_SINGLE("IN1A Switch", WM9090_OUTPUT_MIXER1, 6, 1, 0), | ||
354 | SOC_DAPM_SINGLE("IN1B Switch", WM9090_OUTPUT_MIXER1, 4, 1, 0), | ||
355 | SOC_DAPM_SINGLE("IN2A Switch", WM9090_OUTPUT_MIXER1, 2, 1, 0), | ||
356 | SOC_DAPM_SINGLE("IN2B Switch", WM9090_OUTPUT_MIXER1, 0, 1, 0), | ||
357 | }; | ||
358 | |||
359 | static const struct snd_kcontrol_new mixoutr[] = { | ||
360 | SOC_DAPM_SINGLE("IN1A Switch", WM9090_OUTPUT_MIXER2, 6, 1, 0), | ||
361 | SOC_DAPM_SINGLE("IN1B Switch", WM9090_OUTPUT_MIXER2, 4, 1, 0), | ||
362 | SOC_DAPM_SINGLE("IN2A Switch", WM9090_OUTPUT_MIXER2, 2, 1, 0), | ||
363 | SOC_DAPM_SINGLE("IN2B Switch", WM9090_OUTPUT_MIXER2, 0, 1, 0), | ||
364 | }; | ||
365 | |||
366 | static const struct snd_soc_dapm_widget wm9090_dapm_widgets[] = { | ||
367 | SND_SOC_DAPM_INPUT("IN1+"), | ||
368 | SND_SOC_DAPM_INPUT("IN1-"), | ||
369 | SND_SOC_DAPM_INPUT("IN2+"), | ||
370 | SND_SOC_DAPM_INPUT("IN2-"), | ||
371 | |||
372 | SND_SOC_DAPM_SUPPLY("OSC", WM9090_POWER_MANAGEMENT_1, 3, 0, NULL, 0), | ||
373 | |||
374 | SND_SOC_DAPM_PGA("IN1A PGA", WM9090_POWER_MANAGEMENT_2, 7, 0, NULL, 0), | ||
375 | SND_SOC_DAPM_PGA("IN1B PGA", WM9090_POWER_MANAGEMENT_2, 6, 0, NULL, 0), | ||
376 | SND_SOC_DAPM_PGA("IN2A PGA", WM9090_POWER_MANAGEMENT_2, 5, 0, NULL, 0), | ||
377 | SND_SOC_DAPM_PGA("IN2B PGA", WM9090_POWER_MANAGEMENT_2, 4, 0, NULL, 0), | ||
378 | |||
379 | SND_SOC_DAPM_MIXER("SPKMIX", WM9090_POWER_MANAGEMENT_3, 3, 0, | ||
380 | spkmix, ARRAY_SIZE(spkmix)), | ||
381 | SND_SOC_DAPM_MIXER("MIXOUTL", WM9090_POWER_MANAGEMENT_3, 5, 0, | ||
382 | mixoutl, ARRAY_SIZE(mixoutl)), | ||
383 | SND_SOC_DAPM_MIXER("MIXOUTR", WM9090_POWER_MANAGEMENT_3, 4, 0, | ||
384 | mixoutr, ARRAY_SIZE(mixoutr)), | ||
385 | |||
386 | SND_SOC_DAPM_PGA_E("HP PGA", SND_SOC_NOPM, 0, 0, NULL, 0, | ||
387 | hp_ev, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), | ||
388 | |||
389 | SND_SOC_DAPM_PGA("SPKPGA", WM9090_POWER_MANAGEMENT_3, 8, 0, NULL, 0), | ||
390 | SND_SOC_DAPM_MIXER("SPKOUT", WM9090_POWER_MANAGEMENT_1, 12, 0, | ||
391 | spkout, ARRAY_SIZE(spkout)), | ||
392 | |||
393 | SND_SOC_DAPM_OUTPUT("HPR"), | ||
394 | SND_SOC_DAPM_OUTPUT("HPL"), | ||
395 | SND_SOC_DAPM_OUTPUT("Speaker"), | ||
396 | }; | ||
397 | |||
398 | static const struct snd_soc_dapm_route audio_map[] = { | ||
399 | { "IN1A PGA", NULL, "IN1+" }, | ||
400 | { "IN2A PGA", NULL, "IN2+" }, | ||
401 | |||
402 | { "SPKMIX", "IN1A Switch", "IN1A PGA" }, | ||
403 | { "SPKMIX", "IN2A Switch", "IN2A PGA" }, | ||
404 | |||
405 | { "MIXOUTL", "IN1A Switch", "IN1A PGA" }, | ||
406 | { "MIXOUTL", "IN2A Switch", "IN2A PGA" }, | ||
407 | |||
408 | { "MIXOUTR", "IN1A Switch", "IN1A PGA" }, | ||
409 | { "MIXOUTR", "IN2A Switch", "IN2A PGA" }, | ||
410 | |||
411 | { "HP PGA", NULL, "OSC" }, | ||
412 | { "HP PGA", NULL, "MIXOUTL" }, | ||
413 | { "HP PGA", NULL, "MIXOUTR" }, | ||
414 | |||
415 | { "HPL", NULL, "HP PGA" }, | ||
416 | { "HPR", NULL, "HP PGA" }, | ||
417 | |||
418 | { "SPKPGA", NULL, "OSC" }, | ||
419 | { "SPKPGA", NULL, "SPKMIX" }, | ||
420 | |||
421 | { "SPKOUT", "Mixer Switch", "SPKPGA" }, | ||
422 | |||
423 | { "Speaker", NULL, "SPKOUT" }, | ||
424 | }; | ||
425 | |||
426 | static const struct snd_soc_dapm_route audio_map_in1_se[] = { | ||
427 | { "IN1B PGA", NULL, "IN1-" }, | ||
428 | |||
429 | { "SPKMIX", "IN1B Switch", "IN1B PGA" }, | ||
430 | { "MIXOUTL", "IN1B Switch", "IN1B PGA" }, | ||
431 | { "MIXOUTR", "IN1B Switch", "IN1B PGA" }, | ||
432 | }; | ||
433 | |||
434 | static const struct snd_soc_dapm_route audio_map_in1_diff[] = { | ||
435 | { "IN1A PGA", NULL, "IN1-" }, | ||
436 | }; | ||
437 | |||
438 | static const struct snd_soc_dapm_route audio_map_in2_se[] = { | ||
439 | { "IN2B PGA", NULL, "IN2-" }, | ||
440 | |||
441 | { "SPKMIX", "IN2B Switch", "IN2B PGA" }, | ||
442 | { "MIXOUTL", "IN2B Switch", "IN2B PGA" }, | ||
443 | { "MIXOUTR", "IN2B Switch", "IN2B PGA" }, | ||
444 | }; | ||
445 | |||
446 | static const struct snd_soc_dapm_route audio_map_in2_diff[] = { | ||
447 | { "IN2A PGA", NULL, "IN2-" }, | ||
448 | }; | ||
449 | |||
450 | static int wm9090_add_controls(struct snd_soc_codec *codec) | ||
451 | { | ||
452 | struct wm9090_priv *wm9090 = snd_soc_codec_get_drvdata(codec); | ||
453 | int i; | ||
454 | |||
455 | snd_soc_dapm_new_controls(codec, wm9090_dapm_widgets, | ||
456 | ARRAY_SIZE(wm9090_dapm_widgets)); | ||
457 | |||
458 | snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map)); | ||
459 | |||
460 | snd_soc_add_controls(codec, wm9090_controls, | ||
461 | ARRAY_SIZE(wm9090_controls)); | ||
462 | |||
463 | if (wm9090->pdata.lin1_diff) { | ||
464 | snd_soc_dapm_add_routes(codec, audio_map_in1_diff, | ||
465 | ARRAY_SIZE(audio_map_in1_diff)); | ||
466 | } else { | ||
467 | snd_soc_dapm_add_routes(codec, audio_map_in1_se, | ||
468 | ARRAY_SIZE(audio_map_in1_se)); | ||
469 | snd_soc_add_controls(codec, wm9090_in1_se_controls, | ||
470 | ARRAY_SIZE(wm9090_in1_se_controls)); | ||
471 | } | ||
472 | |||
473 | if (wm9090->pdata.lin2_diff) { | ||
474 | snd_soc_dapm_add_routes(codec, audio_map_in2_diff, | ||
475 | ARRAY_SIZE(audio_map_in2_diff)); | ||
476 | } else { | ||
477 | snd_soc_dapm_add_routes(codec, audio_map_in2_se, | ||
478 | ARRAY_SIZE(audio_map_in2_se)); | ||
479 | snd_soc_add_controls(codec, wm9090_in2_se_controls, | ||
480 | ARRAY_SIZE(wm9090_in2_se_controls)); | ||
481 | } | ||
482 | |||
483 | if (wm9090->pdata.agc_ena) { | ||
484 | for (i = 0; i < ARRAY_SIZE(wm9090->pdata.agc); i++) | ||
485 | snd_soc_write(codec, WM9090_AGC_CONTROL_0 + i, | ||
486 | wm9090->pdata.agc[i]); | ||
487 | snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_3, | ||
488 | WM9090_AGC_ENA, WM9090_AGC_ENA); | ||
489 | } else { | ||
490 | snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_3, | ||
491 | WM9090_AGC_ENA, 0); | ||
492 | } | ||
493 | |||
494 | return 0; | ||
495 | |||
496 | } | ||
497 | |||
498 | /* | ||
499 | * The machine driver should call this from their set_bias_level; if there | ||
500 | * isn't one then this can just be set as the set_bias_level function. | ||
501 | */ | ||
502 | static int wm9090_set_bias_level(struct snd_soc_codec *codec, | ||
503 | enum snd_soc_bias_level level) | ||
504 | { | ||
505 | u16 *reg_cache = codec->reg_cache; | ||
506 | int i, ret; | ||
507 | |||
508 | switch (level) { | ||
509 | case SND_SOC_BIAS_ON: | ||
510 | break; | ||
511 | |||
512 | case SND_SOC_BIAS_PREPARE: | ||
513 | snd_soc_update_bits(codec, WM9090_ANTIPOP2, WM9090_VMID_ENA, | ||
514 | WM9090_VMID_ENA); | ||
515 | snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_1, | ||
516 | WM9090_BIAS_ENA | | ||
517 | WM9090_VMID_RES_MASK, | ||
518 | WM9090_BIAS_ENA | | ||
519 | 1 << WM9090_VMID_RES_SHIFT); | ||
520 | msleep(1); /* Probably an overestimate */ | ||
521 | break; | ||
522 | |||
523 | case SND_SOC_BIAS_STANDBY: | ||
524 | if (codec->bias_level == SND_SOC_BIAS_OFF) { | ||
525 | /* Restore the register cache */ | ||
526 | for (i = 1; i < codec->reg_cache_size; i++) { | ||
527 | if (reg_cache[i] == wm9090_reg_defaults[i]) | ||
528 | continue; | ||
529 | if (wm9090_volatile(i)) | ||
530 | continue; | ||
531 | |||
532 | ret = snd_soc_write(codec, i, reg_cache[i]); | ||
533 | if (ret != 0) | ||
534 | dev_warn(codec->dev, | ||
535 | "Failed to restore register %d: %d\n", | ||
536 | i, ret); | ||
537 | } | ||
538 | } | ||
539 | |||
540 | /* We keep VMID off during standby since the combination of | ||
541 | * ground referenced outputs and class D speaker mean that | ||
542 | * latency is not an issue. | ||
543 | */ | ||
544 | snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_1, | ||
545 | WM9090_BIAS_ENA | WM9090_VMID_RES_MASK, 0); | ||
546 | snd_soc_update_bits(codec, WM9090_ANTIPOP2, | ||
547 | WM9090_VMID_ENA, 0); | ||
548 | break; | ||
549 | |||
550 | case SND_SOC_BIAS_OFF: | ||
551 | break; | ||
552 | } | ||
553 | |||
554 | codec->bias_level = level; | ||
555 | |||
556 | return 0; | ||
557 | } | ||
558 | |||
559 | static int wm9090_probe(struct platform_device *pdev) | ||
560 | { | ||
561 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | ||
562 | struct snd_soc_codec *codec; | ||
563 | int ret = 0; | ||
564 | |||
565 | if (wm9090_codec == NULL) { | ||
566 | dev_err(&pdev->dev, "Codec device not registered\n"); | ||
567 | return -ENODEV; | ||
568 | } | ||
569 | |||
570 | socdev->card->codec = wm9090_codec; | ||
571 | codec = wm9090_codec; | ||
572 | |||
573 | /* register pcms */ | ||
574 | ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); | ||
575 | if (ret < 0) { | ||
576 | dev_err(codec->dev, "failed to create pcms: %d\n", ret); | ||
577 | goto pcm_err; | ||
578 | } | ||
579 | |||
580 | wm9090_add_controls(codec); | ||
581 | |||
582 | return 0; | ||
583 | |||
584 | pcm_err: | ||
585 | return ret; | ||
586 | } | ||
587 | |||
588 | #ifdef CONFIG_PM | ||
589 | static int wm9090_suspend(struct platform_device *pdev, pm_message_t state) | ||
590 | { | ||
591 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | ||
592 | struct snd_soc_codec *codec = socdev->card->codec; | ||
593 | |||
594 | wm9090_set_bias_level(codec, SND_SOC_BIAS_OFF); | ||
595 | |||
596 | return 0; | ||
597 | } | ||
598 | |||
599 | static int wm9090_resume(struct platform_device *pdev) | ||
600 | { | ||
601 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | ||
602 | struct snd_soc_codec *codec = socdev->card->codec; | ||
603 | |||
604 | wm9090_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | ||
605 | |||
606 | return 0; | ||
607 | } | ||
608 | #else | ||
609 | #define wm9090_suspend NULL | ||
610 | #define wm9090_resume NULL | ||
611 | #endif | ||
612 | |||
613 | static int wm9090_remove(struct platform_device *pdev) | ||
614 | { | ||
615 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | ||
616 | |||
617 | snd_soc_free_pcms(socdev); | ||
618 | snd_soc_dapm_free(socdev); | ||
619 | |||
620 | return 0; | ||
621 | } | ||
622 | |||
623 | struct snd_soc_codec_device soc_codec_dev_wm9090 = { | ||
624 | .probe = wm9090_probe, | ||
625 | .remove = wm9090_remove, | ||
626 | .suspend = wm9090_suspend, | ||
627 | .resume = wm9090_resume, | ||
628 | }; | ||
629 | EXPORT_SYMBOL_GPL(soc_codec_dev_wm9090); | ||
630 | |||
631 | static int wm9090_i2c_probe(struct i2c_client *i2c, | ||
632 | const struct i2c_device_id *id) | ||
633 | { | ||
634 | struct wm9090_priv *wm9090; | ||
635 | struct snd_soc_codec *codec; | ||
636 | int ret; | ||
637 | |||
638 | wm9090 = kzalloc(sizeof(*wm9090), GFP_KERNEL); | ||
639 | if (wm9090 == NULL) { | ||
640 | dev_err(&i2c->dev, "Can not allocate memory\n"); | ||
641 | return -ENOMEM; | ||
642 | } | ||
643 | codec = &wm9090->codec; | ||
644 | |||
645 | if (i2c->dev.platform_data) | ||
646 | memcpy(&wm9090->pdata, i2c->dev.platform_data, | ||
647 | sizeof(wm9090->pdata)); | ||
648 | |||
649 | wm9090_codec = codec; | ||
650 | |||
651 | i2c_set_clientdata(i2c, wm9090); | ||
652 | |||
653 | mutex_init(&codec->mutex); | ||
654 | INIT_LIST_HEAD(&codec->dapm_widgets); | ||
655 | INIT_LIST_HEAD(&codec->dapm_paths); | ||
656 | |||
657 | codec->control_data = i2c; | ||
658 | snd_soc_codec_set_drvdata(codec, wm9090); | ||
659 | codec->dev = &i2c->dev; | ||
660 | codec->name = "WM9090"; | ||
661 | codec->owner = THIS_MODULE; | ||
662 | codec->bias_level = SND_SOC_BIAS_OFF; | ||
663 | codec->set_bias_level = wm9090_set_bias_level, | ||
664 | codec->reg_cache_size = WM9090_MAX_REGISTER + 1; | ||
665 | codec->reg_cache = &wm9090->reg_cache; | ||
666 | codec->volatile_register = wm9090_volatile; | ||
667 | |||
668 | ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C); | ||
669 | if (ret != 0) { | ||
670 | dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); | ||
671 | goto err; | ||
672 | } | ||
673 | |||
674 | memcpy(&wm9090->reg_cache, wm9090_reg_defaults, | ||
675 | sizeof(wm9090->reg_cache)); | ||
676 | |||
677 | ret = snd_soc_read(codec, WM9090_SOFTWARE_RESET); | ||
678 | if (ret < 0) | ||
679 | goto err; | ||
680 | if (ret != wm9090_reg_defaults[WM9090_SOFTWARE_RESET]) { | ||
681 | dev_err(&i2c->dev, "Device is not a WM9090, ID=%x\n", ret); | ||
682 | ret = -EINVAL; | ||
683 | goto err; | ||
684 | } | ||
685 | |||
686 | ret = snd_soc_write(codec, WM9090_SOFTWARE_RESET, 0); | ||
687 | if (ret < 0) | ||
688 | goto err; | ||
689 | |||
690 | /* Configure some defaults; they will be written out when we | ||
691 | * bring the bias up. | ||
692 | */ | ||
693 | wm9090->reg_cache[WM9090_IN1_LINE_INPUT_A_VOLUME] |= WM9090_IN1_VU | ||
694 | | WM9090_IN1A_ZC; | ||
695 | wm9090->reg_cache[WM9090_IN1_LINE_INPUT_B_VOLUME] |= WM9090_IN1_VU | ||
696 | | WM9090_IN1B_ZC; | ||
697 | wm9090->reg_cache[WM9090_IN2_LINE_INPUT_A_VOLUME] |= WM9090_IN2_VU | ||
698 | | WM9090_IN2A_ZC; | ||
699 | wm9090->reg_cache[WM9090_IN2_LINE_INPUT_B_VOLUME] |= WM9090_IN2_VU | ||
700 | | WM9090_IN2B_ZC; | ||
701 | wm9090->reg_cache[WM9090_SPEAKER_VOLUME_LEFT] |= | ||
702 | WM9090_SPKOUT_VU | WM9090_SPKOUTL_ZC; | ||
703 | wm9090->reg_cache[WM9090_LEFT_OUTPUT_VOLUME] |= | ||
704 | WM9090_HPOUT1_VU | WM9090_HPOUT1L_ZC; | ||
705 | wm9090->reg_cache[WM9090_RIGHT_OUTPUT_VOLUME] |= | ||
706 | WM9090_HPOUT1_VU | WM9090_HPOUT1R_ZC; | ||
707 | |||
708 | wm9090->reg_cache[WM9090_CLOCKING_1] |= WM9090_TOCLK_ENA; | ||
709 | |||
710 | wm9090_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | ||
711 | |||
712 | ret = snd_soc_register_codec(codec); | ||
713 | if (ret != 0) { | ||
714 | dev_err(&i2c->dev, "Failed to register CODEC: %d\n", ret); | ||
715 | goto err_bias; | ||
716 | } | ||
717 | |||
718 | return 0; | ||
719 | |||
720 | err_bias: | ||
721 | wm9090_set_bias_level(codec, SND_SOC_BIAS_OFF); | ||
722 | err: | ||
723 | kfree(wm9090); | ||
724 | i2c_set_clientdata(i2c, NULL); | ||
725 | wm9090_codec = NULL; | ||
726 | |||
727 | return ret; | ||
728 | } | ||
729 | |||
730 | static int wm9090_i2c_remove(struct i2c_client *i2c) | ||
731 | { | ||
732 | struct wm9090_priv *wm9090 = i2c_get_clientdata(i2c); | ||
733 | struct snd_soc_codec *codec = &wm9090->codec; | ||
734 | |||
735 | snd_soc_unregister_codec(codec); | ||
736 | wm9090_set_bias_level(codec, SND_SOC_BIAS_OFF); | ||
737 | kfree(wm9090); | ||
738 | wm9090_codec = NULL; | ||
739 | |||
740 | return 0; | ||
741 | } | ||
742 | |||
743 | static const struct i2c_device_id wm9090_id[] = { | ||
744 | { "wm9090", 0 }, | ||
745 | { } | ||
746 | }; | ||
747 | MODULE_DEVICE_TABLE(i2c, wm9090_id); | ||
748 | |||
749 | static struct i2c_driver wm9090_i2c_driver = { | ||
750 | .driver = { | ||
751 | .name = "wm9090", | ||
752 | .owner = THIS_MODULE, | ||
753 | }, | ||
754 | .probe = wm9090_i2c_probe, | ||
755 | .remove = __devexit_p(wm9090_i2c_remove), | ||
756 | .id_table = wm9090_id, | ||
757 | }; | ||
758 | |||
759 | static int __init wm9090_init(void) | ||
760 | { | ||
761 | return i2c_add_driver(&wm9090_i2c_driver); | ||
762 | } | ||
763 | module_init(wm9090_init); | ||
764 | |||
765 | static void __exit wm9090_exit(void) | ||
766 | { | ||
767 | i2c_del_driver(&wm9090_i2c_driver); | ||
768 | } | ||
769 | module_exit(wm9090_exit); | ||
770 | |||
771 | MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); | ||
772 | MODULE_DESCRIPTION("WM9090 ASoC driver"); | ||
773 | MODULE_LICENSE("GPL"); | ||
diff --git a/sound/soc/codecs/wm9090.h b/sound/soc/codecs/wm9090.h new file mode 100644 index 000000000000..b08eab932a5b --- /dev/null +++ b/sound/soc/codecs/wm9090.h | |||
@@ -0,0 +1,715 @@ | |||
1 | /* | ||
2 | * ALSA SoC WM9090 driver | ||
3 | * | ||
4 | * Copyright 2009 Wolfson Microelectronics | ||
5 | * | ||
6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License | ||
10 | * version 2 as published by the Free Software Foundation. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, but | ||
13 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
15 | * General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | ||
20 | * 02110-1301 USA | ||
21 | */ | ||
22 | |||
23 | #ifndef __WM9090_H | ||
24 | #define __WM9090_H | ||
25 | |||
26 | extern struct snd_soc_codec_device soc_codec_dev_wm9090; | ||
27 | |||
28 | /* | ||
29 | * Register values. | ||
30 | */ | ||
31 | #define WM9090_SOFTWARE_RESET 0x00 | ||
32 | #define WM9090_POWER_MANAGEMENT_1 0x01 | ||
33 | #define WM9090_POWER_MANAGEMENT_2 0x02 | ||
34 | #define WM9090_POWER_MANAGEMENT_3 0x03 | ||
35 | #define WM9090_CLOCKING_1 0x06 | ||
36 | #define WM9090_IN1_LINE_CONTROL 0x16 | ||
37 | #define WM9090_IN2_LINE_CONTROL 0x17 | ||
38 | #define WM9090_IN1_LINE_INPUT_A_VOLUME 0x18 | ||
39 | #define WM9090_IN1_LINE_INPUT_B_VOLUME 0x19 | ||
40 | #define WM9090_IN2_LINE_INPUT_A_VOLUME 0x1A | ||
41 | #define WM9090_IN2_LINE_INPUT_B_VOLUME 0x1B | ||
42 | #define WM9090_LEFT_OUTPUT_VOLUME 0x1C | ||
43 | #define WM9090_RIGHT_OUTPUT_VOLUME 0x1D | ||
44 | #define WM9090_SPKMIXL_ATTENUATION 0x22 | ||
45 | #define WM9090_SPKOUT_MIXERS 0x24 | ||
46 | #define WM9090_CLASSD3 0x25 | ||
47 | #define WM9090_SPEAKER_VOLUME_LEFT 0x26 | ||
48 | #define WM9090_OUTPUT_MIXER1 0x2D | ||
49 | #define WM9090_OUTPUT_MIXER2 0x2E | ||
50 | #define WM9090_OUTPUT_MIXER3 0x2F | ||
51 | #define WM9090_OUTPUT_MIXER4 0x30 | ||
52 | #define WM9090_SPEAKER_MIXER 0x36 | ||
53 | #define WM9090_ANTIPOP2 0x39 | ||
54 | #define WM9090_WRITE_SEQUENCER_0 0x46 | ||
55 | #define WM9090_WRITE_SEQUENCER_1 0x47 | ||
56 | #define WM9090_WRITE_SEQUENCER_2 0x48 | ||
57 | #define WM9090_WRITE_SEQUENCER_3 0x49 | ||
58 | #define WM9090_WRITE_SEQUENCER_4 0x4A | ||
59 | #define WM9090_WRITE_SEQUENCER_5 0x4B | ||
60 | #define WM9090_CHARGE_PUMP_1 0x4C | ||
61 | #define WM9090_DC_SERVO_0 0x54 | ||
62 | #define WM9090_DC_SERVO_1 0x55 | ||
63 | #define WM9090_DC_SERVO_3 0x57 | ||
64 | #define WM9090_DC_SERVO_READBACK_0 0x58 | ||
65 | #define WM9090_DC_SERVO_READBACK_1 0x59 | ||
66 | #define WM9090_DC_SERVO_READBACK_2 0x5A | ||
67 | #define WM9090_ANALOGUE_HP_0 0x60 | ||
68 | #define WM9090_AGC_CONTROL_0 0x62 | ||
69 | #define WM9090_AGC_CONTROL_1 0x63 | ||
70 | #define WM9090_AGC_CONTROL_2 0x64 | ||
71 | |||
72 | #define WM9090_REGISTER_COUNT 40 | ||
73 | #define WM9090_MAX_REGISTER 0x64 | ||
74 | |||
75 | /* | ||
76 | * Field Definitions. | ||
77 | */ | ||
78 | |||
79 | /* | ||
80 | * R0 (0x00) - Software Reset | ||
81 | */ | ||
82 | #define WM9090_SW_RESET_MASK 0xFFFF /* SW_RESET - [15:0] */ | ||
83 | #define WM9090_SW_RESET_SHIFT 0 /* SW_RESET - [15:0] */ | ||
84 | #define WM9090_SW_RESET_WIDTH 16 /* SW_RESET - [15:0] */ | ||
85 | |||
86 | /* | ||
87 | * R1 (0x01) - Power Management (1) | ||
88 | */ | ||
89 | #define WM9090_SPKOUTL_ENA 0x1000 /* SPKOUTL_ENA */ | ||
90 | #define WM9090_SPKOUTL_ENA_MASK 0x1000 /* SPKOUTL_ENA */ | ||
91 | #define WM9090_SPKOUTL_ENA_SHIFT 12 /* SPKOUTL_ENA */ | ||
92 | #define WM9090_SPKOUTL_ENA_WIDTH 1 /* SPKOUTL_ENA */ | ||
93 | #define WM9090_HPOUT1L_ENA 0x0200 /* HPOUT1L_ENA */ | ||
94 | #define WM9090_HPOUT1L_ENA_MASK 0x0200 /* HPOUT1L_ENA */ | ||
95 | #define WM9090_HPOUT1L_ENA_SHIFT 9 /* HPOUT1L_ENA */ | ||
96 | #define WM9090_HPOUT1L_ENA_WIDTH 1 /* HPOUT1L_ENA */ | ||
97 | #define WM9090_HPOUT1R_ENA 0x0100 /* HPOUT1R_ENA */ | ||
98 | #define WM9090_HPOUT1R_ENA_MASK 0x0100 /* HPOUT1R_ENA */ | ||
99 | #define WM9090_HPOUT1R_ENA_SHIFT 8 /* HPOUT1R_ENA */ | ||
100 | #define WM9090_HPOUT1R_ENA_WIDTH 1 /* HPOUT1R_ENA */ | ||
101 | #define WM9090_OSC_ENA 0x0008 /* OSC_ENA */ | ||
102 | #define WM9090_OSC_ENA_MASK 0x0008 /* OSC_ENA */ | ||
103 | #define WM9090_OSC_ENA_SHIFT 3 /* OSC_ENA */ | ||
104 | #define WM9090_OSC_ENA_WIDTH 1 /* OSC_ENA */ | ||
105 | #define WM9090_VMID_RES_MASK 0x0006 /* VMID_RES - [2:1] */ | ||
106 | #define WM9090_VMID_RES_SHIFT 1 /* VMID_RES - [2:1] */ | ||
107 | #define WM9090_VMID_RES_WIDTH 2 /* VMID_RES - [2:1] */ | ||
108 | #define WM9090_BIAS_ENA 0x0001 /* BIAS_ENA */ | ||
109 | #define WM9090_BIAS_ENA_MASK 0x0001 /* BIAS_ENA */ | ||
110 | #define WM9090_BIAS_ENA_SHIFT 0 /* BIAS_ENA */ | ||
111 | #define WM9090_BIAS_ENA_WIDTH 1 /* BIAS_ENA */ | ||
112 | |||
113 | /* | ||
114 | * R2 (0x02) - Power Management (2) | ||
115 | */ | ||
116 | #define WM9090_TSHUT 0x8000 /* TSHUT */ | ||
117 | #define WM9090_TSHUT_MASK 0x8000 /* TSHUT */ | ||
118 | #define WM9090_TSHUT_SHIFT 15 /* TSHUT */ | ||
119 | #define WM9090_TSHUT_WIDTH 1 /* TSHUT */ | ||
120 | #define WM9090_TSHUT_ENA 0x4000 /* TSHUT_ENA */ | ||
121 | #define WM9090_TSHUT_ENA_MASK 0x4000 /* TSHUT_ENA */ | ||
122 | #define WM9090_TSHUT_ENA_SHIFT 14 /* TSHUT_ENA */ | ||
123 | #define WM9090_TSHUT_ENA_WIDTH 1 /* TSHUT_ENA */ | ||
124 | #define WM9090_TSHUT_OPDIS 0x2000 /* TSHUT_OPDIS */ | ||
125 | #define WM9090_TSHUT_OPDIS_MASK 0x2000 /* TSHUT_OPDIS */ | ||
126 | #define WM9090_TSHUT_OPDIS_SHIFT 13 /* TSHUT_OPDIS */ | ||
127 | #define WM9090_TSHUT_OPDIS_WIDTH 1 /* TSHUT_OPDIS */ | ||
128 | #define WM9090_IN1A_ENA 0x0080 /* IN1A_ENA */ | ||
129 | #define WM9090_IN1A_ENA_MASK 0x0080 /* IN1A_ENA */ | ||
130 | #define WM9090_IN1A_ENA_SHIFT 7 /* IN1A_ENA */ | ||
131 | #define WM9090_IN1A_ENA_WIDTH 1 /* IN1A_ENA */ | ||
132 | #define WM9090_IN1B_ENA 0x0040 /* IN1B_ENA */ | ||
133 | #define WM9090_IN1B_ENA_MASK 0x0040 /* IN1B_ENA */ | ||
134 | #define WM9090_IN1B_ENA_SHIFT 6 /* IN1B_ENA */ | ||
135 | #define WM9090_IN1B_ENA_WIDTH 1 /* IN1B_ENA */ | ||
136 | #define WM9090_IN2A_ENA 0x0020 /* IN2A_ENA */ | ||
137 | #define WM9090_IN2A_ENA_MASK 0x0020 /* IN2A_ENA */ | ||
138 | #define WM9090_IN2A_ENA_SHIFT 5 /* IN2A_ENA */ | ||
139 | #define WM9090_IN2A_ENA_WIDTH 1 /* IN2A_ENA */ | ||
140 | #define WM9090_IN2B_ENA 0x0010 /* IN2B_ENA */ | ||
141 | #define WM9090_IN2B_ENA_MASK 0x0010 /* IN2B_ENA */ | ||
142 | #define WM9090_IN2B_ENA_SHIFT 4 /* IN2B_ENA */ | ||
143 | #define WM9090_IN2B_ENA_WIDTH 1 /* IN2B_ENA */ | ||
144 | |||
145 | /* | ||
146 | * R3 (0x03) - Power Management (3) | ||
147 | */ | ||
148 | #define WM9090_AGC_ENA 0x4000 /* AGC_ENA */ | ||
149 | #define WM9090_AGC_ENA_MASK 0x4000 /* AGC_ENA */ | ||
150 | #define WM9090_AGC_ENA_SHIFT 14 /* AGC_ENA */ | ||
151 | #define WM9090_AGC_ENA_WIDTH 1 /* AGC_ENA */ | ||
152 | #define WM9090_SPKLVOL_ENA 0x0100 /* SPKLVOL_ENA */ | ||
153 | #define WM9090_SPKLVOL_ENA_MASK 0x0100 /* SPKLVOL_ENA */ | ||
154 | #define WM9090_SPKLVOL_ENA_SHIFT 8 /* SPKLVOL_ENA */ | ||
155 | #define WM9090_SPKLVOL_ENA_WIDTH 1 /* SPKLVOL_ENA */ | ||
156 | #define WM9090_MIXOUTL_ENA 0x0020 /* MIXOUTL_ENA */ | ||
157 | #define WM9090_MIXOUTL_ENA_MASK 0x0020 /* MIXOUTL_ENA */ | ||
158 | #define WM9090_MIXOUTL_ENA_SHIFT 5 /* MIXOUTL_ENA */ | ||
159 | #define WM9090_MIXOUTL_ENA_WIDTH 1 /* MIXOUTL_ENA */ | ||
160 | #define WM9090_MIXOUTR_ENA 0x0010 /* MIXOUTR_ENA */ | ||
161 | #define WM9090_MIXOUTR_ENA_MASK 0x0010 /* MIXOUTR_ENA */ | ||
162 | #define WM9090_MIXOUTR_ENA_SHIFT 4 /* MIXOUTR_ENA */ | ||
163 | #define WM9090_MIXOUTR_ENA_WIDTH 1 /* MIXOUTR_ENA */ | ||
164 | #define WM9090_SPKMIX_ENA 0x0008 /* SPKMIX_ENA */ | ||
165 | #define WM9090_SPKMIX_ENA_MASK 0x0008 /* SPKMIX_ENA */ | ||
166 | #define WM9090_SPKMIX_ENA_SHIFT 3 /* SPKMIX_ENA */ | ||
167 | #define WM9090_SPKMIX_ENA_WIDTH 1 /* SPKMIX_ENA */ | ||
168 | |||
169 | /* | ||
170 | * R6 (0x06) - Clocking 1 | ||
171 | */ | ||
172 | #define WM9090_TOCLK_RATE 0x8000 /* TOCLK_RATE */ | ||
173 | #define WM9090_TOCLK_RATE_MASK 0x8000 /* TOCLK_RATE */ | ||
174 | #define WM9090_TOCLK_RATE_SHIFT 15 /* TOCLK_RATE */ | ||
175 | #define WM9090_TOCLK_RATE_WIDTH 1 /* TOCLK_RATE */ | ||
176 | #define WM9090_TOCLK_ENA 0x4000 /* TOCLK_ENA */ | ||
177 | #define WM9090_TOCLK_ENA_MASK 0x4000 /* TOCLK_ENA */ | ||
178 | #define WM9090_TOCLK_ENA_SHIFT 14 /* TOCLK_ENA */ | ||
179 | #define WM9090_TOCLK_ENA_WIDTH 1 /* TOCLK_ENA */ | ||
180 | |||
181 | /* | ||
182 | * R22 (0x16) - IN1 Line Control | ||
183 | */ | ||
184 | #define WM9090_IN1_DIFF 0x0002 /* IN1_DIFF */ | ||
185 | #define WM9090_IN1_DIFF_MASK 0x0002 /* IN1_DIFF */ | ||
186 | #define WM9090_IN1_DIFF_SHIFT 1 /* IN1_DIFF */ | ||
187 | #define WM9090_IN1_DIFF_WIDTH 1 /* IN1_DIFF */ | ||
188 | #define WM9090_IN1_CLAMP 0x0001 /* IN1_CLAMP */ | ||
189 | #define WM9090_IN1_CLAMP_MASK 0x0001 /* IN1_CLAMP */ | ||
190 | #define WM9090_IN1_CLAMP_SHIFT 0 /* IN1_CLAMP */ | ||
191 | #define WM9090_IN1_CLAMP_WIDTH 1 /* IN1_CLAMP */ | ||
192 | |||
193 | /* | ||
194 | * R23 (0x17) - IN2 Line Control | ||
195 | */ | ||
196 | #define WM9090_IN2_DIFF 0x0002 /* IN2_DIFF */ | ||
197 | #define WM9090_IN2_DIFF_MASK 0x0002 /* IN2_DIFF */ | ||
198 | #define WM9090_IN2_DIFF_SHIFT 1 /* IN2_DIFF */ | ||
199 | #define WM9090_IN2_DIFF_WIDTH 1 /* IN2_DIFF */ | ||
200 | #define WM9090_IN2_CLAMP 0x0001 /* IN2_CLAMP */ | ||
201 | #define WM9090_IN2_CLAMP_MASK 0x0001 /* IN2_CLAMP */ | ||
202 | #define WM9090_IN2_CLAMP_SHIFT 0 /* IN2_CLAMP */ | ||
203 | #define WM9090_IN2_CLAMP_WIDTH 1 /* IN2_CLAMP */ | ||
204 | |||
205 | /* | ||
206 | * R24 (0x18) - IN1 Line Input A Volume | ||
207 | */ | ||
208 | #define WM9090_IN1_VU 0x0100 /* IN1_VU */ | ||
209 | #define WM9090_IN1_VU_MASK 0x0100 /* IN1_VU */ | ||
210 | #define WM9090_IN1_VU_SHIFT 8 /* IN1_VU */ | ||
211 | #define WM9090_IN1_VU_WIDTH 1 /* IN1_VU */ | ||
212 | #define WM9090_IN1A_MUTE 0x0080 /* IN1A_MUTE */ | ||
213 | #define WM9090_IN1A_MUTE_MASK 0x0080 /* IN1A_MUTE */ | ||
214 | #define WM9090_IN1A_MUTE_SHIFT 7 /* IN1A_MUTE */ | ||
215 | #define WM9090_IN1A_MUTE_WIDTH 1 /* IN1A_MUTE */ | ||
216 | #define WM9090_IN1A_ZC 0x0040 /* IN1A_ZC */ | ||
217 | #define WM9090_IN1A_ZC_MASK 0x0040 /* IN1A_ZC */ | ||
218 | #define WM9090_IN1A_ZC_SHIFT 6 /* IN1A_ZC */ | ||
219 | #define WM9090_IN1A_ZC_WIDTH 1 /* IN1A_ZC */ | ||
220 | #define WM9090_IN1A_VOL_MASK 0x0007 /* IN1A_VOL - [2:0] */ | ||
221 | #define WM9090_IN1A_VOL_SHIFT 0 /* IN1A_VOL - [2:0] */ | ||
222 | #define WM9090_IN1A_VOL_WIDTH 3 /* IN1A_VOL - [2:0] */ | ||
223 | |||
224 | /* | ||
225 | * R25 (0x19) - IN1 Line Input B Volume | ||
226 | */ | ||
227 | #define WM9090_IN1_VU 0x0100 /* IN1_VU */ | ||
228 | #define WM9090_IN1_VU_MASK 0x0100 /* IN1_VU */ | ||
229 | #define WM9090_IN1_VU_SHIFT 8 /* IN1_VU */ | ||
230 | #define WM9090_IN1_VU_WIDTH 1 /* IN1_VU */ | ||
231 | #define WM9090_IN1B_MUTE 0x0080 /* IN1B_MUTE */ | ||
232 | #define WM9090_IN1B_MUTE_MASK 0x0080 /* IN1B_MUTE */ | ||
233 | #define WM9090_IN1B_MUTE_SHIFT 7 /* IN1B_MUTE */ | ||
234 | #define WM9090_IN1B_MUTE_WIDTH 1 /* IN1B_MUTE */ | ||
235 | #define WM9090_IN1B_ZC 0x0040 /* IN1B_ZC */ | ||
236 | #define WM9090_IN1B_ZC_MASK 0x0040 /* IN1B_ZC */ | ||
237 | #define WM9090_IN1B_ZC_SHIFT 6 /* IN1B_ZC */ | ||
238 | #define WM9090_IN1B_ZC_WIDTH 1 /* IN1B_ZC */ | ||
239 | #define WM9090_IN1B_VOL_MASK 0x0007 /* IN1B_VOL - [2:0] */ | ||
240 | #define WM9090_IN1B_VOL_SHIFT 0 /* IN1B_VOL - [2:0] */ | ||
241 | #define WM9090_IN1B_VOL_WIDTH 3 /* IN1B_VOL - [2:0] */ | ||
242 | |||
243 | /* | ||
244 | * R26 (0x1A) - IN2 Line Input A Volume | ||
245 | */ | ||
246 | #define WM9090_IN2_VU 0x0100 /* IN2_VU */ | ||
247 | #define WM9090_IN2_VU_MASK 0x0100 /* IN2_VU */ | ||
248 | #define WM9090_IN2_VU_SHIFT 8 /* IN2_VU */ | ||
249 | #define WM9090_IN2_VU_WIDTH 1 /* IN2_VU */ | ||
250 | #define WM9090_IN2A_MUTE 0x0080 /* IN2A_MUTE */ | ||
251 | #define WM9090_IN2A_MUTE_MASK 0x0080 /* IN2A_MUTE */ | ||
252 | #define WM9090_IN2A_MUTE_SHIFT 7 /* IN2A_MUTE */ | ||
253 | #define WM9090_IN2A_MUTE_WIDTH 1 /* IN2A_MUTE */ | ||
254 | #define WM9090_IN2A_ZC 0x0040 /* IN2A_ZC */ | ||
255 | #define WM9090_IN2A_ZC_MASK 0x0040 /* IN2A_ZC */ | ||
256 | #define WM9090_IN2A_ZC_SHIFT 6 /* IN2A_ZC */ | ||
257 | #define WM9090_IN2A_ZC_WIDTH 1 /* IN2A_ZC */ | ||
258 | #define WM9090_IN2A_VOL_MASK 0x0007 /* IN2A_VOL - [2:0] */ | ||
259 | #define WM9090_IN2A_VOL_SHIFT 0 /* IN2A_VOL - [2:0] */ | ||
260 | #define WM9090_IN2A_VOL_WIDTH 3 /* IN2A_VOL - [2:0] */ | ||
261 | |||
262 | /* | ||
263 | * R27 (0x1B) - IN2 Line Input B Volume | ||
264 | */ | ||
265 | #define WM9090_IN2_VU 0x0100 /* IN2_VU */ | ||
266 | #define WM9090_IN2_VU_MASK 0x0100 /* IN2_VU */ | ||
267 | #define WM9090_IN2_VU_SHIFT 8 /* IN2_VU */ | ||
268 | #define WM9090_IN2_VU_WIDTH 1 /* IN2_VU */ | ||
269 | #define WM9090_IN2B_MUTE 0x0080 /* IN2B_MUTE */ | ||
270 | #define WM9090_IN2B_MUTE_MASK 0x0080 /* IN2B_MUTE */ | ||
271 | #define WM9090_IN2B_MUTE_SHIFT 7 /* IN2B_MUTE */ | ||
272 | #define WM9090_IN2B_MUTE_WIDTH 1 /* IN2B_MUTE */ | ||
273 | #define WM9090_IN2B_ZC 0x0040 /* IN2B_ZC */ | ||
274 | #define WM9090_IN2B_ZC_MASK 0x0040 /* IN2B_ZC */ | ||
275 | #define WM9090_IN2B_ZC_SHIFT 6 /* IN2B_ZC */ | ||
276 | #define WM9090_IN2B_ZC_WIDTH 1 /* IN2B_ZC */ | ||
277 | #define WM9090_IN2B_VOL_MASK 0x0007 /* IN2B_VOL - [2:0] */ | ||
278 | #define WM9090_IN2B_VOL_SHIFT 0 /* IN2B_VOL - [2:0] */ | ||
279 | #define WM9090_IN2B_VOL_WIDTH 3 /* IN2B_VOL - [2:0] */ | ||
280 | |||
281 | /* | ||
282 | * R28 (0x1C) - Left Output Volume | ||
283 | */ | ||
284 | #define WM9090_HPOUT1_VU 0x0100 /* HPOUT1_VU */ | ||
285 | #define WM9090_HPOUT1_VU_MASK 0x0100 /* HPOUT1_VU */ | ||
286 | #define WM9090_HPOUT1_VU_SHIFT 8 /* HPOUT1_VU */ | ||
287 | #define WM9090_HPOUT1_VU_WIDTH 1 /* HPOUT1_VU */ | ||
288 | #define WM9090_HPOUT1L_ZC 0x0080 /* HPOUT1L_ZC */ | ||
289 | #define WM9090_HPOUT1L_ZC_MASK 0x0080 /* HPOUT1L_ZC */ | ||
290 | #define WM9090_HPOUT1L_ZC_SHIFT 7 /* HPOUT1L_ZC */ | ||
291 | #define WM9090_HPOUT1L_ZC_WIDTH 1 /* HPOUT1L_ZC */ | ||
292 | #define WM9090_HPOUT1L_MUTE 0x0040 /* HPOUT1L_MUTE */ | ||
293 | #define WM9090_HPOUT1L_MUTE_MASK 0x0040 /* HPOUT1L_MUTE */ | ||
294 | #define WM9090_HPOUT1L_MUTE_SHIFT 6 /* HPOUT1L_MUTE */ | ||
295 | #define WM9090_HPOUT1L_MUTE_WIDTH 1 /* HPOUT1L_MUTE */ | ||
296 | #define WM9090_HPOUT1L_VOL_MASK 0x003F /* HPOUT1L_VOL - [5:0] */ | ||
297 | #define WM9090_HPOUT1L_VOL_SHIFT 0 /* HPOUT1L_VOL - [5:0] */ | ||
298 | #define WM9090_HPOUT1L_VOL_WIDTH 6 /* HPOUT1L_VOL - [5:0] */ | ||
299 | |||
300 | /* | ||
301 | * R29 (0x1D) - Right Output Volume | ||
302 | */ | ||
303 | #define WM9090_HPOUT1_VU 0x0100 /* HPOUT1_VU */ | ||
304 | #define WM9090_HPOUT1_VU_MASK 0x0100 /* HPOUT1_VU */ | ||
305 | #define WM9090_HPOUT1_VU_SHIFT 8 /* HPOUT1_VU */ | ||
306 | #define WM9090_HPOUT1_VU_WIDTH 1 /* HPOUT1_VU */ | ||
307 | #define WM9090_HPOUT1R_ZC 0x0080 /* HPOUT1R_ZC */ | ||
308 | #define WM9090_HPOUT1R_ZC_MASK 0x0080 /* HPOUT1R_ZC */ | ||
309 | #define WM9090_HPOUT1R_ZC_SHIFT 7 /* HPOUT1R_ZC */ | ||
310 | #define WM9090_HPOUT1R_ZC_WIDTH 1 /* HPOUT1R_ZC */ | ||
311 | #define WM9090_HPOUT1R_MUTE 0x0040 /* HPOUT1R_MUTE */ | ||
312 | #define WM9090_HPOUT1R_MUTE_MASK 0x0040 /* HPOUT1R_MUTE */ | ||
313 | #define WM9090_HPOUT1R_MUTE_SHIFT 6 /* HPOUT1R_MUTE */ | ||
314 | #define WM9090_HPOUT1R_MUTE_WIDTH 1 /* HPOUT1R_MUTE */ | ||
315 | #define WM9090_HPOUT1R_VOL_MASK 0x003F /* HPOUT1R_VOL - [5:0] */ | ||
316 | #define WM9090_HPOUT1R_VOL_SHIFT 0 /* HPOUT1R_VOL - [5:0] */ | ||
317 | #define WM9090_HPOUT1R_VOL_WIDTH 6 /* HPOUT1R_VOL - [5:0] */ | ||
318 | |||
319 | /* | ||
320 | * R34 (0x22) - SPKMIXL Attenuation | ||
321 | */ | ||
322 | #define WM9090_SPKMIX_MUTE 0x0100 /* SPKMIX_MUTE */ | ||
323 | #define WM9090_SPKMIX_MUTE_MASK 0x0100 /* SPKMIX_MUTE */ | ||
324 | #define WM9090_SPKMIX_MUTE_SHIFT 8 /* SPKMIX_MUTE */ | ||
325 | #define WM9090_SPKMIX_MUTE_WIDTH 1 /* SPKMIX_MUTE */ | ||
326 | #define WM9090_IN1A_SPKMIX_VOL_MASK 0x00C0 /* IN1A_SPKMIX_VOL - [7:6] */ | ||
327 | #define WM9090_IN1A_SPKMIX_VOL_SHIFT 6 /* IN1A_SPKMIX_VOL - [7:6] */ | ||
328 | #define WM9090_IN1A_SPKMIX_VOL_WIDTH 2 /* IN1A_SPKMIX_VOL - [7:6] */ | ||
329 | #define WM9090_IN1B_SPKMIX_VOL_MASK 0x0030 /* IN1B_SPKMIX_VOL - [5:4] */ | ||
330 | #define WM9090_IN1B_SPKMIX_VOL_SHIFT 4 /* IN1B_SPKMIX_VOL - [5:4] */ | ||
331 | #define WM9090_IN1B_SPKMIX_VOL_WIDTH 2 /* IN1B_SPKMIX_VOL - [5:4] */ | ||
332 | #define WM9090_IN2A_SPKMIX_VOL_MASK 0x000C /* IN2A_SPKMIX_VOL - [3:2] */ | ||
333 | #define WM9090_IN2A_SPKMIX_VOL_SHIFT 2 /* IN2A_SPKMIX_VOL - [3:2] */ | ||
334 | #define WM9090_IN2A_SPKMIX_VOL_WIDTH 2 /* IN2A_SPKMIX_VOL - [3:2] */ | ||
335 | #define WM9090_IN2B_SPKMIX_VOL_MASK 0x0003 /* IN2B_SPKMIX_VOL - [1:0] */ | ||
336 | #define WM9090_IN2B_SPKMIX_VOL_SHIFT 0 /* IN2B_SPKMIX_VOL - [1:0] */ | ||
337 | #define WM9090_IN2B_SPKMIX_VOL_WIDTH 2 /* IN2B_SPKMIX_VOL - [1:0] */ | ||
338 | |||
339 | /* | ||
340 | * R36 (0x24) - SPKOUT Mixers | ||
341 | */ | ||
342 | #define WM9090_SPKMIXL_TO_SPKOUTL 0x0010 /* SPKMIXL_TO_SPKOUTL */ | ||
343 | #define WM9090_SPKMIXL_TO_SPKOUTL_MASK 0x0010 /* SPKMIXL_TO_SPKOUTL */ | ||
344 | #define WM9090_SPKMIXL_TO_SPKOUTL_SHIFT 4 /* SPKMIXL_TO_SPKOUTL */ | ||
345 | #define WM9090_SPKMIXL_TO_SPKOUTL_WIDTH 1 /* SPKMIXL_TO_SPKOUTL */ | ||
346 | |||
347 | /* | ||
348 | * R37 (0x25) - ClassD3 | ||
349 | */ | ||
350 | #define WM9090_SPKOUTL_BOOST_MASK 0x0038 /* SPKOUTL_BOOST - [5:3] */ | ||
351 | #define WM9090_SPKOUTL_BOOST_SHIFT 3 /* SPKOUTL_BOOST - [5:3] */ | ||
352 | #define WM9090_SPKOUTL_BOOST_WIDTH 3 /* SPKOUTL_BOOST - [5:3] */ | ||
353 | |||
354 | /* | ||
355 | * R38 (0x26) - Speaker Volume Left | ||
356 | */ | ||
357 | #define WM9090_SPKOUT_VU 0x0100 /* SPKOUT_VU */ | ||
358 | #define WM9090_SPKOUT_VU_MASK 0x0100 /* SPKOUT_VU */ | ||
359 | #define WM9090_SPKOUT_VU_SHIFT 8 /* SPKOUT_VU */ | ||
360 | #define WM9090_SPKOUT_VU_WIDTH 1 /* SPKOUT_VU */ | ||
361 | #define WM9090_SPKOUTL_ZC 0x0080 /* SPKOUTL_ZC */ | ||
362 | #define WM9090_SPKOUTL_ZC_MASK 0x0080 /* SPKOUTL_ZC */ | ||
363 | #define WM9090_SPKOUTL_ZC_SHIFT 7 /* SPKOUTL_ZC */ | ||
364 | #define WM9090_SPKOUTL_ZC_WIDTH 1 /* SPKOUTL_ZC */ | ||
365 | #define WM9090_SPKOUTL_MUTE 0x0040 /* SPKOUTL_MUTE */ | ||
366 | #define WM9090_SPKOUTL_MUTE_MASK 0x0040 /* SPKOUTL_MUTE */ | ||
367 | #define WM9090_SPKOUTL_MUTE_SHIFT 6 /* SPKOUTL_MUTE */ | ||
368 | #define WM9090_SPKOUTL_MUTE_WIDTH 1 /* SPKOUTL_MUTE */ | ||
369 | #define WM9090_SPKOUTL_VOL_MASK 0x003F /* SPKOUTL_VOL - [5:0] */ | ||
370 | #define WM9090_SPKOUTL_VOL_SHIFT 0 /* SPKOUTL_VOL - [5:0] */ | ||
371 | #define WM9090_SPKOUTL_VOL_WIDTH 6 /* SPKOUTL_VOL - [5:0] */ | ||
372 | |||
373 | /* | ||
374 | * R45 (0x2D) - Output Mixer1 | ||
375 | */ | ||
376 | #define WM9090_IN1A_TO_MIXOUTL 0x0040 /* IN1A_TO_MIXOUTL */ | ||
377 | #define WM9090_IN1A_TO_MIXOUTL_MASK 0x0040 /* IN1A_TO_MIXOUTL */ | ||
378 | #define WM9090_IN1A_TO_MIXOUTL_SHIFT 6 /* IN1A_TO_MIXOUTL */ | ||
379 | #define WM9090_IN1A_TO_MIXOUTL_WIDTH 1 /* IN1A_TO_MIXOUTL */ | ||
380 | #define WM9090_IN2A_TO_MIXOUTL 0x0004 /* IN2A_TO_MIXOUTL */ | ||
381 | #define WM9090_IN2A_TO_MIXOUTL_MASK 0x0004 /* IN2A_TO_MIXOUTL */ | ||
382 | #define WM9090_IN2A_TO_MIXOUTL_SHIFT 2 /* IN2A_TO_MIXOUTL */ | ||
383 | #define WM9090_IN2A_TO_MIXOUTL_WIDTH 1 /* IN2A_TO_MIXOUTL */ | ||
384 | |||
385 | /* | ||
386 | * R46 (0x2E) - Output Mixer2 | ||
387 | */ | ||
388 | #define WM9090_IN1A_TO_MIXOUTR 0x0040 /* IN1A_TO_MIXOUTR */ | ||
389 | #define WM9090_IN1A_TO_MIXOUTR_MASK 0x0040 /* IN1A_TO_MIXOUTR */ | ||
390 | #define WM9090_IN1A_TO_MIXOUTR_SHIFT 6 /* IN1A_TO_MIXOUTR */ | ||
391 | #define WM9090_IN1A_TO_MIXOUTR_WIDTH 1 /* IN1A_TO_MIXOUTR */ | ||
392 | #define WM9090_IN1B_TO_MIXOUTR 0x0010 /* IN1B_TO_MIXOUTR */ | ||
393 | #define WM9090_IN1B_TO_MIXOUTR_MASK 0x0010 /* IN1B_TO_MIXOUTR */ | ||
394 | #define WM9090_IN1B_TO_MIXOUTR_SHIFT 4 /* IN1B_TO_MIXOUTR */ | ||
395 | #define WM9090_IN1B_TO_MIXOUTR_WIDTH 1 /* IN1B_TO_MIXOUTR */ | ||
396 | #define WM9090_IN2A_TO_MIXOUTR 0x0004 /* IN2A_TO_MIXOUTR */ | ||
397 | #define WM9090_IN2A_TO_MIXOUTR_MASK 0x0004 /* IN2A_TO_MIXOUTR */ | ||
398 | #define WM9090_IN2A_TO_MIXOUTR_SHIFT 2 /* IN2A_TO_MIXOUTR */ | ||
399 | #define WM9090_IN2A_TO_MIXOUTR_WIDTH 1 /* IN2A_TO_MIXOUTR */ | ||
400 | #define WM9090_IN2B_TO_MIXOUTR 0x0001 /* IN2B_TO_MIXOUTR */ | ||
401 | #define WM9090_IN2B_TO_MIXOUTR_MASK 0x0001 /* IN2B_TO_MIXOUTR */ | ||
402 | #define WM9090_IN2B_TO_MIXOUTR_SHIFT 0 /* IN2B_TO_MIXOUTR */ | ||
403 | #define WM9090_IN2B_TO_MIXOUTR_WIDTH 1 /* IN2B_TO_MIXOUTR */ | ||
404 | |||
405 | /* | ||
406 | * R47 (0x2F) - Output Mixer3 | ||
407 | */ | ||
408 | #define WM9090_MIXOUTL_MUTE 0x0100 /* MIXOUTL_MUTE */ | ||
409 | #define WM9090_MIXOUTL_MUTE_MASK 0x0100 /* MIXOUTL_MUTE */ | ||
410 | #define WM9090_MIXOUTL_MUTE_SHIFT 8 /* MIXOUTL_MUTE */ | ||
411 | #define WM9090_MIXOUTL_MUTE_WIDTH 1 /* MIXOUTL_MUTE */ | ||
412 | #define WM9090_IN1A_MIXOUTL_VOL_MASK 0x00C0 /* IN1A_MIXOUTL_VOL - [7:6] */ | ||
413 | #define WM9090_IN1A_MIXOUTL_VOL_SHIFT 6 /* IN1A_MIXOUTL_VOL - [7:6] */ | ||
414 | #define WM9090_IN1A_MIXOUTL_VOL_WIDTH 2 /* IN1A_MIXOUTL_VOL - [7:6] */ | ||
415 | #define WM9090_IN2A_MIXOUTL_VOL_MASK 0x000C /* IN2A_MIXOUTL_VOL - [3:2] */ | ||
416 | #define WM9090_IN2A_MIXOUTL_VOL_SHIFT 2 /* IN2A_MIXOUTL_VOL - [3:2] */ | ||
417 | #define WM9090_IN2A_MIXOUTL_VOL_WIDTH 2 /* IN2A_MIXOUTL_VOL - [3:2] */ | ||
418 | |||
419 | /* | ||
420 | * R48 (0x30) - Output Mixer4 | ||
421 | */ | ||
422 | #define WM9090_MIXOUTR_MUTE 0x0100 /* MIXOUTR_MUTE */ | ||
423 | #define WM9090_MIXOUTR_MUTE_MASK 0x0100 /* MIXOUTR_MUTE */ | ||
424 | #define WM9090_MIXOUTR_MUTE_SHIFT 8 /* MIXOUTR_MUTE */ | ||
425 | #define WM9090_MIXOUTR_MUTE_WIDTH 1 /* MIXOUTR_MUTE */ | ||
426 | #define WM9090_IN1A_MIXOUTR_VOL_MASK 0x00C0 /* IN1A_MIXOUTR_VOL - [7:6] */ | ||
427 | #define WM9090_IN1A_MIXOUTR_VOL_SHIFT 6 /* IN1A_MIXOUTR_VOL - [7:6] */ | ||
428 | #define WM9090_IN1A_MIXOUTR_VOL_WIDTH 2 /* IN1A_MIXOUTR_VOL - [7:6] */ | ||
429 | #define WM9090_IN1B_MIXOUTR_VOL_MASK 0x0030 /* IN1B_MIXOUTR_VOL - [5:4] */ | ||
430 | #define WM9090_IN1B_MIXOUTR_VOL_SHIFT 4 /* IN1B_MIXOUTR_VOL - [5:4] */ | ||
431 | #define WM9090_IN1B_MIXOUTR_VOL_WIDTH 2 /* IN1B_MIXOUTR_VOL - [5:4] */ | ||
432 | #define WM9090_IN2A_MIXOUTR_VOL_MASK 0x000C /* IN2A_MIXOUTR_VOL - [3:2] */ | ||
433 | #define WM9090_IN2A_MIXOUTR_VOL_SHIFT 2 /* IN2A_MIXOUTR_VOL - [3:2] */ | ||
434 | #define WM9090_IN2A_MIXOUTR_VOL_WIDTH 2 /* IN2A_MIXOUTR_VOL - [3:2] */ | ||
435 | #define WM9090_IN2B_MIXOUTR_VOL_MASK 0x0003 /* IN2B_MIXOUTR_VOL - [1:0] */ | ||
436 | #define WM9090_IN2B_MIXOUTR_VOL_SHIFT 0 /* IN2B_MIXOUTR_VOL - [1:0] */ | ||
437 | #define WM9090_IN2B_MIXOUTR_VOL_WIDTH 2 /* IN2B_MIXOUTR_VOL - [1:0] */ | ||
438 | |||
439 | /* | ||
440 | * R54 (0x36) - Speaker Mixer | ||
441 | */ | ||
442 | #define WM9090_IN1A_TO_SPKMIX 0x0040 /* IN1A_TO_SPKMIX */ | ||
443 | #define WM9090_IN1A_TO_SPKMIX_MASK 0x0040 /* IN1A_TO_SPKMIX */ | ||
444 | #define WM9090_IN1A_TO_SPKMIX_SHIFT 6 /* IN1A_TO_SPKMIX */ | ||
445 | #define WM9090_IN1A_TO_SPKMIX_WIDTH 1 /* IN1A_TO_SPKMIX */ | ||
446 | #define WM9090_IN1B_TO_SPKMIX 0x0010 /* IN1B_TO_SPKMIX */ | ||
447 | #define WM9090_IN1B_TO_SPKMIX_MASK 0x0010 /* IN1B_TO_SPKMIX */ | ||
448 | #define WM9090_IN1B_TO_SPKMIX_SHIFT 4 /* IN1B_TO_SPKMIX */ | ||
449 | #define WM9090_IN1B_TO_SPKMIX_WIDTH 1 /* IN1B_TO_SPKMIX */ | ||
450 | #define WM9090_IN2A_TO_SPKMIX 0x0004 /* IN2A_TO_SPKMIX */ | ||
451 | #define WM9090_IN2A_TO_SPKMIX_MASK 0x0004 /* IN2A_TO_SPKMIX */ | ||
452 | #define WM9090_IN2A_TO_SPKMIX_SHIFT 2 /* IN2A_TO_SPKMIX */ | ||
453 | #define WM9090_IN2A_TO_SPKMIX_WIDTH 1 /* IN2A_TO_SPKMIX */ | ||
454 | #define WM9090_IN2B_TO_SPKMIX 0x0001 /* IN2B_TO_SPKMIX */ | ||
455 | #define WM9090_IN2B_TO_SPKMIX_MASK 0x0001 /* IN2B_TO_SPKMIX */ | ||
456 | #define WM9090_IN2B_TO_SPKMIX_SHIFT 0 /* IN2B_TO_SPKMIX */ | ||
457 | #define WM9090_IN2B_TO_SPKMIX_WIDTH 1 /* IN2B_TO_SPKMIX */ | ||
458 | |||
459 | /* | ||
460 | * R57 (0x39) - AntiPOP2 | ||
461 | */ | ||
462 | #define WM9090_VMID_BUF_ENA 0x0008 /* VMID_BUF_ENA */ | ||
463 | #define WM9090_VMID_BUF_ENA_MASK 0x0008 /* VMID_BUF_ENA */ | ||
464 | #define WM9090_VMID_BUF_ENA_SHIFT 3 /* VMID_BUF_ENA */ | ||
465 | #define WM9090_VMID_BUF_ENA_WIDTH 1 /* VMID_BUF_ENA */ | ||
466 | #define WM9090_VMID_ENA 0x0001 /* VMID_ENA */ | ||
467 | #define WM9090_VMID_ENA_MASK 0x0001 /* VMID_ENA */ | ||
468 | #define WM9090_VMID_ENA_SHIFT 0 /* VMID_ENA */ | ||
469 | #define WM9090_VMID_ENA_WIDTH 1 /* VMID_ENA */ | ||
470 | |||
471 | /* | ||
472 | * R70 (0x46) - Write Sequencer 0 | ||
473 | */ | ||
474 | #define WM9090_WSEQ_ENA 0x0100 /* WSEQ_ENA */ | ||
475 | #define WM9090_WSEQ_ENA_MASK 0x0100 /* WSEQ_ENA */ | ||
476 | #define WM9090_WSEQ_ENA_SHIFT 8 /* WSEQ_ENA */ | ||
477 | #define WM9090_WSEQ_ENA_WIDTH 1 /* WSEQ_ENA */ | ||
478 | #define WM9090_WSEQ_WRITE_INDEX_MASK 0x000F /* WSEQ_WRITE_INDEX - [3:0] */ | ||
479 | #define WM9090_WSEQ_WRITE_INDEX_SHIFT 0 /* WSEQ_WRITE_INDEX - [3:0] */ | ||
480 | #define WM9090_WSEQ_WRITE_INDEX_WIDTH 4 /* WSEQ_WRITE_INDEX - [3:0] */ | ||
481 | |||
482 | /* | ||
483 | * R71 (0x47) - Write Sequencer 1 | ||
484 | */ | ||
485 | #define WM9090_WSEQ_DATA_WIDTH_MASK 0x7000 /* WSEQ_DATA_WIDTH - [14:12] */ | ||
486 | #define WM9090_WSEQ_DATA_WIDTH_SHIFT 12 /* WSEQ_DATA_WIDTH - [14:12] */ | ||
487 | #define WM9090_WSEQ_DATA_WIDTH_WIDTH 3 /* WSEQ_DATA_WIDTH - [14:12] */ | ||
488 | #define WM9090_WSEQ_DATA_START_MASK 0x0F00 /* WSEQ_DATA_START - [11:8] */ | ||
489 | #define WM9090_WSEQ_DATA_START_SHIFT 8 /* WSEQ_DATA_START - [11:8] */ | ||
490 | #define WM9090_WSEQ_DATA_START_WIDTH 4 /* WSEQ_DATA_START - [11:8] */ | ||
491 | #define WM9090_WSEQ_ADDR_MASK 0x00FF /* WSEQ_ADDR - [7:0] */ | ||
492 | #define WM9090_WSEQ_ADDR_SHIFT 0 /* WSEQ_ADDR - [7:0] */ | ||
493 | #define WM9090_WSEQ_ADDR_WIDTH 8 /* WSEQ_ADDR - [7:0] */ | ||
494 | |||
495 | /* | ||
496 | * R72 (0x48) - Write Sequencer 2 | ||
497 | */ | ||
498 | #define WM9090_WSEQ_EOS 0x4000 /* WSEQ_EOS */ | ||
499 | #define WM9090_WSEQ_EOS_MASK 0x4000 /* WSEQ_EOS */ | ||
500 | #define WM9090_WSEQ_EOS_SHIFT 14 /* WSEQ_EOS */ | ||
501 | #define WM9090_WSEQ_EOS_WIDTH 1 /* WSEQ_EOS */ | ||
502 | #define WM9090_WSEQ_DELAY_MASK 0x0F00 /* WSEQ_DELAY - [11:8] */ | ||
503 | #define WM9090_WSEQ_DELAY_SHIFT 8 /* WSEQ_DELAY - [11:8] */ | ||
504 | #define WM9090_WSEQ_DELAY_WIDTH 4 /* WSEQ_DELAY - [11:8] */ | ||
505 | #define WM9090_WSEQ_DATA_MASK 0x00FF /* WSEQ_DATA - [7:0] */ | ||
506 | #define WM9090_WSEQ_DATA_SHIFT 0 /* WSEQ_DATA - [7:0] */ | ||
507 | #define WM9090_WSEQ_DATA_WIDTH 8 /* WSEQ_DATA - [7:0] */ | ||
508 | |||
509 | /* | ||
510 | * R73 (0x49) - Write Sequencer 3 | ||
511 | */ | ||
512 | #define WM9090_WSEQ_ABORT 0x0200 /* WSEQ_ABORT */ | ||
513 | #define WM9090_WSEQ_ABORT_MASK 0x0200 /* WSEQ_ABORT */ | ||
514 | #define WM9090_WSEQ_ABORT_SHIFT 9 /* WSEQ_ABORT */ | ||
515 | #define WM9090_WSEQ_ABORT_WIDTH 1 /* WSEQ_ABORT */ | ||
516 | #define WM9090_WSEQ_START 0x0100 /* WSEQ_START */ | ||
517 | #define WM9090_WSEQ_START_MASK 0x0100 /* WSEQ_START */ | ||
518 | #define WM9090_WSEQ_START_SHIFT 8 /* WSEQ_START */ | ||
519 | #define WM9090_WSEQ_START_WIDTH 1 /* WSEQ_START */ | ||
520 | #define WM9090_WSEQ_START_INDEX_MASK 0x003F /* WSEQ_START_INDEX - [5:0] */ | ||
521 | #define WM9090_WSEQ_START_INDEX_SHIFT 0 /* WSEQ_START_INDEX - [5:0] */ | ||
522 | #define WM9090_WSEQ_START_INDEX_WIDTH 6 /* WSEQ_START_INDEX - [5:0] */ | ||
523 | |||
524 | /* | ||
525 | * R74 (0x4A) - Write Sequencer 4 | ||
526 | */ | ||
527 | #define WM9090_WSEQ_BUSY 0x0001 /* WSEQ_BUSY */ | ||
528 | #define WM9090_WSEQ_BUSY_MASK 0x0001 /* WSEQ_BUSY */ | ||
529 | #define WM9090_WSEQ_BUSY_SHIFT 0 /* WSEQ_BUSY */ | ||
530 | #define WM9090_WSEQ_BUSY_WIDTH 1 /* WSEQ_BUSY */ | ||
531 | |||
532 | /* | ||
533 | * R75 (0x4B) - Write Sequencer 5 | ||
534 | */ | ||
535 | #define WM9090_WSEQ_CURRENT_INDEX_MASK 0x003F /* WSEQ_CURRENT_INDEX - [5:0] */ | ||
536 | #define WM9090_WSEQ_CURRENT_INDEX_SHIFT 0 /* WSEQ_CURRENT_INDEX - [5:0] */ | ||
537 | #define WM9090_WSEQ_CURRENT_INDEX_WIDTH 6 /* WSEQ_CURRENT_INDEX - [5:0] */ | ||
538 | |||
539 | /* | ||
540 | * R76 (0x4C) - Charge Pump 1 | ||
541 | */ | ||
542 | #define WM9090_CP_ENA 0x8000 /* CP_ENA */ | ||
543 | #define WM9090_CP_ENA_MASK 0x8000 /* CP_ENA */ | ||
544 | #define WM9090_CP_ENA_SHIFT 15 /* CP_ENA */ | ||
545 | #define WM9090_CP_ENA_WIDTH 1 /* CP_ENA */ | ||
546 | |||
547 | /* | ||
548 | * R84 (0x54) - DC Servo 0 | ||
549 | */ | ||
550 | #define WM9090_DCS_TRIG_SINGLE_1 0x2000 /* DCS_TRIG_SINGLE_1 */ | ||
551 | #define WM9090_DCS_TRIG_SINGLE_1_MASK 0x2000 /* DCS_TRIG_SINGLE_1 */ | ||
552 | #define WM9090_DCS_TRIG_SINGLE_1_SHIFT 13 /* DCS_TRIG_SINGLE_1 */ | ||
553 | #define WM9090_DCS_TRIG_SINGLE_1_WIDTH 1 /* DCS_TRIG_SINGLE_1 */ | ||
554 | #define WM9090_DCS_TRIG_SINGLE_0 0x1000 /* DCS_TRIG_SINGLE_0 */ | ||
555 | #define WM9090_DCS_TRIG_SINGLE_0_MASK 0x1000 /* DCS_TRIG_SINGLE_0 */ | ||
556 | #define WM9090_DCS_TRIG_SINGLE_0_SHIFT 12 /* DCS_TRIG_SINGLE_0 */ | ||
557 | #define WM9090_DCS_TRIG_SINGLE_0_WIDTH 1 /* DCS_TRIG_SINGLE_0 */ | ||
558 | #define WM9090_DCS_TRIG_SERIES_1 0x0200 /* DCS_TRIG_SERIES_1 */ | ||
559 | #define WM9090_DCS_TRIG_SERIES_1_MASK 0x0200 /* DCS_TRIG_SERIES_1 */ | ||
560 | #define WM9090_DCS_TRIG_SERIES_1_SHIFT 9 /* DCS_TRIG_SERIES_1 */ | ||
561 | #define WM9090_DCS_TRIG_SERIES_1_WIDTH 1 /* DCS_TRIG_SERIES_1 */ | ||
562 | #define WM9090_DCS_TRIG_SERIES_0 0x0100 /* DCS_TRIG_SERIES_0 */ | ||
563 | #define WM9090_DCS_TRIG_SERIES_0_MASK 0x0100 /* DCS_TRIG_SERIES_0 */ | ||
564 | #define WM9090_DCS_TRIG_SERIES_0_SHIFT 8 /* DCS_TRIG_SERIES_0 */ | ||
565 | #define WM9090_DCS_TRIG_SERIES_0_WIDTH 1 /* DCS_TRIG_SERIES_0 */ | ||
566 | #define WM9090_DCS_TRIG_STARTUP_1 0x0020 /* DCS_TRIG_STARTUP_1 */ | ||
567 | #define WM9090_DCS_TRIG_STARTUP_1_MASK 0x0020 /* DCS_TRIG_STARTUP_1 */ | ||
568 | #define WM9090_DCS_TRIG_STARTUP_1_SHIFT 5 /* DCS_TRIG_STARTUP_1 */ | ||
569 | #define WM9090_DCS_TRIG_STARTUP_1_WIDTH 1 /* DCS_TRIG_STARTUP_1 */ | ||
570 | #define WM9090_DCS_TRIG_STARTUP_0 0x0010 /* DCS_TRIG_STARTUP_0 */ | ||
571 | #define WM9090_DCS_TRIG_STARTUP_0_MASK 0x0010 /* DCS_TRIG_STARTUP_0 */ | ||
572 | #define WM9090_DCS_TRIG_STARTUP_0_SHIFT 4 /* DCS_TRIG_STARTUP_0 */ | ||
573 | #define WM9090_DCS_TRIG_STARTUP_0_WIDTH 1 /* DCS_TRIG_STARTUP_0 */ | ||
574 | #define WM9090_DCS_TRIG_DAC_WR_1 0x0008 /* DCS_TRIG_DAC_WR_1 */ | ||
575 | #define WM9090_DCS_TRIG_DAC_WR_1_MASK 0x0008 /* DCS_TRIG_DAC_WR_1 */ | ||
576 | #define WM9090_DCS_TRIG_DAC_WR_1_SHIFT 3 /* DCS_TRIG_DAC_WR_1 */ | ||
577 | #define WM9090_DCS_TRIG_DAC_WR_1_WIDTH 1 /* DCS_TRIG_DAC_WR_1 */ | ||
578 | #define WM9090_DCS_TRIG_DAC_WR_0 0x0004 /* DCS_TRIG_DAC_WR_0 */ | ||
579 | #define WM9090_DCS_TRIG_DAC_WR_0_MASK 0x0004 /* DCS_TRIG_DAC_WR_0 */ | ||
580 | #define WM9090_DCS_TRIG_DAC_WR_0_SHIFT 2 /* DCS_TRIG_DAC_WR_0 */ | ||
581 | #define WM9090_DCS_TRIG_DAC_WR_0_WIDTH 1 /* DCS_TRIG_DAC_WR_0 */ | ||
582 | #define WM9090_DCS_ENA_CHAN_1 0x0002 /* DCS_ENA_CHAN_1 */ | ||
583 | #define WM9090_DCS_ENA_CHAN_1_MASK 0x0002 /* DCS_ENA_CHAN_1 */ | ||
584 | #define WM9090_DCS_ENA_CHAN_1_SHIFT 1 /* DCS_ENA_CHAN_1 */ | ||
585 | #define WM9090_DCS_ENA_CHAN_1_WIDTH 1 /* DCS_ENA_CHAN_1 */ | ||
586 | #define WM9090_DCS_ENA_CHAN_0 0x0001 /* DCS_ENA_CHAN_0 */ | ||
587 | #define WM9090_DCS_ENA_CHAN_0_MASK 0x0001 /* DCS_ENA_CHAN_0 */ | ||
588 | #define WM9090_DCS_ENA_CHAN_0_SHIFT 0 /* DCS_ENA_CHAN_0 */ | ||
589 | #define WM9090_DCS_ENA_CHAN_0_WIDTH 1 /* DCS_ENA_CHAN_0 */ | ||
590 | |||
591 | /* | ||
592 | * R85 (0x55) - DC Servo 1 | ||
593 | */ | ||
594 | #define WM9090_DCS_SERIES_NO_01_MASK 0x0FE0 /* DCS_SERIES_NO_01 - [11:5] */ | ||
595 | #define WM9090_DCS_SERIES_NO_01_SHIFT 5 /* DCS_SERIES_NO_01 - [11:5] */ | ||
596 | #define WM9090_DCS_SERIES_NO_01_WIDTH 7 /* DCS_SERIES_NO_01 - [11:5] */ | ||
597 | #define WM9090_DCS_TIMER_PERIOD_01_MASK 0x000F /* DCS_TIMER_PERIOD_01 - [3:0] */ | ||
598 | #define WM9090_DCS_TIMER_PERIOD_01_SHIFT 0 /* DCS_TIMER_PERIOD_01 - [3:0] */ | ||
599 | #define WM9090_DCS_TIMER_PERIOD_01_WIDTH 4 /* DCS_TIMER_PERIOD_01 - [3:0] */ | ||
600 | |||
601 | /* | ||
602 | * R87 (0x57) - DC Servo 3 | ||
603 | */ | ||
604 | #define WM9090_DCS_DAC_WR_VAL_1_MASK 0xFF00 /* DCS_DAC_WR_VAL_1 - [15:8] */ | ||
605 | #define WM9090_DCS_DAC_WR_VAL_1_SHIFT 8 /* DCS_DAC_WR_VAL_1 - [15:8] */ | ||
606 | #define WM9090_DCS_DAC_WR_VAL_1_WIDTH 8 /* DCS_DAC_WR_VAL_1 - [15:8] */ | ||
607 | #define WM9090_DCS_DAC_WR_VAL_0_MASK 0x00FF /* DCS_DAC_WR_VAL_0 - [7:0] */ | ||
608 | #define WM9090_DCS_DAC_WR_VAL_0_SHIFT 0 /* DCS_DAC_WR_VAL_0 - [7:0] */ | ||
609 | #define WM9090_DCS_DAC_WR_VAL_0_WIDTH 8 /* DCS_DAC_WR_VAL_0 - [7:0] */ | ||
610 | |||
611 | /* | ||
612 | * R88 (0x58) - DC Servo Readback 0 | ||
613 | */ | ||
614 | #define WM9090_DCS_CAL_COMPLETE_MASK 0x0300 /* DCS_CAL_COMPLETE - [9:8] */ | ||
615 | #define WM9090_DCS_CAL_COMPLETE_SHIFT 8 /* DCS_CAL_COMPLETE - [9:8] */ | ||
616 | #define WM9090_DCS_CAL_COMPLETE_WIDTH 2 /* DCS_CAL_COMPLETE - [9:8] */ | ||
617 | #define WM9090_DCS_DAC_WR_COMPLETE_MASK 0x0030 /* DCS_DAC_WR_COMPLETE - [5:4] */ | ||
618 | #define WM9090_DCS_DAC_WR_COMPLETE_SHIFT 4 /* DCS_DAC_WR_COMPLETE - [5:4] */ | ||
619 | #define WM9090_DCS_DAC_WR_COMPLETE_WIDTH 2 /* DCS_DAC_WR_COMPLETE - [5:4] */ | ||
620 | #define WM9090_DCS_STARTUP_COMPLETE_MASK 0x0003 /* DCS_STARTUP_COMPLETE - [1:0] */ | ||
621 | #define WM9090_DCS_STARTUP_COMPLETE_SHIFT 0 /* DCS_STARTUP_COMPLETE - [1:0] */ | ||
622 | #define WM9090_DCS_STARTUP_COMPLETE_WIDTH 2 /* DCS_STARTUP_COMPLETE - [1:0] */ | ||
623 | |||
624 | /* | ||
625 | * R89 (0x59) - DC Servo Readback 1 | ||
626 | */ | ||
627 | #define WM9090_DCS_DAC_WR_VAL_1_RD_MASK 0x00FF /* DCS_DAC_WR_VAL_1_RD - [7:0] */ | ||
628 | #define WM9090_DCS_DAC_WR_VAL_1_RD_SHIFT 0 /* DCS_DAC_WR_VAL_1_RD - [7:0] */ | ||
629 | #define WM9090_DCS_DAC_WR_VAL_1_RD_WIDTH 8 /* DCS_DAC_WR_VAL_1_RD - [7:0] */ | ||
630 | |||
631 | /* | ||
632 | * R90 (0x5A) - DC Servo Readback 2 | ||
633 | */ | ||
634 | #define WM9090_DCS_DAC_WR_VAL_0_RD_MASK 0x00FF /* DCS_DAC_WR_VAL_0_RD - [7:0] */ | ||
635 | #define WM9090_DCS_DAC_WR_VAL_0_RD_SHIFT 0 /* DCS_DAC_WR_VAL_0_RD - [7:0] */ | ||
636 | #define WM9090_DCS_DAC_WR_VAL_0_RD_WIDTH 8 /* DCS_DAC_WR_VAL_0_RD - [7:0] */ | ||
637 | |||
638 | /* | ||
639 | * R96 (0x60) - Analogue HP 0 | ||
640 | */ | ||
641 | #define WM9090_HPOUT1L_RMV_SHORT 0x0080 /* HPOUT1L_RMV_SHORT */ | ||
642 | #define WM9090_HPOUT1L_RMV_SHORT_MASK 0x0080 /* HPOUT1L_RMV_SHORT */ | ||
643 | #define WM9090_HPOUT1L_RMV_SHORT_SHIFT 7 /* HPOUT1L_RMV_SHORT */ | ||
644 | #define WM9090_HPOUT1L_RMV_SHORT_WIDTH 1 /* HPOUT1L_RMV_SHORT */ | ||
645 | #define WM9090_HPOUT1L_OUTP 0x0040 /* HPOUT1L_OUTP */ | ||
646 | #define WM9090_HPOUT1L_OUTP_MASK 0x0040 /* HPOUT1L_OUTP */ | ||
647 | #define WM9090_HPOUT1L_OUTP_SHIFT 6 /* HPOUT1L_OUTP */ | ||
648 | #define WM9090_HPOUT1L_OUTP_WIDTH 1 /* HPOUT1L_OUTP */ | ||
649 | #define WM9090_HPOUT1L_DLY 0x0020 /* HPOUT1L_DLY */ | ||
650 | #define WM9090_HPOUT1L_DLY_MASK 0x0020 /* HPOUT1L_DLY */ | ||
651 | #define WM9090_HPOUT1L_DLY_SHIFT 5 /* HPOUT1L_DLY */ | ||
652 | #define WM9090_HPOUT1L_DLY_WIDTH 1 /* HPOUT1L_DLY */ | ||
653 | #define WM9090_HPOUT1R_RMV_SHORT 0x0008 /* HPOUT1R_RMV_SHORT */ | ||
654 | #define WM9090_HPOUT1R_RMV_SHORT_MASK 0x0008 /* HPOUT1R_RMV_SHORT */ | ||
655 | #define WM9090_HPOUT1R_RMV_SHORT_SHIFT 3 /* HPOUT1R_RMV_SHORT */ | ||
656 | #define WM9090_HPOUT1R_RMV_SHORT_WIDTH 1 /* HPOUT1R_RMV_SHORT */ | ||
657 | #define WM9090_HPOUT1R_OUTP 0x0004 /* HPOUT1R_OUTP */ | ||
658 | #define WM9090_HPOUT1R_OUTP_MASK 0x0004 /* HPOUT1R_OUTP */ | ||
659 | #define WM9090_HPOUT1R_OUTP_SHIFT 2 /* HPOUT1R_OUTP */ | ||
660 | #define WM9090_HPOUT1R_OUTP_WIDTH 1 /* HPOUT1R_OUTP */ | ||
661 | #define WM9090_HPOUT1R_DLY 0x0002 /* HPOUT1R_DLY */ | ||
662 | #define WM9090_HPOUT1R_DLY_MASK 0x0002 /* HPOUT1R_DLY */ | ||
663 | #define WM9090_HPOUT1R_DLY_SHIFT 1 /* HPOUT1R_DLY */ | ||
664 | #define WM9090_HPOUT1R_DLY_WIDTH 1 /* HPOUT1R_DLY */ | ||
665 | |||
666 | /* | ||
667 | * R98 (0x62) - AGC Control 0 | ||
668 | */ | ||
669 | #define WM9090_AGC_CLIP_ENA 0x8000 /* AGC_CLIP_ENA */ | ||
670 | #define WM9090_AGC_CLIP_ENA_MASK 0x8000 /* AGC_CLIP_ENA */ | ||
671 | #define WM9090_AGC_CLIP_ENA_SHIFT 15 /* AGC_CLIP_ENA */ | ||
672 | #define WM9090_AGC_CLIP_ENA_WIDTH 1 /* AGC_CLIP_ENA */ | ||
673 | #define WM9090_AGC_CLIP_THR_MASK 0x0F00 /* AGC_CLIP_THR - [11:8] */ | ||
674 | #define WM9090_AGC_CLIP_THR_SHIFT 8 /* AGC_CLIP_THR - [11:8] */ | ||
675 | #define WM9090_AGC_CLIP_THR_WIDTH 4 /* AGC_CLIP_THR - [11:8] */ | ||
676 | #define WM9090_AGC_CLIP_ATK_MASK 0x0070 /* AGC_CLIP_ATK - [6:4] */ | ||
677 | #define WM9090_AGC_CLIP_ATK_SHIFT 4 /* AGC_CLIP_ATK - [6:4] */ | ||
678 | #define WM9090_AGC_CLIP_ATK_WIDTH 3 /* AGC_CLIP_ATK - [6:4] */ | ||
679 | #define WM9090_AGC_CLIP_DCY_MASK 0x0007 /* AGC_CLIP_DCY - [2:0] */ | ||
680 | #define WM9090_AGC_CLIP_DCY_SHIFT 0 /* AGC_CLIP_DCY - [2:0] */ | ||
681 | #define WM9090_AGC_CLIP_DCY_WIDTH 3 /* AGC_CLIP_DCY - [2:0] */ | ||
682 | |||
683 | /* | ||
684 | * R99 (0x63) - AGC Control 1 | ||
685 | */ | ||
686 | #define WM9090_AGC_PWR_ENA 0x8000 /* AGC_PWR_ENA */ | ||
687 | #define WM9090_AGC_PWR_ENA_MASK 0x8000 /* AGC_PWR_ENA */ | ||
688 | #define WM9090_AGC_PWR_ENA_SHIFT 15 /* AGC_PWR_ENA */ | ||
689 | #define WM9090_AGC_PWR_ENA_WIDTH 1 /* AGC_PWR_ENA */ | ||
690 | #define WM9090_AGC_PWR_AVG 0x1000 /* AGC_PWR_AVG */ | ||
691 | #define WM9090_AGC_PWR_AVG_MASK 0x1000 /* AGC_PWR_AVG */ | ||
692 | #define WM9090_AGC_PWR_AVG_SHIFT 12 /* AGC_PWR_AVG */ | ||
693 | #define WM9090_AGC_PWR_AVG_WIDTH 1 /* AGC_PWR_AVG */ | ||
694 | #define WM9090_AGC_PWR_THR_MASK 0x0F00 /* AGC_PWR_THR - [11:8] */ | ||
695 | #define WM9090_AGC_PWR_THR_SHIFT 8 /* AGC_PWR_THR - [11:8] */ | ||
696 | #define WM9090_AGC_PWR_THR_WIDTH 4 /* AGC_PWR_THR - [11:8] */ | ||
697 | #define WM9090_AGC_PWR_ATK_MASK 0x0070 /* AGC_PWR_ATK - [6:4] */ | ||
698 | #define WM9090_AGC_PWR_ATK_SHIFT 4 /* AGC_PWR_ATK - [6:4] */ | ||
699 | #define WM9090_AGC_PWR_ATK_WIDTH 3 /* AGC_PWR_ATK - [6:4] */ | ||
700 | #define WM9090_AGC_PWR_DCY_MASK 0x0007 /* AGC_PWR_DCY - [2:0] */ | ||
701 | #define WM9090_AGC_PWR_DCY_SHIFT 0 /* AGC_PWR_DCY - [2:0] */ | ||
702 | #define WM9090_AGC_PWR_DCY_WIDTH 3 /* AGC_PWR_DCY - [2:0] */ | ||
703 | |||
704 | /* | ||
705 | * R100 (0x64) - AGC Control 2 | ||
706 | */ | ||
707 | #define WM9090_AGC_RAMP 0x0100 /* AGC_RAMP */ | ||
708 | #define WM9090_AGC_RAMP_MASK 0x0100 /* AGC_RAMP */ | ||
709 | #define WM9090_AGC_RAMP_SHIFT 8 /* AGC_RAMP */ | ||
710 | #define WM9090_AGC_RAMP_WIDTH 1 /* AGC_RAMP */ | ||
711 | #define WM9090_AGC_MINGAIN_MASK 0x003F /* AGC_MINGAIN - [5:0] */ | ||
712 | #define WM9090_AGC_MINGAIN_SHIFT 0 /* AGC_MINGAIN - [5:0] */ | ||
713 | #define WM9090_AGC_MINGAIN_WIDTH 6 /* AGC_MINGAIN - [5:0] */ | ||
714 | |||
715 | #endif | ||