diff options
author | Stephen M. Cameron <scameron@beardog.cce.hp.com> | 2014-05-29 11:52:52 -0400 |
---|---|---|
committer | Christoph Hellwig <hch@lst.de> | 2014-06-02 03:54:53 -0400 |
commit | 35d697c451678c3bf3f8a24f8e2b3918d1731bc5 (patch) | |
tree | 1be105623fdf25cca2ab3a970bf7a522ceaaf31f | |
parent | 00701a96f81f4e1b7279f5e05fe02274bbe29e59 (diff) |
hpsa: use gcc aligned attribute instead of manually padding structs
Signed-off-by: Stephen M. Cameron <scameron@beardog.cce.hp.com>
Reviewed-by: Webb Scales <webb.scales@hp.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
-rw-r--r-- | drivers/scsi/hpsa.c | 3 | ||||
-rw-r--r-- | drivers/scsi/hpsa_cmd.h | 33 |
2 files changed, 6 insertions, 30 deletions
diff --git a/drivers/scsi/hpsa.c b/drivers/scsi/hpsa.c index e97a7c294548..a02d26a395e3 100644 --- a/drivers/scsi/hpsa.c +++ b/drivers/scsi/hpsa.c | |||
@@ -6932,7 +6932,6 @@ reinit_after_soft_reset: | |||
6932 | * the 5 lower bits of the address are used by the hardware. and by | 6932 | * the 5 lower bits of the address are used by the hardware. and by |
6933 | * the driver. See comments in hpsa.h for more info. | 6933 | * the driver. See comments in hpsa.h for more info. |
6934 | */ | 6934 | */ |
6935 | #define COMMANDLIST_ALIGNMENT 128 | ||
6936 | BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); | 6935 | BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); |
6937 | h = kzalloc(sizeof(*h), GFP_KERNEL); | 6936 | h = kzalloc(sizeof(*h), GFP_KERNEL); |
6938 | if (!h) | 6937 | if (!h) |
@@ -7405,7 +7404,6 @@ static int hpsa_alloc_ioaccel_cmd_and_bft(struct ctlr_info *h) | |||
7405 | * because the 7 lower bits of the address are used by the | 7404 | * because the 7 lower bits of the address are used by the |
7406 | * hardware. | 7405 | * hardware. |
7407 | */ | 7406 | */ |
7408 | #define IOACCEL1_COMMANDLIST_ALIGNMENT 128 | ||
7409 | BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % | 7407 | BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % |
7410 | IOACCEL1_COMMANDLIST_ALIGNMENT); | 7408 | IOACCEL1_COMMANDLIST_ALIGNMENT); |
7411 | h->ioaccel_cmd_pool = | 7409 | h->ioaccel_cmd_pool = |
@@ -7443,7 +7441,6 @@ static int ioaccel2_alloc_cmds_and_bft(struct ctlr_info *h) | |||
7443 | if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) | 7441 | if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) |
7444 | h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; | 7442 | h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; |
7445 | 7443 | ||
7446 | #define IOACCEL2_COMMANDLIST_ALIGNMENT 128 | ||
7447 | BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % | 7444 | BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % |
7448 | IOACCEL2_COMMANDLIST_ALIGNMENT); | 7445 | IOACCEL2_COMMANDLIST_ALIGNMENT); |
7449 | h->ioaccel2_cmd_pool = | 7446 | h->ioaccel2_cmd_pool = |
diff --git a/drivers/scsi/hpsa_cmd.h b/drivers/scsi/hpsa_cmd.h index b5cc7052339f..db89245e0776 100644 --- a/drivers/scsi/hpsa_cmd.h +++ b/drivers/scsi/hpsa_cmd.h | |||
@@ -375,6 +375,7 @@ struct ctlr_info; /* defined in hpsa.h */ | |||
375 | * or a bus address. | 375 | * or a bus address. |
376 | */ | 376 | */ |
377 | 377 | ||
378 | #define COMMANDLIST_ALIGNMENT 128 | ||
378 | struct CommandList { | 379 | struct CommandList { |
379 | struct CommandListHeader Header; | 380 | struct CommandListHeader Header; |
380 | struct RequestBlock Request; | 381 | struct RequestBlock Request; |
@@ -389,21 +390,7 @@ struct CommandList { | |||
389 | struct list_head list; | 390 | struct list_head list; |
390 | struct completion *waiting; | 391 | struct completion *waiting; |
391 | void *scsi_cmd; | 392 | void *scsi_cmd; |
392 | 393 | } __aligned(COMMANDLIST_ALIGNMENT); | |
393 | /* on 64 bit architectures, to get this to be 32-byte-aligned | ||
394 | * it so happens we need PAD_64 bytes of padding, on 32 bit systems, | ||
395 | * we need PAD_32 bytes of padding (see below). This does that. | ||
396 | * If it happens that 64 bit and 32 bit systems need different | ||
397 | * padding, PAD_32 and PAD_64 can be set independently, and. | ||
398 | * the code below will do the right thing. | ||
399 | */ | ||
400 | #define IS_32_BIT ((8 - sizeof(long))/4) | ||
401 | #define IS_64_BIT (!IS_32_BIT) | ||
402 | #define PAD_32 (40) | ||
403 | #define PAD_64 (12) | ||
404 | #define COMMANDLIST_PAD (IS_32_BIT * PAD_32 + IS_64_BIT * PAD_64) | ||
405 | u8 pad[COMMANDLIST_PAD]; | ||
406 | }; | ||
407 | 394 | ||
408 | /* Max S/G elements in I/O accelerator command */ | 395 | /* Max S/G elements in I/O accelerator command */ |
409 | #define IOACCEL1_MAXSGENTRIES 24 | 396 | #define IOACCEL1_MAXSGENTRIES 24 |
@@ -413,6 +400,7 @@ struct CommandList { | |||
413 | * Structure for I/O accelerator (mode 1) commands. | 400 | * Structure for I/O accelerator (mode 1) commands. |
414 | * Note that this structure must be 128-byte aligned in size. | 401 | * Note that this structure must be 128-byte aligned in size. |
415 | */ | 402 | */ |
403 | #define IOACCEL1_COMMANDLIST_ALIGNMENT 128 | ||
416 | struct io_accel1_cmd { | 404 | struct io_accel1_cmd { |
417 | u16 dev_handle; /* 0x00 - 0x01 */ | 405 | u16 dev_handle; /* 0x00 - 0x01 */ |
418 | u8 reserved1; /* 0x02 */ | 406 | u8 reserved1; /* 0x02 */ |
@@ -440,12 +428,7 @@ struct io_accel1_cmd { | |||
440 | struct vals32 host_addr; /* 0x70 - 0x77 */ | 428 | struct vals32 host_addr; /* 0x70 - 0x77 */ |
441 | u8 CISS_LUN[8]; /* 0x78 - 0x7F */ | 429 | u8 CISS_LUN[8]; /* 0x78 - 0x7F */ |
442 | struct SGDescriptor SG[IOACCEL1_MAXSGENTRIES]; | 430 | struct SGDescriptor SG[IOACCEL1_MAXSGENTRIES]; |
443 | #define IOACCEL1_PAD_64 0 | 431 | } __aligned(IOACCEL1_COMMANDLIST_ALIGNMENT); |
444 | #define IOACCEL1_PAD_32 0 | ||
445 | #define IOACCEL1_PAD (IS_32_BIT * IOACCEL1_PAD_32 + \ | ||
446 | IS_64_BIT * IOACCEL1_PAD_64) | ||
447 | u8 pad[IOACCEL1_PAD]; | ||
448 | }; | ||
449 | 432 | ||
450 | #define IOACCEL1_FUNCTION_SCSIIO 0x00 | 433 | #define IOACCEL1_FUNCTION_SCSIIO 0x00 |
451 | #define IOACCEL1_SGLOFFSET 32 | 434 | #define IOACCEL1_SGLOFFSET 32 |
@@ -510,14 +493,11 @@ struct io_accel2_scsi_response { | |||
510 | u8 sense_data_buff[32]; /* sense/response data buffer */ | 493 | u8 sense_data_buff[32]; /* sense/response data buffer */ |
511 | }; | 494 | }; |
512 | 495 | ||
513 | #define IOACCEL2_64_PAD 76 | ||
514 | #define IOACCEL2_32_PAD 76 | ||
515 | #define IOACCEL2_PAD (IS_32_BIT * IOACCEL2_32_PAD + \ | ||
516 | IS_64_BIT * IOACCEL2_64_PAD) | ||
517 | /* | 496 | /* |
518 | * Structure for I/O accelerator (mode 2 or m2) commands. | 497 | * Structure for I/O accelerator (mode 2 or m2) commands. |
519 | * Note that this structure must be 128-byte aligned in size. | 498 | * Note that this structure must be 128-byte aligned in size. |
520 | */ | 499 | */ |
500 | #define IOACCEL2_COMMANDLIST_ALIGNMENT 128 | ||
521 | struct io_accel2_cmd { | 501 | struct io_accel2_cmd { |
522 | u8 IU_type; /* IU Type */ | 502 | u8 IU_type; /* IU Type */ |
523 | u8 direction; /* direction, memtype, and encryption */ | 503 | u8 direction; /* direction, memtype, and encryption */ |
@@ -544,8 +524,7 @@ struct io_accel2_cmd { | |||
544 | u32 tweak_upper; /* Encryption tweak, upper 4 bytes */ | 524 | u32 tweak_upper; /* Encryption tweak, upper 4 bytes */ |
545 | struct ioaccel2_sg_element sg[IOACCEL2_MAXSGENTRIES]; | 525 | struct ioaccel2_sg_element sg[IOACCEL2_MAXSGENTRIES]; |
546 | struct io_accel2_scsi_response error_data; | 526 | struct io_accel2_scsi_response error_data; |
547 | u8 pad[IOACCEL2_PAD]; | 527 | } __aligned(IOACCEL2_COMMANDLIST_ALIGNMENT); |
548 | }; | ||
549 | 528 | ||
550 | /* | 529 | /* |
551 | * defines for Mode 2 command struct | 530 | * defines for Mode 2 command struct |