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authorMagnus Damm <damm@igel.co.jp>2009-04-30 03:12:09 -0400
committerPaul Mundt <lethal@linux-sh.org>2009-05-03 04:40:13 -0400
commit3280c8865e1b738604bacdea54738acef31e8c12 (patch)
treee6019038b1b0f68bdb01d3e52a627c222425ae46
parentda107c6ef919b3afd9c9b405a4f71e03b5725b04 (diff)
sh: remove old MTU2 driver
This patch removes the old MTU2 driver (CONFIG_SH_MTU2/timer-mtu2.c) As replacement, select the sh_cmt driver with CONFIG_SH_TIMER_MTU2 and configure timer channel using platform data. If multiple MTU channels are enabled using platform data, use the earlytimer parameter on the kernel command line to select channel. For instance, use "earlytimer=sh_mtu2.0" to select the first channel. To verify which timer is being used, look at printouts or the timer irq count in /proc/interrupts. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r--arch/sh/Kconfig9
-rw-r--r--arch/sh/include/asm/timer.h2
-rw-r--r--arch/sh/kernel/timers/Makefile1
-rw-r--r--arch/sh/kernel/timers/timer-mtu2.c202
-rw-r--r--arch/sh/kernel/timers/timer.c3
5 files changed, 2 insertions, 215 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 2061488cc17c..bda3dc1b0c26 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -479,16 +479,9 @@ config SH_TIMER_CMT
479 help 479 help
480 This enables build of the CMT timer driver. 480 This enables build of the CMT timer driver.
481 481
482config SH_MTU2
483 bool "MTU2 timer support"
484 depends on CPU_SH2A && !GENERIC_TIME
485 default y
486 help
487 This enables the use of the MTU2 as the system timer.
488
489config SH_TIMER_MTU2 482config SH_TIMER_MTU2
490 bool "MTU2 timer driver" 483 bool "MTU2 timer driver"
491 depends on SYS_SUPPORTS_MTU2 && !SH_MTU2 484 depends on SYS_SUPPORTS_MTU2
492 default y 485 default y
493 select GENERIC_CLOCKEVENTS 486 select GENERIC_CLOCKEVENTS
494 help 487 help
diff --git a/arch/sh/include/asm/timer.h b/arch/sh/include/asm/timer.h
index 9c968d19cb9b..581e3fe3fe04 100644
--- a/arch/sh/include/asm/timer.h
+++ b/arch/sh/include/asm/timer.h
@@ -23,7 +23,7 @@ struct sys_timer {
23 23
24#define TICK_SIZE (tick_nsec / 1000) 24#define TICK_SIZE (tick_nsec / 1000)
25 25
26extern struct sys_timer tmu_timer, mtu2_timer; 26extern struct sys_timer tmu_timer;
27extern struct sys_timer *sys_timer; 27extern struct sys_timer *sys_timer;
28 28
29#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET 29#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET
diff --git a/arch/sh/kernel/timers/Makefile b/arch/sh/kernel/timers/Makefile
index 1e9a104c2aee..44156df0bdea 100644
--- a/arch/sh/kernel/timers/Makefile
+++ b/arch/sh/kernel/timers/Makefile
@@ -5,6 +5,5 @@
5obj-y := timer.o 5obj-y := timer.o
6 6
7obj-$(CONFIG_SH_TMU) += timer-tmu.o 7obj-$(CONFIG_SH_TMU) += timer-tmu.o
8obj-$(CONFIG_SH_MTU2) += timer-mtu2.o
9 8
10obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) += timer-broadcast.o 9obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) += timer-broadcast.o
diff --git a/arch/sh/kernel/timers/timer-mtu2.c b/arch/sh/kernel/timers/timer-mtu2.c
deleted file mode 100644
index 8a1dcc2c3723..000000000000
--- a/arch/sh/kernel/timers/timer-mtu2.c
+++ /dev/null
@@ -1,202 +0,0 @@
1/*
2 * arch/sh/kernel/timers/timer-mtu2.c - MTU2 Timer Support
3 *
4 * Copyright (C) 2005 Paul Mundt
5 *
6 * Based off of arch/sh/kernel/timers/timer-tmu.c
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/init.h>
13#include <linux/kernel.h>
14#include <linux/interrupt.h>
15#include <linux/seqlock.h>
16#include <asm/timer.h>
17#include <asm/io.h>
18#include <asm/irq.h>
19#include <asm/clock.h>
20
21/*
22 * We use channel 1 for our lowly system timer. Channel 2 would be the other
23 * likely candidate, but we leave it alone as it has higher divisors that
24 * would be of more use to other more interesting applications.
25 *
26 * TODO: Presently we only implement a 16-bit single-channel system timer.
27 * However, we can implement channel cascade if we go the overflow route and
28 * get away with using 2 MTU2 channels as a 32-bit timer.
29 */
30#define MTU2_TSTR 0xfffe4280
31#define MTU2_TCR_1 0xfffe4380
32#define MTU2_TMDR_1 0xfffe4381
33#define MTU2_TIOR_1 0xfffe4382
34#define MTU2_TIER_1 0xfffe4384
35#define MTU2_TSR_1 0xfffe4385
36#define MTU2_TCNT_1 0xfffe4386 /* 16-bit counter */
37
38#if defined(CONFIG_CPU_SUBTYPE_SH7201) || \
39 defined(CONFIG_CPU_SUBTYPE_SH7203)
40#define MTU2_TGRA_1 0xfffe4388
41#else
42#define MTU2_TGRA_1 0xfffe438a
43#endif
44
45#define STBCR3 0xfffe0408
46
47#define MTU2_TSTR_CST1 (1 << 1) /* Counter Start 1 */
48
49#define MTU2_TSR_TGFA (1 << 0) /* GRA compare match */
50
51#define MTU2_TIER_TGIEA (1 << 0) /* GRA compare match interrupt enable */
52
53#define MTU2_TCR_INIT 0x22
54
55#define MTU2_TCR_CALIB 0x00
56
57static unsigned long mtu2_timer_get_offset(void)
58{
59 int count;
60 static int count_p = 0x7fff; /* for the first call after boot */
61 static unsigned long jiffies_p = 0;
62
63 /*
64 * cache volatile jiffies temporarily; we have IRQs turned off.
65 */
66 unsigned long jiffies_t;
67
68 /* timer count may underflow right here */
69 count = ctrl_inw(MTU2_TCNT_1); /* read the latched count */
70
71 jiffies_t = jiffies;
72
73 /*
74 * avoiding timer inconsistencies (they are rare, but they happen)...
75 * there is one kind of problem that must be avoided here:
76 * 1. the timer counter underflows
77 */
78
79 if (jiffies_t == jiffies_p) {
80 if (count > count_p) {
81 if (ctrl_inb(MTU2_TSR_1) & MTU2_TSR_TGFA) {
82 count -= LATCH;
83 } else {
84 printk("%s (): hardware timer problem?\n",
85 __func__);
86 }
87 }
88 } else
89 jiffies_p = jiffies_t;
90
91 count_p = count;
92
93 count = ((LATCH-1) - count) * TICK_SIZE;
94 count = (count + LATCH/2) / LATCH;
95
96 return count;
97}
98
99static irqreturn_t mtu2_timer_interrupt(int irq, void *dev_id)
100{
101 unsigned long timer_status;
102
103 /* Clear TGFA bit */
104 timer_status = ctrl_inb(MTU2_TSR_1);
105 timer_status &= ~MTU2_TSR_TGFA;
106 ctrl_outb(timer_status, MTU2_TSR_1);
107
108 /* Do timer tick */
109 handle_timer_tick();
110
111 return IRQ_HANDLED;
112}
113
114static struct irqaction mtu2_irq = {
115 .name = "timer",
116 .handler = mtu2_timer_interrupt,
117 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
118};
119
120static unsigned int divisors[] = { 1, 4, 16, 64, 1, 1, 256 };
121
122static void mtu2_clk_init(struct clk *clk)
123{
124 u8 idx = MTU2_TCR_INIT & 0x7;
125
126 clk->rate = clk->parent->rate / divisors[idx];
127 /* Start TCNT counting */
128 ctrl_outb(ctrl_inb(MTU2_TSTR) | MTU2_TSTR_CST1, MTU2_TSTR);
129
130}
131
132static void mtu2_clk_recalc(struct clk *clk)
133{
134 u8 idx = ctrl_inb(MTU2_TCR_1) & 0x7;
135 clk->rate = clk->parent->rate / divisors[idx];
136}
137
138static struct clk_ops mtu2_clk_ops = {
139 .init = mtu2_clk_init,
140 .recalc = mtu2_clk_recalc,
141};
142
143static struct clk mtu2_clk1 = {
144 .name = "mtu2_clk1",
145 .ops = &mtu2_clk_ops,
146};
147
148static int mtu2_timer_start(void)
149{
150 ctrl_outb(ctrl_inb(MTU2_TSTR) | MTU2_TSTR_CST1, MTU2_TSTR);
151 return 0;
152}
153
154static int mtu2_timer_stop(void)
155{
156 ctrl_outb(ctrl_inb(MTU2_TSTR) & ~MTU2_TSTR_CST1, MTU2_TSTR);
157 return 0;
158}
159
160static int mtu2_timer_init(void)
161{
162 unsigned long interval;
163
164 setup_irq(CONFIG_SH_TIMER_IRQ, &mtu2_irq);
165
166 mtu2_clk1.parent = clk_get(NULL, "module_clk");
167
168 ctrl_outb(ctrl_inb(STBCR3) & (~0x20), STBCR3);
169
170 /* Normal operation */
171 ctrl_outb(0, MTU2_TMDR_1);
172 ctrl_outb(MTU2_TCR_INIT, MTU2_TCR_1);
173 ctrl_outb(0x01, MTU2_TIOR_1);
174
175 /* Enable underflow interrupt */
176 ctrl_outb(ctrl_inb(MTU2_TIER_1) | MTU2_TIER_TGIEA, MTU2_TIER_1);
177
178 interval = CONFIG_SH_PCLK_FREQ / 16 / HZ;
179 printk(KERN_INFO "Interval = %ld\n", interval);
180
181 ctrl_outw(interval, MTU2_TGRA_1);
182 ctrl_outw(0, MTU2_TCNT_1);
183
184 clk_register(&mtu2_clk1);
185 clk_enable(&mtu2_clk1);
186
187 return 0;
188}
189
190struct sys_timer_ops mtu2_timer_ops = {
191 .init = mtu2_timer_init,
192 .start = mtu2_timer_start,
193 .stop = mtu2_timer_stop,
194#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET
195 .get_offset = mtu2_timer_get_offset,
196#endif
197};
198
199struct sys_timer mtu2_timer = {
200 .name = "mtu2",
201 .ops = &mtu2_timer_ops,
202};
diff --git a/arch/sh/kernel/timers/timer.c b/arch/sh/kernel/timers/timer.c
index f3bd1413d568..920891acb779 100644
--- a/arch/sh/kernel/timers/timer.c
+++ b/arch/sh/kernel/timers/timer.c
@@ -17,9 +17,6 @@ static struct sys_timer *sys_timers[] = {
17#ifdef CONFIG_SH_TMU 17#ifdef CONFIG_SH_TMU
18 &tmu_timer, 18 &tmu_timer,
19#endif 19#endif
20#ifdef CONFIG_SH_MTU2
21 &mtu2_timer,
22#endif
23 NULL, 20 NULL,
24}; 21};
25 22