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authorDirk Behme <dirk.behme@de.bosch.com>2013-02-15 09:10:01 -0500
committerShawn Guo <shawn.guo@linaro.org>2013-04-09 10:52:49 -0400
commit218abe6fe31b2059a6a647eddbe9c3ee08fa26fd (patch)
tree8494e5fbffa9862288763ffca95f0d161b075f85
parent8b9ad9f67d094efd2c2765d82cc1866bee9052c2 (diff)
ARM: dts: imx6q: add PMU
Add ARM Cortex A9 Performance Monitor Unit (PMU) support. On i.MX6 a combined interrupt on hardware line #126 is used (i.MX6 TRM: Performance Unit interrupt). For more details see Documentation/devicetree/bindings/arm/pmu.txt Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-rw-r--r--arch/arm/boot/dts/imx6qdl.dtsi5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 06ec460b4581..8f34a3cd2741 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -101,6 +101,11 @@
101 cache-level = <2>; 101 cache-level = <2>;
102 }; 102 };
103 103
104 pmu {
105 compatible = "arm,cortex-a9-pmu";
106 interrupts = <0 94 0x04>;
107 };
108
104 aips-bus@02000000 { /* AIPS1 */ 109 aips-bus@02000000 { /* AIPS1 */
105 compatible = "fsl,aips-bus", "simple-bus"; 110 compatible = "fsl,aips-bus", "simple-bus";
106 #address-cells = <1>; 111 #address-cells = <1>;