diff options
author | Oder Chiou <oder_chiou@realtek.com> | 2014-03-28 08:28:26 -0400 |
---|---|---|
committer | Mark Brown <broonie@linaro.org> | 2014-04-14 12:27:41 -0400 |
commit | 218a3f963822aca1d38b0175b6454fe53d15c2dd (patch) | |
tree | fe6a916f98fb85b089b0a42357403ac8be595f8a | |
parent | 2f2a714c1bed2702e5abf55381c03ccdf7b0fd06 (diff) |
ASoC: rt5640: Rename the function of clock checking
In order to identify clearly, the patch renames the function
"check_sysclk1_source" to "is_sys_clk_from_pll".
Signed-off-by: Oder Chiou <oder_chiou@realtek.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
-rw-r--r-- | sound/soc/codecs/rt5640.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/sound/soc/codecs/rt5640.c b/sound/soc/codecs/rt5640.c index 84ee7ef8eb17..19634d0992bc 100644 --- a/sound/soc/codecs/rt5640.c +++ b/sound/soc/codecs/rt5640.c | |||
@@ -480,7 +480,7 @@ static int set_dmic_clk(struct snd_soc_dapm_widget *w, | |||
480 | return idx; | 480 | return idx; |
481 | } | 481 | } |
482 | 482 | ||
483 | static int check_sysclk1_source(struct snd_soc_dapm_widget *source, | 483 | static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source, |
484 | struct snd_soc_dapm_widget *sink) | 484 | struct snd_soc_dapm_widget *sink) |
485 | { | 485 | { |
486 | unsigned int val; | 486 | unsigned int val; |
@@ -1273,22 +1273,22 @@ static const struct snd_soc_dapm_route rt5640_dapm_routes[] = { | |||
1273 | {"Stereo ADC MIXL", "ADC1 Switch", "Stereo ADC L1 Mux"}, | 1273 | {"Stereo ADC MIXL", "ADC1 Switch", "Stereo ADC L1 Mux"}, |
1274 | {"Stereo ADC MIXL", "ADC2 Switch", "Stereo ADC L2 Mux"}, | 1274 | {"Stereo ADC MIXL", "ADC2 Switch", "Stereo ADC L2 Mux"}, |
1275 | {"Stereo ADC MIXL", NULL, "Stereo Filter"}, | 1275 | {"Stereo ADC MIXL", NULL, "Stereo Filter"}, |
1276 | {"Stereo Filter", NULL, "PLL1", check_sysclk1_source}, | 1276 | {"Stereo Filter", NULL, "PLL1", is_sys_clk_from_pll}, |
1277 | 1277 | ||
1278 | {"Stereo ADC MIXR", "ADC1 Switch", "Stereo ADC R1 Mux"}, | 1278 | {"Stereo ADC MIXR", "ADC1 Switch", "Stereo ADC R1 Mux"}, |
1279 | {"Stereo ADC MIXR", "ADC2 Switch", "Stereo ADC R2 Mux"}, | 1279 | {"Stereo ADC MIXR", "ADC2 Switch", "Stereo ADC R2 Mux"}, |
1280 | {"Stereo ADC MIXR", NULL, "Stereo Filter"}, | 1280 | {"Stereo ADC MIXR", NULL, "Stereo Filter"}, |
1281 | {"Stereo Filter", NULL, "PLL1", check_sysclk1_source}, | 1281 | {"Stereo Filter", NULL, "PLL1", is_sys_clk_from_pll}, |
1282 | 1282 | ||
1283 | {"Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux"}, | 1283 | {"Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux"}, |
1284 | {"Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux"}, | 1284 | {"Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux"}, |
1285 | {"Mono ADC MIXL", NULL, "Mono Left Filter"}, | 1285 | {"Mono ADC MIXL", NULL, "Mono Left Filter"}, |
1286 | {"Mono Left Filter", NULL, "PLL1", check_sysclk1_source}, | 1286 | {"Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll}, |
1287 | 1287 | ||
1288 | {"Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux"}, | 1288 | {"Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux"}, |
1289 | {"Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux"}, | 1289 | {"Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux"}, |
1290 | {"Mono ADC MIXR", NULL, "Mono Right Filter"}, | 1290 | {"Mono ADC MIXR", NULL, "Mono Right Filter"}, |
1291 | {"Mono Right Filter", NULL, "PLL1", check_sysclk1_source}, | 1291 | {"Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll}, |
1292 | 1292 | ||
1293 | {"IF2 ADC L", NULL, "Mono ADC MIXL"}, | 1293 | {"IF2 ADC L", NULL, "Mono ADC MIXL"}, |
1294 | {"IF2 ADC R", NULL, "Mono ADC MIXR"}, | 1294 | {"IF2 ADC R", NULL, "Mono ADC MIXR"}, |
@@ -1377,13 +1377,13 @@ static const struct snd_soc_dapm_route rt5640_dapm_routes[] = { | |||
1377 | {"DIG MIXR", "DAC R2 Switch", "DAC R2 Mux"}, | 1377 | {"DIG MIXR", "DAC R2 Switch", "DAC R2 Mux"}, |
1378 | 1378 | ||
1379 | {"DAC L1", NULL, "Stereo DAC MIXL"}, | 1379 | {"DAC L1", NULL, "Stereo DAC MIXL"}, |
1380 | {"DAC L1", NULL, "PLL1", check_sysclk1_source}, | 1380 | {"DAC L1", NULL, "PLL1", is_sys_clk_from_pll}, |
1381 | {"DAC R1", NULL, "Stereo DAC MIXR"}, | 1381 | {"DAC R1", NULL, "Stereo DAC MIXR"}, |
1382 | {"DAC R1", NULL, "PLL1", check_sysclk1_source}, | 1382 | {"DAC R1", NULL, "PLL1", is_sys_clk_from_pll}, |
1383 | {"DAC L2", NULL, "Mono DAC MIXL"}, | 1383 | {"DAC L2", NULL, "Mono DAC MIXL"}, |
1384 | {"DAC L2", NULL, "PLL1", check_sysclk1_source}, | 1384 | {"DAC L2", NULL, "PLL1", is_sys_clk_from_pll}, |
1385 | {"DAC R2", NULL, "Mono DAC MIXR"}, | 1385 | {"DAC R2", NULL, "Mono DAC MIXR"}, |
1386 | {"DAC R2", NULL, "PLL1", check_sysclk1_source}, | 1386 | {"DAC R2", NULL, "PLL1", is_sys_clk_from_pll}, |
1387 | 1387 | ||
1388 | {"SPK MIXL", "REC MIXL Switch", "RECMIXL"}, | 1388 | {"SPK MIXL", "REC MIXL Switch", "RECMIXL"}, |
1389 | {"SPK MIXL", "INL Switch", "INL VOL"}, | 1389 | {"SPK MIXL", "INL Switch", "INL VOL"}, |