Merge tag 'drm-intel-fixes-2014-11-27' of git://anongit.freedesktop.org/drm-intel into drm-fixes

Two regression fixes from Ville.

* tag 'drm-intel-fixes-2014-11-27' of git://anongit.freedesktop.org/drm-intel:
  drm/i915: Cancel vdd off work before suspend
  drm/i915: Ignore SURFLIVE and flip counter when the GPU gets reset

2 files changed, 5 insertions, 0 deletions

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index f0a1a56406eb..8bcdb981d540 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9408,6 +9408,10 @@ static bool page_flip_finished(struct intel_crtc *crtc)
         struct drm_device *dev = crtc->base.dev;
         struct drm_i915_private *dev_priv = dev->dev_private;
 
+        if (i915_reset_in_progress(&dev_priv->gpu_error) ||
+            crtc->reset_counter != atomic_read(&dev_priv->gpu_error.reset_counter))
+                return true;
+
         /*
          * The relevant registers doen't exist on pre-ctg.
          * As the flip done interrupt doesn't trigger for mmio
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 5ad45bfff3fe..4bcd91757321 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -4450,6 +4450,7 @@ static void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder)
          * vdd might still be enabled do to the delayed vdd off.
          * Make sure vdd is actually turned off here.
          */
+        cancel_delayed_work_sync(&intel_dp->panel_vdd_work);
         pps_lock(intel_dp);
         edp_panel_vdd_off_sync(intel_dp);
         pps_unlock(intel_dp);