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authorJason Cooper <jason@lakedaemon.net>2013-12-11 15:19:58 -0500
committerJason Cooper <jason@lakedaemon.net>2013-12-12 10:00:43 -0500
commit20bba5883acf79460dff047cf45b6fb8089168b2 (patch)
tree7b5fa45a522b596d8219e7bb3ab4ba5dd5125a00
parent69e18e26b5773092276a9702244784faf9b6c65f (diff)
ARM: kirkwood: sort dt nodes by address
This has caused merge conflicts in the past. Signed-off-by: Jason Cooper <jason@lakedaemon.net>
-rw-r--r--arch/arm/boot/dts/kirkwood.dtsi140
1 files changed, 70 insertions, 70 deletions
diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi
index dd58a25a4166..1da94c187085 100644
--- a/arch/arm/boot/dts/kirkwood.dtsi
+++ b/arch/arm/boot/dts/kirkwood.dtsi
@@ -70,39 +70,21 @@
70 #address-cells = <1>; 70 #address-cells = <1>;
71 #size-cells = <1>; 71 #size-cells = <1>;
72 72
73 mbusc: mbus-controller@20000 {
74 compatible = "marvell,mbus-controller";
75 reg = <0x20000 0x80>, <0x1500 0x20>;
76 };
77
78 timer: timer@20300 {
79 compatible = "marvell,orion-timer";
80 reg = <0x20300 0x20>;
81 interrupt-parent = <&bridge_intc>;
82 interrupts = <1>, <2>;
83 clocks = <&core_clk 0>;
84 };
85
86 intc: main-interrupt-ctrl@20200 {
87 compatible = "marvell,orion-intc";
88 interrupt-controller;
89 #interrupt-cells = <1>;
90 reg = <0x20200 0x10>, <0x20210 0x10>;
91 };
92
93 bridge_intc: bridge-interrupt-ctrl@20110 {
94 compatible = "marvell,orion-bridge-intc";
95 interrupt-controller;
96 #interrupt-cells = <1>;
97 reg = <0x20110 0x8>;
98 interrupts = <1>;
99 marvell,#interrupts = <6>;
100 };
101
102 core_clk: core-clocks@10030 { 73 core_clk: core-clocks@10030 {
103 compatible = "marvell,kirkwood-core-clock"; 74 compatible = "marvell,kirkwood-core-clock";
104 reg = <0x10030 0x4>; 75 reg = <0x10030 0x4>;
105 #clock-cells = <1>; 76 #clock-cells = <1>;
77 };
78
79 spi@10600 {
80 compatible = "marvell,orion-spi";
81 #address-cells = <1>;
82 #size-cells = <0>;
83 cell-index = <0>;
84 interrupts = <23>;
85 reg = <0x10600 0x28>;
86 clocks = <&gate_clk 7>;
87 status = "disabled";
106 }; 88 };
107 89
108 gpio0: gpio@10100 { 90 gpio0: gpio@10100 {
@@ -129,6 +111,17 @@
129 clocks = <&gate_clk 7>; 111 clocks = <&gate_clk 7>;
130 }; 112 };
131 113
114 i2c@11000 {
115 compatible = "marvell,mv64xxx-i2c";
116 reg = <0x11000 0x20>;
117 #address-cells = <1>;
118 #size-cells = <0>;
119 interrupts = <29>;
120 clock-frequency = <100000>;
121 clocks = <&gate_clk 7>;
122 status = "disabled";
123 };
124
132 serial@12000 { 125 serial@12000 {
133 compatible = "ns16550a"; 126 compatible = "ns16550a";
134 reg = <0x12000 0x100>; 127 reg = <0x12000 0x100>;
@@ -147,15 +140,18 @@
147 status = "disabled"; 140 status = "disabled";
148 }; 141 };
149 142
150 spi@10600 { 143 mbusc: mbus-controller@20000 {
151 compatible = "marvell,orion-spi"; 144 compatible = "marvell,mbus-controller";
152 #address-cells = <1>; 145 reg = <0x20000 0x80>, <0x1500 0x20>;
153 #size-cells = <0>; 146 };
154 cell-index = <0>; 147
155 interrupts = <23>; 148 bridge_intc: bridge-interrupt-ctrl@20110 {
156 reg = <0x10600 0x28>; 149 compatible = "marvell,orion-bridge-intc";
157 clocks = <&gate_clk 7>; 150 interrupt-controller;
158 status = "disabled"; 151 #interrupt-cells = <1>;
152 reg = <0x20110 0x8>;
153 interrupts = <1>;
154 marvell,#interrupts = <6>;
159 }; 155 };
160 156
161 gate_clk: clock-gating-control@2011c { 157 gate_clk: clock-gating-control@2011c {
@@ -165,6 +161,21 @@
165 #clock-cells = <1>; 161 #clock-cells = <1>;
166 }; 162 };
167 163
164 intc: main-interrupt-ctrl@20200 {
165 compatible = "marvell,orion-intc";
166 interrupt-controller;
167 #interrupt-cells = <1>;
168 reg = <0x20200 0x10>, <0x20210 0x10>;
169 };
170
171 timer: timer@20300 {
172 compatible = "marvell,orion-timer";
173 reg = <0x20300 0x20>;
174 interrupt-parent = <&bridge_intc>;
175 interrupts = <1>, <2>;
176 clocks = <&core_clk 0>;
177 };
178
168 wdt: watchdog-timer@20300 { 179 wdt: watchdog-timer@20300 {
169 compatible = "marvell,orion-wdt"; 180 compatible = "marvell,orion-wdt";
170 reg = <0x20300 0x28>; 181 reg = <0x20300 0x28>;
@@ -174,6 +185,14 @@
174 status = "okay"; 185 status = "okay";
175 }; 186 };
176 187
188 ehci@50000 {
189 compatible = "marvell,orion-ehci";
190 reg = <0x50000 0x1000>;
191 interrupts = <19>;
192 clocks = <&gate_clk 3>;
193 status = "okay";
194 };
195
177 xor@60800 { 196 xor@60800 {
178 compatible = "marvell,orion-xor"; 197 compatible = "marvell,orion-xor";
179 reg = <0x60800 0x100 198 reg = <0x60800 0x100
@@ -214,37 +233,6 @@
214 }; 233 };
215 }; 234 };
216 235
217 ehci@50000 {
218 compatible = "marvell,orion-ehci";
219 reg = <0x50000 0x1000>;
220 interrupts = <19>;
221 clocks = <&gate_clk 3>;
222 status = "okay";
223 };
224
225 i2c@11000 {
226 compatible = "marvell,mv64xxx-i2c";
227 reg = <0x11000 0x20>;
228 #address-cells = <1>;
229 #size-cells = <0>;
230 interrupts = <29>;
231 clock-frequency = <100000>;
232 clocks = <&gate_clk 7>;
233 status = "disabled";
234 };
235
236 mdio: mdio-bus@72004 {
237 compatible = "marvell,orion-mdio";
238 #address-cells = <1>;
239 #size-cells = <0>;
240 reg = <0x72004 0x84>;
241 interrupts = <46>;
242 clocks = <&gate_clk 0>;
243 status = "disabled";
244
245 /* add phy nodes in board file */
246 };
247
248 eth0: ethernet-controller@72000 { 236 eth0: ethernet-controller@72000 {
249 compatible = "marvell,kirkwood-eth"; 237 compatible = "marvell,kirkwood-eth";
250 #address-cells = <1>; 238 #address-cells = <1>;
@@ -265,6 +253,18 @@
265 }; 253 };
266 }; 254 };
267 255
256 mdio: mdio-bus@72004 {
257 compatible = "marvell,orion-mdio";
258 #address-cells = <1>;
259 #size-cells = <0>;
260 reg = <0x72004 0x84>;
261 interrupts = <46>;
262 clocks = <&gate_clk 0>;
263 status = "disabled";
264
265 /* add phy nodes in board file */
266 };
267
268 eth1: ethernet-controller@76000 { 268 eth1: ethernet-controller@76000 {
269 compatible = "marvell,kirkwood-eth"; 269 compatible = "marvell,kirkwood-eth";
270 #address-cells = <1>; 270 #address-cells = <1>;