spi: Add devicetree bindings documentation for Cadence SPI

Add spi-cadence bindings documentation.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Mark Brown <broonie@linaro.org>

1 files changed, 31 insertions, 0 deletions

diff --git a/Documentation/devicetree/bindings/spi/spi-cadence.txt b/Documentation/devicetree/bindings/spi/spi-cadence.txt
new file mode 100644
index 000000000000..94f09141a4f0
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-cadence.txt
@@ -0,0 +1,31 @@
+Cadence SPI controller Device Tree Bindings
+-------------------------------------------
+
+Required properties:
+- compatible            : Should be "cdns,spi-r1p6" or "xlnx,zynq-spi-r1p6".
+- reg                   : Physical base address and size of SPI registers map.
+- interrupts            : Property with a value describing the interrupt
+                          number.
+- interrupt-parent      : Must be core interrupt controller
+- clock-names           : List of input clock names - "ref_clk", "pclk"
+                          (See clock bindings for details).
+- clocks                : Clock phandles (see clock bindings for details).
+
+Optional properties:
+- num-cs                : Number of chip selects used.
+                          If a decoder is used, this will be the number of
+                          chip selects after the decoder.
+- is-decoded-cs         : Flag to indicate whether decoder is used or not.
+
+Example:
+
+        spi@e0007000 {
+                compatible = "xlnx,zynq-spi-r1p6";
+                clock-names = "ref_clk", "pclk";
+                clocks = <&clkc 26>, <&clkc 35>;
+                interrupt-parent = <&intc>;
+                interrupts = <0 49 4>;
+                num-cs = <4>;
+                is-decoded-cs = <0>;
+                reg = <0xe0007000 0x1000>;
+        } ;