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authorLinus Walleij <linus.walleij@linaro.org>2013-11-13 07:46:57 -0500
committerLinus Walleij <linus.walleij@linaro.org>2013-11-26 15:01:55 -0500
commit1e66235330ff1bdc372647f47a414a3d3952dffb (patch)
treed84371d9c2d3af186c524ef1041cea95e6f7e9cb
parent96fee13f0f11a7479a06e4c44aaa89ee77b9fafb (diff)
ARM: ux500: move MMC/SD/SDIO pin control to the device tree
This moves the static, device-tied pin control configuration out of the board file board-mop500-pins.c and into the device tree. Add entries for SDI1 and SDI2 on the Snowball so that the WLAN pins on SDI1 can be used further on, and the unused pins on SDI2 can be put to sleep. Cc: Lee Jones <lee.jones@linaro.org> Cc: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat
-rw-r--r--arch/arm/boot/dts/ste-href-family-pinctrl.dtsi211
-rw-r--r--arch/arm/boot/dts/ste-href.dtsi12
-rw-r--r--arch/arm/boot/dts/ste-hrefprev60.dtsi17
-rw-r--r--arch/arm/boot/dts/ste-hrefv60plus.dtsi12
-rw-r--r--arch/arm/boot/dts/ste-nomadik-pinctrl.dtsi19
-rw-r--r--arch/arm/boot/dts/ste-snowball.dts43
-rw-r--r--arch/arm/mach-ux500/board-mop500-pins.c107
7 files changed, 314 insertions, 107 deletions
diff --git a/arch/arm/boot/dts/ste-href-family-pinctrl.dtsi b/arch/arm/boot/dts/ste-href-family-pinctrl.dtsi
index d2e63f3fb687..23583b0546d9 100644
--- a/arch/arm/boot/dts/ste-href-family-pinctrl.dtsi
+++ b/arch/arm/boot/dts/ste-href-family-pinctrl.dtsi
@@ -214,6 +214,217 @@
214 }; 214 };
215 }; 215 };
216 }; 216 };
217
218 /* Settings for all MMC/SD/SDIO default and sleep states */
219 sdi0 {
220 /* This is the external SD card slot, 4 bits wide */
221 sdi0_default_mode: sdi0_default {
222 default_mux {
223 ste,function = "mc0";
224 ste,pins = "mc0_a_1";
225 };
226 default_cfg1 {
227 ste,pins =
228 "GPIO18_AC2", /* CMDDIR */
229 "GPIO19_AC1", /* DAT0DIR */
230 "GPIO20_AB4"; /* DAT2DIR */
231 ste,config = <&out_hi>;
232 };
233 default_cfg2 {
234 ste,pins = "GPIO22_AA3"; /* FBCLK */
235 ste,config = <&in_nopull>;
236 };
237 default_cfg3 {
238 ste,pins = "GPIO23_AA4"; /* CLK */
239 ste,config = <&out_lo>;
240 };
241 default_cfg4 {
242 ste,pins =
243 "GPIO24_AB2", /* CMD */
244 "GPIO25_Y4", /* DAT0 */
245 "GPIO26_Y2", /* DAT1 */
246 "GPIO27_AA2", /* DAT2 */
247 "GPIO28_AA1"; /* DAT3 */
248 ste,config = <&in_pu>;
249 };
250 };
251
252 sdi0_sleep_mode: sdi0_sleep {
253 sleep_cfg1 {
254 ste,pins =
255 "GPIO18_AC2", /* CMDDIR */
256 "GPIO19_AC1", /* DAT0DIR */
257 "GPIO20_AB4"; /* DAT2DIR */
258 ste,config = <&slpm_out_hi_wkup_pdis>;
259 };
260 sleep_cfg2 {
261 ste,pins =
262 "GPIO22_AA3", /* FBCLK */
263 "GPIO24_AB2", /* CMD */
264 "GPIO25_Y4", /* DAT0 */
265 "GPIO26_Y2", /* DAT1 */
266 "GPIO27_AA2", /* DAT2 */
267 "GPIO28_AA1"; /* DAT3 */
268 ste,config = <&slpm_in_wkup_pdis>;
269 };
270 sleep_cfg3 {
271 ste,pins = "GPIO23_AA4"; /* CLK */
272 ste,config = <&slpm_out_lo_wkup_pdis>;
273 };
274 };
275 };
276
277 sdi1 {
278 /* This is the WLAN SDIO 4 bits wide */
279 sdi1_default_mode: sdi1_default {
280 default_mux {
281 ste,function = "mc1";
282 ste,pins = "mc1_a_1";
283 };
284 default_cfg1 {
285 ste,pins = "GPIO208_AH16"; /* CLK */
286 ste,config = <&out_lo>;
287 };
288 default_cfg2 {
289 ste,pins = "GPIO209_AG15"; /* FBCLK */
290 ste,config = <&in_nopull>;
291 };
292 default_cfg3 {
293 ste,pins =
294 "GPIO210_AJ15", /* CMD */
295 "GPIO211_AG14", /* DAT0 */
296 "GPIO212_AF13", /* DAT1 */
297 "GPIO213_AG13", /* DAT2 */
298 "GPIO214_AH15"; /* DAT3 */
299 ste,config = <&in_pu>;
300 };
301 };
302
303 sdi1_sleep_mode: sdi1_sleep {
304 sleep_cfg1 {
305 ste,pins = "GPIO208_AH16"; /* CLK */
306 ste,config = <&slpm_out_lo_wkup_pdis>;
307 };
308 sleep_cfg2 {
309 ste,pins =
310 "GPIO209_AG15", /* FBCLK */
311 "GPIO210_AJ15", /* CMD */
312 "GPIO211_AG14", /* DAT0 */
313 "GPIO212_AF13", /* DAT1 */
314 "GPIO213_AG13", /* DAT2 */
315 "GPIO214_AH15"; /* DAT3 */
316 ste,config = <&slpm_in_wkup_pdis>;
317 };
318 };
319 };
320
321 sdi2 {
322 /* This is the eMMC 8 bits wide, usually PoP eMMC */
323 sdi2_default_mode: sdi2_default {
324 default_mux {
325 ste,function = "mc2";
326 ste,pins = "mc2_a_1";
327 };
328 default_cfg1 {
329 ste,pins = "GPIO128_A5"; /* CLK */
330 ste,config = <&out_lo>;
331 };
332 default_cfg2 {
333 ste,pins = "GPIO130_C8"; /* FBCLK */
334 ste,config = <&in_nopull>;
335 };
336 default_cfg3 {
337 ste,pins =
338 "GPIO129_B4", /* CMD */
339 "GPIO131_A12", /* DAT0 */
340 "GPIO132_C10", /* DAT1 */
341 "GPIO133_B10", /* DAT2 */
342 "GPIO134_B9", /* DAT3 */
343 "GPIO135_A9", /* DAT4 */
344 "GPIO136_C7", /* DAT5 */
345 "GPIO137_A7", /* DAT6 */
346 "GPIO138_C5"; /* DAT7 */
347 ste,config = <&in_pu>;
348 };
349 };
350
351 sdi2_sleep_mode: sdi2_sleep {
352 sleep_cfg1 {
353 ste,pins = "GPIO128_A5"; /* CLK */
354 ste,config = <&out_lo_wkup_pdis>;
355 };
356 sleep_cfg2 {
357 ste,pins =
358 "GPIO130_C8", /* FBCLK */
359 "GPIO129_B4"; /* CMD */
360 ste,config = <&in_wkup_pdis_en>;
361 };
362 sleep_cfg3 {
363 ste,pins =
364 "GPIO131_A12", /* DAT0 */
365 "GPIO132_C10", /* DAT1 */
366 "GPIO133_B10", /* DAT2 */
367 "GPIO134_B9", /* DAT3 */
368 "GPIO135_A9", /* DAT4 */
369 "GPIO136_C7", /* DAT5 */
370 "GPIO137_A7", /* DAT6 */
371 "GPIO138_C5"; /* DAT7 */
372 ste,config = <&in_wkup_pdis>;
373 };
374 };
375 };
376
377 sdi4 {
378 /* This is the eMMC 8 bits wide, usually PCB-mounted eMMC */
379 sdi4_default_mode: sdi4_default {
380 default_mux {
381 ste,function = "mc4";
382 ste,pins = "mc4_a_1";
383 };
384 default_cfg1 {
385 ste,pins = "GPIO203_AE23"; /* CLK */
386 ste,config = <&out_lo>;
387 };
388 default_cfg2 {
389 ste,pins = "GPIO202_AF25"; /* FBCLK */
390 ste,config = <&in_nopull>;
391 };
392 default_cfg3 {
393 ste,pins =
394 "GPIO201_AF24", /* CMD */
395 "GPIO200_AH26", /* DAT0 */
396 "GPIO199_AH23", /* DAT1 */
397 "GPIO198_AG25", /* DAT2 */
398 "GPIO197_AH24", /* DAT3 */
399 "GPIO207_AJ23", /* DAT4 */
400 "GPIO206_AG24", /* DAT5 */
401 "GPIO205_AG23", /* DAT6 */
402 "GPIO204_AF23"; /* DAT7 */
403 ste,config = <&in_pu>;
404 };
405 };
406
407 sdi4_sleep_mode: sdi4_sleep {
408 sleep_cfg1 {
409 ste,pins = "GPIO203_AE23"; /* CLK */
410 ste,config = <&out_lo_wkup_pdis>;
411 };
412 sleep_cfg2 {
413 ste,pins =
414 "GPIO202_AF25", /* FBCLK */
415 "GPIO201_AF24", /* CMD */
416 "GPIO200_AH26", /* DAT0 */
417 "GPIO199_AH23", /* DAT1 */
418 "GPIO198_AG25", /* DAT2 */
419 "GPIO197_AH24", /* DAT3 */
420 "GPIO207_AJ23", /* DAT4 */
421 "GPIO206_AG24", /* DAT5 */
422 "GPIO205_AG23", /* DAT6 */
423 "GPIO204_AF23"; /* DAT7 */
424 ste,config = <&slpm_in_wkup_pdis>;
425 };
426 };
427 };
217 }; 428 };
218 }; 429 };
219}; 430};
diff --git a/arch/arm/boot/dts/ste-href.dtsi b/arch/arm/boot/dts/ste-href.dtsi
index 1863241c911e..845eb25f5d26 100644
--- a/arch/arm/boot/dts/ste-href.dtsi
+++ b/arch/arm/boot/dts/ste-href.dtsi
@@ -125,6 +125,9 @@
125 mmc-cap-mmc-highspeed; 125 mmc-cap-mmc-highspeed;
126 vmmc-supply = <&ab8500_ldo_aux3_reg>; 126 vmmc-supply = <&ab8500_ldo_aux3_reg>;
127 vqmmc-supply = <&vmmci>; 127 vqmmc-supply = <&vmmci>;
128 pinctrl-names = "default", "sleep";
129 pinctrl-0 = <&sdi0_default_mode>;
130 pinctrl-1 = <&sdi0_sleep_mode>;
128 131
129 cd-gpios = <&tc3589x_gpio 3 0x4>; 132 cd-gpios = <&tc3589x_gpio 3 0x4>;
130 133
@@ -136,6 +139,9 @@
136 arm,primecell-periphid = <0x10480180>; 139 arm,primecell-periphid = <0x10480180>;
137 max-frequency = <100000000>; 140 max-frequency = <100000000>;
138 bus-width = <4>; 141 bus-width = <4>;
142 pinctrl-names = "default", "sleep";
143 pinctrl-0 = <&sdi1_default_mode>;
144 pinctrl-1 = <&sdi1_sleep_mode>;
139 145
140 status = "okay"; 146 status = "okay";
141 }; 147 };
@@ -146,6 +152,9 @@
146 max-frequency = <100000000>; 152 max-frequency = <100000000>;
147 bus-width = <8>; 153 bus-width = <8>;
148 mmc-cap-mmc-highspeed; 154 mmc-cap-mmc-highspeed;
155 pinctrl-names = "default", "sleep";
156 pinctrl-0 = <&sdi2_default_mode>;
157 pinctrl-1 = <&sdi2_sleep_mode>;
149 158
150 status = "okay"; 159 status = "okay";
151 }; 160 };
@@ -157,6 +166,9 @@
157 bus-width = <8>; 166 bus-width = <8>;
158 mmc-cap-mmc-highspeed; 167 mmc-cap-mmc-highspeed;
159 vmmc-supply = <&ab8500_ldo_aux2_reg>; 168 vmmc-supply = <&ab8500_ldo_aux2_reg>;
169 pinctrl-names = "default", "sleep";
170 pinctrl-0 = <&sdi4_default_mode>;
171 pinctrl-1 = <&sdi4_sleep_mode>;
160 172
161 status = "okay"; 173 status = "okay";
162 }; 174 };
diff --git a/arch/arm/boot/dts/ste-hrefprev60.dtsi b/arch/arm/boot/dts/ste-hrefprev60.dtsi
index 6b271a410d03..cfd7ef306d49 100644
--- a/arch/arm/boot/dts/ste-hrefprev60.dtsi
+++ b/arch/arm/boot/dts/ste-hrefprev60.dtsi
@@ -55,5 +55,22 @@
55 55
56 status = "okay"; 56 status = "okay";
57 }; 57 };
58
59 pinctrl {
60 sdi0 {
61 /* This additional pin needed on early MOP500 and HREFs previous to v60 */
62 sdi0_default_mode: sdi0_default {
63 hrefprev60_mux {
64 ste,function = "mc0";
65 ste,pins = "mc0dat31dir_a_1";
66 };
67 hrefprev60_cfg1 {
68 ste,pins = "GPIO21_AB3"; /* DAT31DIR */
69 ste,config = <&out_hi>;
70 };
71
72 };
73 };
74 };
58 }; 75 };
59}; 76};
diff --git a/arch/arm/boot/dts/ste-hrefv60plus.dtsi b/arch/arm/boot/dts/ste-hrefv60plus.dtsi
index aed511b47a9e..452f00c4f7c0 100644
--- a/arch/arm/boot/dts/ste-hrefv60plus.dtsi
+++ b/arch/arm/boot/dts/ste-hrefv60plus.dtsi
@@ -66,5 +66,17 @@
66 66
67 status = "okay"; 67 status = "okay";
68 }; 68 };
69
70 pinctrl {
71 sdi0 {
72 /* SD card detect GPIO pin, extend default state */
73 sdi0_default_mode: sdi0_default {
74 default_hrefv60_cfg1 {
75 ste,pins = "GPIO95_E8";
76 ste,config = <&gpio_in_pu>;
77 };
78 };
79 };
80 };
69 }; 81 };
70}; 82};
diff --git a/arch/arm/boot/dts/ste-nomadik-pinctrl.dtsi b/arch/arm/boot/dts/ste-nomadik-pinctrl.dtsi
index efddee9403c4..f213222cf220 100644
--- a/arch/arm/boot/dts/ste-nomadik-pinctrl.dtsi
+++ b/arch/arm/boot/dts/ste-nomadik-pinctrl.dtsi
@@ -68,6 +68,13 @@
68 ste,sleep-pull-disable = <SLPM_PDIS_DISABLED>; 68 ste,sleep-pull-disable = <SLPM_PDIS_DISABLED>;
69 }; 69 };
70 70
71 slpm_out_lo_wkup_pdis: slpm_out_lo_wkup_pdis {
72 ste,sleep = <SLPM_ENABLED>;
73 ste,sleep-output = <SLPM_OUTPUT_LOW>;
74 ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
75 ste,sleep-pull-disable = <SLPM_PDIS_DISABLED>;
76 };
77
71 slpm_out_wkup_pdis: slpm_out_wkup_pdis { 78 slpm_out_wkup_pdis: slpm_out_wkup_pdis {
72 ste,sleep = <SLPM_ENABLED>; 79 ste,sleep = <SLPM_ENABLED>;
73 ste,sleep-output = <SLPM_DIR_OUTPUT>; 80 ste,sleep-output = <SLPM_DIR_OUTPUT>;
@@ -81,6 +88,18 @@
81 ste,sleep-pull-disable = <SLPM_PDIS_DISABLED>; 88 ste,sleep-pull-disable = <SLPM_PDIS_DISABLED>;
82 }; 89 };
83 90
91 in_wkup_pdis_en: in_wkup_pdis_en {
92 ste,sleep-input = <SLPM_DIR_INPUT>;
93 ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
94 ste,sleep-pull-disable = <SLPM_PDIS_ENABLED>;
95 };
96
97 out_lo_wkup_pdis: out_lo_wkup_pdis {
98 ste,sleep-output = <SLPM_OUTPUT_LOW>;
99 ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
100 ste,sleep-pull-disable = <SLPM_PDIS_DISABLED>;
101 };
102
84 out_hi_wkup_pdis: out_hi_wkup_pdis { 103 out_hi_wkup_pdis: out_hi_wkup_pdis {
85 ste,sleep-output = <SLPM_OUTPUT_HIGH>; 104 ste,sleep-output = <SLPM_OUTPUT_HIGH>;
86 ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>; 105 ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
diff --git a/arch/arm/boot/dts/ste-snowball.dts b/arch/arm/boot/dts/ste-snowball.dts
index f8df43e0791d..c2cb3ea637dc 100644
--- a/arch/arm/boot/dts/ste-snowball.dts
+++ b/arch/arm/boot/dts/ste-snowball.dts
@@ -137,6 +137,9 @@
137 mmc-cap-mmc-highspeed; 137 mmc-cap-mmc-highspeed;
138 vmmc-supply = <&ab8500_ldo_aux3_reg>; 138 vmmc-supply = <&ab8500_ldo_aux3_reg>;
139 vqmmc-supply = <&vmmci>; 139 vqmmc-supply = <&vmmci>;
140 pinctrl-names = "default", "sleep";
141 pinctrl-0 = <&sdi0_default_mode>;
142 pinctrl-1 = <&sdi0_sleep_mode>;
140 143
141 cd-gpios = <&gpio6 26 0x4>; // 218 144 cd-gpios = <&gpio6 26 0x4>; // 218
142 cd-inverted; 145 cd-inverted;
@@ -144,6 +147,27 @@
144 status = "okay"; 147 status = "okay";
145 }; 148 };
146 149
150 // WLAN SDIO channel
151 sdi1_per2@80118000 {
152 arm,primecell-periphid = <0x10480180>;
153 max-frequency = <100000000>;
154 bus-width = <4>;
155 pinctrl-names = "default", "sleep";
156 pinctrl-0 = <&sdi1_default_mode>;
157 pinctrl-1 = <&sdi1_sleep_mode>;
158
159 status = "okay";
160 };
161
162 // Unused PoP eMMC - register and put it to sleep by default */
163 sdi2_per3@80005000 {
164 arm,primecell-periphid = <0x10480180>;
165 pinctrl-names = "default";
166 pinctrl-0 = <&sdi2_sleep_mode>;
167
168 status = "okay";
169 };
170
147 // On-board eMMC 171 // On-board eMMC
148 sdi4_per2@80114000 { 172 sdi4_per2@80114000 {
149 arm,primecell-periphid = <0x10480180>; 173 arm,primecell-periphid = <0x10480180>;
@@ -151,6 +175,9 @@
151 bus-width = <8>; 175 bus-width = <8>;
152 mmc-cap-mmc-highspeed; 176 mmc-cap-mmc-highspeed;
153 vmmc-supply = <&ab8500_ldo_aux2_reg>; 177 vmmc-supply = <&ab8500_ldo_aux2_reg>;
178 pinctrl-names = "default", "sleep";
179 pinctrl-0 = <&sdi4_default_mode>;
180 pinctrl-1 = <&sdi4_sleep_mode>;
154 181
155 status = "okay"; 182 status = "okay";
156 }; 183 };
@@ -300,5 +327,21 @@
300 }; 327 };
301 }; 328 };
302 }; 329 };
330
331 pinctrl {
332 sdi0 {
333 sdi0_default_mode: sdi0_default {
334 snowball_mux {
335 ste,function = "mc0";
336 ste,pins = "mc0dat31dir_a_1";
337 };
338 snowball_cfg1 {
339 ste,pins = "GPIO21_AB3"; /* DAT31DIR */
340 ste,config = <&out_hi>;
341 };
342
343 };
344 };
345 };
303 }; 346 };
304}; 347};
diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c
index 1f1e53972063..0f9a0776cf90 100644
--- a/arch/arm/mach-ux500/board-mop500-pins.c
+++ b/arch/arm/mach-ux500/board-mop500-pins.c
@@ -63,12 +63,6 @@ BIAS(slpm_out_hi_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_OUTPUT_HIGH|
63 PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); 63 PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
64BIAS(slpm_in_pu_wkup_pdis_en, PIN_SLEEPMODE_ENABLED|PIN_SLPM_INPUT_PULLUP| 64BIAS(slpm_in_pu_wkup_pdis_en, PIN_SLEEPMODE_ENABLED|PIN_SLPM_INPUT_PULLUP|
65 PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_ENABLED); 65 PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_ENABLED);
66BIAS(out_lo_wkup_pdis, PIN_SLPM_OUTPUT_LOW|
67 PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
68BIAS(in_wkup_pdis_en, PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|
69 PIN_SLPM_PDIS_ENABLED);
70BIAS(in_wkup_pdis, PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|
71 PIN_SLPM_PDIS_DISABLED);
72 66
73/* We use these to define hog settings that are always done on boot */ 67/* We use these to define hog settings that are always done on boot */
74#define DB8500_MUX_HOG(group,func) \ 68#define DB8500_MUX_HOG(group,func) \
@@ -389,99 +383,6 @@ static struct pinctrl_map __initdata mop500_family_pinmap[] = {
389 DB8500_PIN("GPIO69_E2", in_pu, "0-0070"), 383 DB8500_PIN("GPIO69_E2", in_pu, "0-0070"),
390 /* LCD VSI1 sleep state */ 384 /* LCD VSI1 sleep state */
391 DB8500_PIN_SLEEP("GPIO69_E2", slpm_in_wkup_pdis, "0-0070"), 385 DB8500_PIN_SLEEP("GPIO69_E2", slpm_in_wkup_pdis, "0-0070"),
392 /* Mux in SDI0 (here called MC0) used for removable MMC/SD/SDIO cards */
393 DB8500_MUX("mc0_a_1", "mc0", "sdi0"),
394 DB8500_PIN("GPIO18_AC2", out_hi, "sdi0"), /* CMDDIR */
395 DB8500_PIN("GPIO19_AC1", out_hi, "sdi0"), /* DAT0DIR */
396 DB8500_PIN("GPIO20_AB4", out_hi, "sdi0"), /* DAT2DIR */
397 DB8500_PIN("GPIO22_AA3", in_nopull, "sdi0"), /* FBCLK */
398 DB8500_PIN("GPIO23_AA4", out_lo, "sdi0"), /* CLK */
399 DB8500_PIN("GPIO24_AB2", in_pu, "sdi0"), /* CMD */
400 DB8500_PIN("GPIO25_Y4", in_pu, "sdi0"), /* DAT0 */
401 DB8500_PIN("GPIO26_Y2", in_pu, "sdi0"), /* DAT1 */
402 DB8500_PIN("GPIO27_AA2", in_pu, "sdi0"), /* DAT2 */
403 DB8500_PIN("GPIO28_AA1", in_pu, "sdi0"), /* DAT3 */
404 /* SDI0 sleep state */
405 DB8500_PIN_SLEEP("GPIO18_AC2", slpm_out_hi_wkup_pdis, "sdi0"),
406 DB8500_PIN_SLEEP("GPIO19_AC1", slpm_out_hi_wkup_pdis, "sdi0"),
407 DB8500_PIN_SLEEP("GPIO20_AB4", slpm_out_hi_wkup_pdis, "sdi0"),
408 DB8500_PIN_SLEEP("GPIO22_AA3", slpm_in_wkup_pdis, "sdi0"),
409 DB8500_PIN_SLEEP("GPIO23_AA4", slpm_out_lo_wkup_pdis, "sdi0"),
410 DB8500_PIN_SLEEP("GPIO24_AB2", slpm_in_wkup_pdis, "sdi0"),
411 DB8500_PIN_SLEEP("GPIO25_Y4", slpm_in_wkup_pdis, "sdi0"),
412 DB8500_PIN_SLEEP("GPIO26_Y2", slpm_in_wkup_pdis, "sdi0"),
413 DB8500_PIN_SLEEP("GPIO27_AA2", slpm_in_wkup_pdis, "sdi0"),
414 DB8500_PIN_SLEEP("GPIO28_AA1", slpm_in_wkup_pdis, "sdi0"),
415
416 /* Mux in SDI1 (here called MC1) used for SDIO for CW1200 WLAN */
417 DB8500_MUX("mc1_a_1", "mc1", "sdi1"),
418 DB8500_PIN("GPIO208_AH16", out_lo, "sdi1"), /* CLK */
419 DB8500_PIN("GPIO209_AG15", in_nopull, "sdi1"), /* FBCLK */
420 DB8500_PIN("GPIO210_AJ15", in_pu, "sdi1"), /* CMD */
421 DB8500_PIN("GPIO211_AG14", in_pu, "sdi1"), /* DAT0 */
422 DB8500_PIN("GPIO212_AF13", in_pu, "sdi1"), /* DAT1 */
423 DB8500_PIN("GPIO213_AG13", in_pu, "sdi1"), /* DAT2 */
424 DB8500_PIN("GPIO214_AH15", in_pu, "sdi1"), /* DAT3 */
425 /* SDI1 sleep state */
426 DB8500_PIN_SLEEP("GPIO208_AH16", slpm_out_lo_wkup_pdis, "sdi1"), /* CLK */
427 DB8500_PIN_SLEEP("GPIO209_AG15", slpm_in_wkup_pdis, "sdi1"), /* FBCLK */
428 DB8500_PIN_SLEEP("GPIO210_AJ15", slpm_in_wkup_pdis, "sdi1"), /* CMD */
429 DB8500_PIN_SLEEP("GPIO211_AG14", slpm_in_wkup_pdis, "sdi1"), /* DAT0 */
430 DB8500_PIN_SLEEP("GPIO212_AF13", slpm_in_wkup_pdis, "sdi1"), /* DAT1 */
431 DB8500_PIN_SLEEP("GPIO213_AG13", slpm_in_wkup_pdis, "sdi1"), /* DAT2 */
432 DB8500_PIN_SLEEP("GPIO214_AH15", slpm_in_wkup_pdis, "sdi1"), /* DAT3 */
433
434 /* Mux in SDI2 (here called MC2) used for for PoP eMMC */
435 DB8500_MUX("mc2_a_1", "mc2", "sdi2"),
436 DB8500_PIN("GPIO128_A5", out_lo, "sdi2"), /* CLK */
437 DB8500_PIN("GPIO129_B4", in_pu, "sdi2"), /* CMD */
438 DB8500_PIN("GPIO130_C8", in_nopull, "sdi2"), /* FBCLK */
439 DB8500_PIN("GPIO131_A12", in_pu, "sdi2"), /* DAT0 */
440 DB8500_PIN("GPIO132_C10", in_pu, "sdi2"), /* DAT1 */
441 DB8500_PIN("GPIO133_B10", in_pu, "sdi2"), /* DAT2 */
442 DB8500_PIN("GPIO134_B9", in_pu, "sdi2"), /* DAT3 */
443 DB8500_PIN("GPIO135_A9", in_pu, "sdi2"), /* DAT4 */
444 DB8500_PIN("GPIO136_C7", in_pu, "sdi2"), /* DAT5 */
445 DB8500_PIN("GPIO137_A7", in_pu, "sdi2"), /* DAT6 */
446 DB8500_PIN("GPIO138_C5", in_pu, "sdi2"), /* DAT7 */
447 /* SDI2 sleep state */
448 DB8500_PIN_SLEEP("GPIO128_A5", out_lo_wkup_pdis, "sdi2"), /* CLK */
449 DB8500_PIN_SLEEP("GPIO129_B4", in_wkup_pdis_en, "sdi2"), /* CMD */
450 DB8500_PIN_SLEEP("GPIO130_C8", in_wkup_pdis_en, "sdi2"), /* FBCLK */
451 DB8500_PIN_SLEEP("GPIO131_A12", in_wkup_pdis, "sdi2"), /* DAT0 */
452 DB8500_PIN_SLEEP("GPIO132_C10", in_wkup_pdis, "sdi2"), /* DAT1 */
453 DB8500_PIN_SLEEP("GPIO133_B10", in_wkup_pdis, "sdi2"), /* DAT2 */
454 DB8500_PIN_SLEEP("GPIO134_B9", in_wkup_pdis, "sdi2"), /* DAT3 */
455 DB8500_PIN_SLEEP("GPIO135_A9", in_wkup_pdis, "sdi2"), /* DAT4 */
456 DB8500_PIN_SLEEP("GPIO136_C7", in_wkup_pdis, "sdi2"), /* DAT5 */
457 DB8500_PIN_SLEEP("GPIO137_A7", in_wkup_pdis, "sdi2"), /* DAT6 */
458 DB8500_PIN_SLEEP("GPIO138_C5", in_wkup_pdis, "sdi2"), /* DAT7 */
459
460 /* Mux in SDI4 (here called MC4) used for for PCB-mounted eMMC */
461 DB8500_MUX("mc4_a_1", "mc4", "sdi4"),
462 DB8500_PIN("GPIO197_AH24", in_pu, "sdi4"), /* DAT3 */
463 DB8500_PIN("GPIO198_AG25", in_pu, "sdi4"), /* DAT2 */
464 DB8500_PIN("GPIO199_AH23", in_pu, "sdi4"), /* DAT1 */
465 DB8500_PIN("GPIO200_AH26", in_pu, "sdi4"), /* DAT0 */
466 DB8500_PIN("GPIO201_AF24", in_pu, "sdi4"), /* CMD */
467 DB8500_PIN("GPIO202_AF25", in_nopull, "sdi4"), /* FBCLK */
468 DB8500_PIN("GPIO203_AE23", out_lo, "sdi4"), /* CLK */
469 DB8500_PIN("GPIO204_AF23", in_pu, "sdi4"), /* DAT7 */
470 DB8500_PIN("GPIO205_AG23", in_pu, "sdi4"), /* DAT6 */
471 DB8500_PIN("GPIO206_AG24", in_pu, "sdi4"), /* DAT5 */
472 DB8500_PIN("GPIO207_AJ23", in_pu, "sdi4"), /* DAT4 */
473 /*SDI4 sleep state */
474 DB8500_PIN_SLEEP("GPIO197_AH24", slpm_in_wkup_pdis, "sdi4"), /* DAT3 */
475 DB8500_PIN_SLEEP("GPIO198_AG25", slpm_in_wkup_pdis, "sdi4"), /* DAT2 */
476 DB8500_PIN_SLEEP("GPIO199_AH23", slpm_in_wkup_pdis, "sdi4"), /* DAT1 */
477 DB8500_PIN_SLEEP("GPIO200_AH26", slpm_in_wkup_pdis, "sdi4"), /* DAT0 */
478 DB8500_PIN_SLEEP("GPIO201_AF24", slpm_in_wkup_pdis, "sdi4"), /* CMD */
479 DB8500_PIN_SLEEP("GPIO202_AF25", slpm_in_wkup_pdis, "sdi4"), /* FBCLK */
480 DB8500_PIN_SLEEP("GPIO203_AE23", slpm_out_lo_wkup_pdis, "sdi4"), /* CLK */
481 DB8500_PIN_SLEEP("GPIO204_AF23", slpm_in_wkup_pdis, "sdi4"), /* DAT7 */
482 DB8500_PIN_SLEEP("GPIO205_AG23", slpm_in_wkup_pdis, "sdi4"), /* DAT6 */
483 DB8500_PIN_SLEEP("GPIO206_AG24", slpm_in_wkup_pdis, "sdi4"), /* DAT5 */
484 DB8500_PIN_SLEEP("GPIO207_AJ23", slpm_in_wkup_pdis, "sdi4"), /* DAT4 */
485 386
486 /* Mux in USB pins, drive STP high */ 387 /* Mux in USB pins, drive STP high */
487 /* USB default state */ 388 /* USB default state */
@@ -795,10 +696,6 @@ static struct pinctrl_map __initdata mop500_pinmap[] = {
795 DB8500_PIN_SLEEP("GPIO166_A22", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O2 */ 696 DB8500_PIN_SLEEP("GPIO166_A22", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O2 */
796 DB8500_PIN_SLEEP("GPIO167_B24", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O1 */ 697 DB8500_PIN_SLEEP("GPIO167_B24", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O1 */
797 DB8500_PIN_SLEEP("GPIO168_C22", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O0 */ 698 DB8500_PIN_SLEEP("GPIO168_C22", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O0 */
798
799 /* Mux in and drive the SDI0 DAT31DIR line high at runtime */
800 DB8500_MUX("mc0dat31dir_a_1", "mc0", "sdi0"),
801 DB8500_PIN("GPIO21_AB3", out_hi, "sdi0"),
802}; 699};
803 700
804/* 701/*
@@ -888,8 +785,6 @@ static struct pinctrl_map __initdata hrefv60_pinmap[] = {
888 /* Accelerometer interrupt lines */ 785 /* Accelerometer interrupt lines */
889 DB8500_PIN_HOG("GPIO82_C1", gpio_in_pu), /* ACC_INT1 */ 786 DB8500_PIN_HOG("GPIO82_C1", gpio_in_pu), /* ACC_INT1 */
890 DB8500_PIN_HOG("GPIO83_D3", gpio_in_pu), /* ACC_INT2 */ 787 DB8500_PIN_HOG("GPIO83_D3", gpio_in_pu), /* ACC_INT2 */
891 /* SD card detect GPIO pin */
892 DB8500_PIN_HOG("GPIO95_E8", gpio_in_pu),
893 /* 788 /*
894 * Runtime stuff 789 * Runtime stuff
895 * Pull up/down of some sensor GPIO pins, for proximity, HAL sensor 790 * Pull up/down of some sensor GPIO pins, for proximity, HAL sensor
@@ -925,8 +820,6 @@ static struct pinctrl_map __initdata snowball_pinmap[] = {
925 /* Mux in SSP0 connected to AB8500, pull down RXD pin */ 820 /* Mux in SSP0 connected to AB8500, pull down RXD pin */
926 DB8500_MUX_HOG("ssp0_a_1", "ssp0"), 821 DB8500_MUX_HOG("ssp0_a_1", "ssp0"),
927 DB8500_PIN_HOG("GPIO145_C13", pd), 822 DB8500_PIN_HOG("GPIO145_C13", pd),
928 /* Always drive the MC0 DAT31DIR line high on these boards */
929 DB8500_PIN_HOG("GPIO21_AB3", out_hi),
930 /* Mux in "SM" which is used for the SMSC911x Ethernet adapter */ 823 /* Mux in "SM" which is used for the SMSC911x Ethernet adapter */
931 DB8500_MUX_HOG("sm_b_1", "sm"), 824 DB8500_MUX_HOG("sm_b_1", "sm"),
932 /* User LED */ 825 /* User LED */
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-19 22:46:29 -0400