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authorAndrzej Hajda <a.hajda@samsung.com>2014-02-25 19:53:30 -0500
committerKukjin Kim <kgene.kim@samsung.com>2014-02-25 19:53:30 -0500
commit1dd4e5991cab573429a5d3b233c7f825d4a63eec (patch)
tree73a6f64f5fe142a1a9513dd4aa21a64f80962fc9
parentfe273c3e6fc6ba41607156efc5374651faef385f (diff)
ARM: dts: use macros in clock bindings for exynos5420
The patch replaces magic numbers with macros defined in DT header in exynos5420 clock bindings. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat
-rw-r--r--Documentation/devicetree/bindings/clock/exynos5420-clock.txt184
-rw-r--r--arch/arm/boot/dts/exynos5420.dtsi95
2 files changed, 55 insertions, 224 deletions
diff --git a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt
index 458f34789e5d..ca88c97a8562 100644
--- a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt
+++ b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt
@@ -13,184 +13,12 @@ Required Properties:
13 13
14- #clock-cells: should be 1. 14- #clock-cells: should be 1.
15 15
16The following is the list of clocks generated by the controller. Each clock is 16Each clock is assigned an identifier and client nodes can use this identifier
17assigned an identifier and client nodes use this identifier to specify the 17to specify the clock which they consume.
18clock which they consume.
19 18
20 19All available clocks are defined as preprocessor macros in
21 [Core Clocks] 20dt-bindings/clock/exynos5420.h header and can be used in device
22 21tree sources.
23 Clock ID
24 ----------------------------
25
26 fin_pll 1
27
28 [Clock Gate for Special Clocks]
29
30 Clock ID
31 ----------------------------
32 sclk_uart0 128
33 sclk_uart1 129
34 sclk_uart2 130
35 sclk_uart3 131
36 sclk_mmc0 132
37 sclk_mmc1 133
38 sclk_mmc2 134
39 sclk_spi0 135
40 sclk_spi1 136
41 sclk_spi2 137
42 sclk_i2s1 138
43 sclk_i2s2 139
44 sclk_pcm1 140
45 sclk_pcm2 141
46 sclk_spdif 142
47 sclk_hdmi 143
48 sclk_pixel 144
49 sclk_dp1 145
50 sclk_mipi1 146
51 sclk_fimd1 147
52 sclk_maudio0 148
53 sclk_maupcm0 149
54 sclk_usbd300 150
55 sclk_usbd301 151
56 sclk_usbphy300 152
57 sclk_usbphy301 153
58 sclk_unipro 154
59 sclk_pwm 155
60 sclk_gscl_wa 156
61 sclk_gscl_wb 157
62 sclk_hdmiphy 158
63
64 [Peripheral Clock Gates]
65
66 Clock ID
67 ----------------------------
68
69 aclk66_peric 256
70 uart0 257
71 uart1 258
72 uart2 259
73 uart3 260
74 i2c0 261
75 i2c1 262
76 i2c2 263
77 i2c3 264
78 i2c4 265
79 i2c5 266
80 i2c6 267
81 i2c7 268
82 i2c_hdmi 269
83 tsadc 270
84 spi0 271
85 spi1 272
86 spi2 273
87 keyif 274
88 i2s1 275
89 i2s2 276
90 pcm1 277
91 pcm2 278
92 pwm 279
93 spdif 280
94 i2c8 281
95 i2c9 282
96 i2c10 283
97 aclk66_psgen 300
98 chipid 301
99 sysreg 302
100 tzpc0 303
101 tzpc1 304
102 tzpc2 305
103 tzpc3 306
104 tzpc4 307
105 tzpc5 308
106 tzpc6 309
107 tzpc7 310
108 tzpc8 311
109 tzpc9 312
110 hdmi_cec 313
111 seckey 314
112 mct 315
113 wdt 316
114 rtc 317
115 tmu 318
116 tmu_gpu 319
117 pclk66_gpio 330
118 aclk200_fsys2 350
119 mmc0 351
120 mmc1 352
121 mmc2 353
122 sromc 354
123 ufs 355
124 aclk200_fsys 360
125 tsi 361
126 pdma0 362
127 pdma1 363
128 rtic 364
129 usbh20 365
130 usbd300 366
131 usbd301 377
132 aclk400_mscl 380
133 mscl0 381
134 mscl1 382
135 mscl2 383
136 smmu_mscl0 384
137 smmu_mscl1 385
138 smmu_mscl2 386
139 aclk333 400
140 mfc 401
141 smmu_mfcl 402
142 smmu_mfcr 403
143 aclk200_disp1 410
144 dsim1 411
145 dp1 412
146 hdmi 413
147 aclk300_disp1 420
148 fimd1 421
149 smmu_fimd1 422
150 aclk166 430
151 mixer 431
152 aclk266 440
153 rotator 441
154 mdma1 442
155 smmu_rotator 443
156 smmu_mdma1 444
157 aclk300_jpeg 450
158 jpeg 451
159 jpeg2 452
160 smmu_jpeg 453
161 aclk300_gscl 460
162 smmu_gscl0 461
163 smmu_gscl1 462
164 gscl_wa 463
165 gscl_wb 464
166 gscl0 465
167 gscl1 466
168 clk_3aa 467
169 aclk266_g2d 470
170 sss 471
171 slim_sss 472
172 mdma0 473
173 aclk333_g2d 480
174 g2d 481
175 aclk333_432_gscl 490
176 smmu_3aa 491
177 smmu_fimcl0 492
178 smmu_fimcl1 493
179 smmu_fimcl3 494
180 fimc_lite3 495
181 aclk_g3d 500
182 g3d 501
183 smmu_mixer 502
184
185 Mux ID
186 ----------------------------
187
188 mout_hdmi 640
189
190 Divider ID
191 ----------------------------
192
193 dout_pixel 768
194 22
195Example 1: An example of a clock controller node is listed below. 23Example 1: An example of a clock controller node is listed below.
196 24
@@ -208,6 +36,6 @@ Example 2: UART controller node that consumes the clock generated by the clock
208 compatible = "samsung,exynos4210-uart"; 36 compatible = "samsung,exynos4210-uart";
209 reg = <0x13820000 0x100>; 37 reg = <0x13820000 0x100>;
210 interrupts = <0 54 0>; 38 interrupts = <0 54 0>;
211 clocks = <&clock 259>, <&clock 130>; 39 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
212 clock-names = "uart", "clk_uart_baud0"; 40 clock-names = "uart", "clk_uart_baud0";
213 }; 41 };
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 45e2e658b03b..e3329afbd8c4 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -13,6 +13,7 @@
13 * published by the Free Software Foundation. 13 * published by the Free Software Foundation.
14 */ 14 */
15 15
16#include <dt-bindings/clock/exynos5420.h>
16#include "exynos5.dtsi" 17#include "exynos5.dtsi"
17#include "exynos5420-pinctrl.dtsi" 18#include "exynos5420-pinctrl.dtsi"
18 19
@@ -119,7 +120,8 @@
119 compatible = "samsung,exynos5420-audss-clock"; 120 compatible = "samsung,exynos5420-audss-clock";
120 reg = <0x03810000 0x0C>; 121 reg = <0x03810000 0x0C>;
121 #clock-cells = <1>; 122 #clock-cells = <1>;
122 clocks = <&clock 1>, <&clock 5>, <&clock 148>, <&clock 149>; 123 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>,
124 <&clock CLK_SCLK_MAUDIO0>, <&clock CLK_SCLK_MAUPCM0>;
123 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in"; 125 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
124 }; 126 };
125 127
@@ -127,7 +129,7 @@
127 compatible = "samsung,mfc-v7"; 129 compatible = "samsung,mfc-v7";
128 reg = <0x11000000 0x10000>; 130 reg = <0x11000000 0x10000>;
129 interrupts = <0 96 0>; 131 interrupts = <0 96 0>;
130 clocks = <&clock 401>; 132 clocks = <&clock CLK_MFC>;
131 clock-names = "mfc"; 133 clock-names = "mfc";
132 }; 134 };
133 135
@@ -137,7 +139,7 @@
137 #address-cells = <1>; 139 #address-cells = <1>;
138 #size-cells = <0>; 140 #size-cells = <0>;
139 reg = <0x12200000 0x2000>; 141 reg = <0x12200000 0x2000>;
140 clocks = <&clock 351>, <&clock 132>; 142 clocks = <&clock CLK_MMC0>, <&clock CLK_SCLK_MMC0>;
141 clock-names = "biu", "ciu"; 143 clock-names = "biu", "ciu";
142 fifo-depth = <0x40>; 144 fifo-depth = <0x40>;
143 status = "disabled"; 145 status = "disabled";
@@ -149,7 +151,7 @@
149 #address-cells = <1>; 151 #address-cells = <1>;
150 #size-cells = <0>; 152 #size-cells = <0>;
151 reg = <0x12210000 0x2000>; 153 reg = <0x12210000 0x2000>;
152 clocks = <&clock 352>, <&clock 133>; 154 clocks = <&clock CLK_MMC1>, <&clock CLK_SCLK_MMC1>;
153 clock-names = "biu", "ciu"; 155 clock-names = "biu", "ciu";
154 fifo-depth = <0x40>; 156 fifo-depth = <0x40>;
155 status = "disabled"; 157 status = "disabled";
@@ -161,7 +163,7 @@
161 #address-cells = <1>; 163 #address-cells = <1>;
162 #size-cells = <0>; 164 #size-cells = <0>;
163 reg = <0x12220000 0x1000>; 165 reg = <0x12220000 0x1000>;
164 clocks = <&clock 353>, <&clock 134>; 166 clocks = <&clock CLK_MMC2>, <&clock CLK_SCLK_MMC2>;
165 clock-names = "biu", "ciu"; 167 clock-names = "biu", "ciu";
166 fifo-depth = <0x40>; 168 fifo-depth = <0x40>;
167 status = "disabled"; 169 status = "disabled";
@@ -175,7 +177,7 @@
175 interrupt-parent = <&mct_map>; 177 interrupt-parent = <&mct_map>;
176 interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>, 178 interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>,
177 <8>, <9>, <10>, <11>; 179 <8>, <9>, <10>, <11>;
178 clocks = <&clock 1>, <&clock 315>; 180 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
179 clock-names = "fin_pll", "mct"; 181 clock-names = "fin_pll", "mct";
180 182
181 mct_map: mct-map { 183 mct_map: mct-map {
@@ -269,7 +271,7 @@
269 }; 271 };
270 272
271 rtc@101E0000 { 273 rtc@101E0000 {
272 clocks = <&clock 317>; 274 clocks = <&clock CLK_RTC>;
273 clock-names = "rtc"; 275 clock-names = "rtc";
274 status = "disabled"; 276 status = "disabled";
275 }; 277 };
@@ -296,7 +298,7 @@
296 compatible = "arm,pl330", "arm,primecell"; 298 compatible = "arm,pl330", "arm,primecell";
297 reg = <0x121A0000 0x1000>; 299 reg = <0x121A0000 0x1000>;
298 interrupts = <0 34 0>; 300 interrupts = <0 34 0>;
299 clocks = <&clock 362>; 301 clocks = <&clock CLK_PDMA0>;
300 clock-names = "apb_pclk"; 302 clock-names = "apb_pclk";
301 #dma-cells = <1>; 303 #dma-cells = <1>;
302 #dma-channels = <8>; 304 #dma-channels = <8>;
@@ -307,7 +309,7 @@
307 compatible = "arm,pl330", "arm,primecell"; 309 compatible = "arm,pl330", "arm,primecell";
308 reg = <0x121B0000 0x1000>; 310 reg = <0x121B0000 0x1000>;
309 interrupts = <0 35 0>; 311 interrupts = <0 35 0>;
310 clocks = <&clock 363>; 312 clocks = <&clock CLK_PDMA1>;
311 clock-names = "apb_pclk"; 313 clock-names = "apb_pclk";
312 #dma-cells = <1>; 314 #dma-cells = <1>;
313 #dma-channels = <8>; 315 #dma-channels = <8>;
@@ -318,7 +320,7 @@
318 compatible = "arm,pl330", "arm,primecell"; 320 compatible = "arm,pl330", "arm,primecell";
319 reg = <0x10800000 0x1000>; 321 reg = <0x10800000 0x1000>;
320 interrupts = <0 33 0>; 322 interrupts = <0 33 0>;
321 clocks = <&clock 473>; 323 clocks = <&clock CLK_MDMA0>;
322 clock-names = "apb_pclk"; 324 clock-names = "apb_pclk";
323 #dma-cells = <1>; 325 #dma-cells = <1>;
324 #dma-channels = <8>; 326 #dma-channels = <8>;
@@ -329,7 +331,7 @@
329 compatible = "arm,pl330", "arm,primecell"; 331 compatible = "arm,pl330", "arm,primecell";
330 reg = <0x11C10000 0x1000>; 332 reg = <0x11C10000 0x1000>;
331 interrupts = <0 124 0>; 333 interrupts = <0 124 0>;
332 clocks = <&clock 442>; 334 clocks = <&clock CLK_MDMA1>;
333 clock-names = "apb_pclk"; 335 clock-names = "apb_pclk";
334 #dma-cells = <1>; 336 #dma-cells = <1>;
335 #dma-channels = <8>; 337 #dma-channels = <8>;
@@ -360,7 +362,7 @@
360 dmas = <&pdma1 12 362 dmas = <&pdma1 12
361 &pdma1 11>; 363 &pdma1 11>;
362 dma-names = "tx", "rx"; 364 dma-names = "tx", "rx";
363 clocks = <&clock 275>, <&clock 138>; 365 clocks = <&clock CLK_I2S1>, <&clock CLK_SCLK_I2S1>;
364 clock-names = "iis", "i2s_opclk0"; 366 clock-names = "iis", "i2s_opclk0";
365 pinctrl-names = "default"; 367 pinctrl-names = "default";
366 pinctrl-0 = <&i2s1_bus>; 368 pinctrl-0 = <&i2s1_bus>;
@@ -373,7 +375,7 @@
373 dmas = <&pdma0 12 375 dmas = <&pdma0 12
374 &pdma0 11>; 376 &pdma0 11>;
375 dma-names = "tx", "rx"; 377 dma-names = "tx", "rx";
376 clocks = <&clock 276>, <&clock 139>; 378 clocks = <&clock CLK_I2S2>, <&clock CLK_SCLK_I2S2>;
377 clock-names = "iis", "i2s_opclk0"; 379 clock-names = "iis", "i2s_opclk0";
378 pinctrl-names = "default"; 380 pinctrl-names = "default";
379 pinctrl-0 = <&i2s2_bus>; 381 pinctrl-0 = <&i2s2_bus>;
@@ -391,7 +393,7 @@
391 #size-cells = <0>; 393 #size-cells = <0>;
392 pinctrl-names = "default"; 394 pinctrl-names = "default";
393 pinctrl-0 = <&spi0_bus>; 395 pinctrl-0 = <&spi0_bus>;
394 clocks = <&clock 271>, <&clock 135>; 396 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
395 clock-names = "spi", "spi_busclk0"; 397 clock-names = "spi", "spi_busclk0";
396 status = "disabled"; 398 status = "disabled";
397 }; 399 };
@@ -407,7 +409,7 @@
407 #size-cells = <0>; 409 #size-cells = <0>;
408 pinctrl-names = "default"; 410 pinctrl-names = "default";
409 pinctrl-0 = <&spi1_bus>; 411 pinctrl-0 = <&spi1_bus>;
410 clocks = <&clock 272>, <&clock 136>; 412 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
411 clock-names = "spi", "spi_busclk0"; 413 clock-names = "spi", "spi_busclk0";
412 status = "disabled"; 414 status = "disabled";
413 }; 415 };
@@ -423,28 +425,28 @@
423 #size-cells = <0>; 425 #size-cells = <0>;
424 pinctrl-names = "default"; 426 pinctrl-names = "default";
425 pinctrl-0 = <&spi2_bus>; 427 pinctrl-0 = <&spi2_bus>;
426 clocks = <&clock 273>, <&clock 137>; 428 clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
427 clock-names = "spi", "spi_busclk0"; 429 clock-names = "spi", "spi_busclk0";
428 status = "disabled"; 430 status = "disabled";
429 }; 431 };
430 432
431 serial@12C00000 { 433 serial@12C00000 {
432 clocks = <&clock 257>, <&clock 128>; 434 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
433 clock-names = "uart", "clk_uart_baud0"; 435 clock-names = "uart", "clk_uart_baud0";
434 }; 436 };
435 437
436 serial@12C10000 { 438 serial@12C10000 {
437 clocks = <&clock 258>, <&clock 129>; 439 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
438 clock-names = "uart", "clk_uart_baud0"; 440 clock-names = "uart", "clk_uart_baud0";
439 }; 441 };
440 442
441 serial@12C20000 { 443 serial@12C20000 {
442 clocks = <&clock 259>, <&clock 130>; 444 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
443 clock-names = "uart", "clk_uart_baud0"; 445 clock-names = "uart", "clk_uart_baud0";
444 }; 446 };
445 447
446 serial@12C30000 { 448 serial@12C30000 {
447 clocks = <&clock 260>, <&clock 131>; 449 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
448 clock-names = "uart", "clk_uart_baud0"; 450 clock-names = "uart", "clk_uart_baud0";
449 }; 451 };
450 452
@@ -453,7 +455,7 @@
453 reg = <0x12dd0000 0x100>; 455 reg = <0x12dd0000 0x100>;
454 samsung,pwm-outputs = <0>, <1>, <2>, <3>; 456 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
455 #pwm-cells = <3>; 457 #pwm-cells = <3>;
456 clocks = <&clock 279>; 458 clocks = <&clock CLK_PWM>;
457 clock-names = "timers"; 459 clock-names = "timers";
458 }; 460 };
459 461
@@ -464,7 +466,7 @@
464 }; 466 };
465 467
466 dp-controller@145B0000 { 468 dp-controller@145B0000 {
467 clocks = <&clock 412>; 469 clocks = <&clock CLK_DP1>;
468 clock-names = "dp"; 470 clock-names = "dp";
469 phys = <&dp_phy>; 471 phys = <&dp_phy>;
470 phy-names = "dp"; 472 phy-names = "dp";
@@ -472,7 +474,7 @@
472 474
473 fimd@14400000 { 475 fimd@14400000 {
474 samsung,power-domain = <&disp_pd>; 476 samsung,power-domain = <&disp_pd>;
475 clocks = <&clock 147>, <&clock 421>; 477 clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
476 clock-names = "sclk_fimd", "fimd"; 478 clock-names = "sclk_fimd", "fimd";
477 }; 479 };
478 480
@@ -480,7 +482,7 @@
480 compatible = "samsung,exynos-adc-v2"; 482 compatible = "samsung,exynos-adc-v2";
481 reg = <0x12D10000 0x100>, <0x10040720 0x4>; 483 reg = <0x12D10000 0x100>, <0x10040720 0x4>;
482 interrupts = <0 106 0>; 484 interrupts = <0 106 0>;
483 clocks = <&clock 270>; 485 clocks = <&clock CLK_TSADC>;
484 clock-names = "adc"; 486 clock-names = "adc";
485 #io-channel-cells = <1>; 487 #io-channel-cells = <1>;
486 io-channel-ranges; 488 io-channel-ranges;
@@ -493,7 +495,7 @@
493 interrupts = <0 56 0>; 495 interrupts = <0 56 0>;
494 #address-cells = <1>; 496 #address-cells = <1>;
495 #size-cells = <0>; 497 #size-cells = <0>;
496 clocks = <&clock 261>; 498 clocks = <&clock CLK_I2C0>;
497 clock-names = "i2c"; 499 clock-names = "i2c";
498 pinctrl-names = "default"; 500 pinctrl-names = "default";
499 pinctrl-0 = <&i2c0_bus>; 501 pinctrl-0 = <&i2c0_bus>;
@@ -506,7 +508,7 @@
506 interrupts = <0 57 0>; 508 interrupts = <0 57 0>;
507 #address-cells = <1>; 509 #address-cells = <1>;
508 #size-cells = <0>; 510 #size-cells = <0>;
509 clocks = <&clock 262>; 511 clocks = <&clock CLK_I2C1>;
510 clock-names = "i2c"; 512 clock-names = "i2c";
511 pinctrl-names = "default"; 513 pinctrl-names = "default";
512 pinctrl-0 = <&i2c1_bus>; 514 pinctrl-0 = <&i2c1_bus>;
@@ -519,7 +521,7 @@
519 interrupts = <0 58 0>; 521 interrupts = <0 58 0>;
520 #address-cells = <1>; 522 #address-cells = <1>;
521 #size-cells = <0>; 523 #size-cells = <0>;
522 clocks = <&clock 263>; 524 clocks = <&clock CLK_I2C2>;
523 clock-names = "i2c"; 525 clock-names = "i2c";
524 pinctrl-names = "default"; 526 pinctrl-names = "default";
525 pinctrl-0 = <&i2c2_bus>; 527 pinctrl-0 = <&i2c2_bus>;
@@ -532,7 +534,7 @@
532 interrupts = <0 59 0>; 534 interrupts = <0 59 0>;
533 #address-cells = <1>; 535 #address-cells = <1>;
534 #size-cells = <0>; 536 #size-cells = <0>;
535 clocks = <&clock 264>; 537 clocks = <&clock CLK_I2C3>;
536 clock-names = "i2c"; 538 clock-names = "i2c";
537 pinctrl-names = "default"; 539 pinctrl-names = "default";
538 pinctrl-0 = <&i2c3_bus>; 540 pinctrl-0 = <&i2c3_bus>;
@@ -547,7 +549,7 @@
547 #size-cells = <0>; 549 #size-cells = <0>;
548 pinctrl-names = "default"; 550 pinctrl-names = "default";
549 pinctrl-0 = <&i2c4_hs_bus>; 551 pinctrl-0 = <&i2c4_hs_bus>;
550 clocks = <&clock 265>; 552 clocks = <&clock CLK_I2C4>;
551 clock-names = "hsi2c"; 553 clock-names = "hsi2c";
552 status = "disabled"; 554 status = "disabled";
553 }; 555 };
@@ -560,7 +562,7 @@
560 #size-cells = <0>; 562 #size-cells = <0>;
561 pinctrl-names = "default"; 563 pinctrl-names = "default";
562 pinctrl-0 = <&i2c5_hs_bus>; 564 pinctrl-0 = <&i2c5_hs_bus>;
563 clocks = <&clock 266>; 565 clocks = <&clock CLK_I2C5>;
564 clock-names = "hsi2c"; 566 clock-names = "hsi2c";
565 status = "disabled"; 567 status = "disabled";
566 }; 568 };
@@ -573,7 +575,7 @@
573 #size-cells = <0>; 575 #size-cells = <0>;
574 pinctrl-names = "default"; 576 pinctrl-names = "default";
575 pinctrl-0 = <&i2c6_hs_bus>; 577 pinctrl-0 = <&i2c6_hs_bus>;
576 clocks = <&clock 267>; 578 clocks = <&clock CLK_I2C6>;
577 clock-names = "hsi2c"; 579 clock-names = "hsi2c";
578 status = "disabled"; 580 status = "disabled";
579 }; 581 };
@@ -586,7 +588,7 @@
586 #size-cells = <0>; 588 #size-cells = <0>;
587 pinctrl-names = "default"; 589 pinctrl-names = "default";
588 pinctrl-0 = <&i2c7_hs_bus>; 590 pinctrl-0 = <&i2c7_hs_bus>;
589 clocks = <&clock 268>; 591 clocks = <&clock CLK_I2C7>;
590 clock-names = "hsi2c"; 592 clock-names = "hsi2c";
591 status = "disabled"; 593 status = "disabled";
592 }; 594 };
@@ -599,7 +601,7 @@
599 #size-cells = <0>; 601 #size-cells = <0>;
600 pinctrl-names = "default"; 602 pinctrl-names = "default";
601 pinctrl-0 = <&i2c8_hs_bus>; 603 pinctrl-0 = <&i2c8_hs_bus>;
602 clocks = <&clock 281>; 604 clocks = <&clock CLK_I2C8>;
603 clock-names = "hsi2c"; 605 clock-names = "hsi2c";
604 status = "disabled"; 606 status = "disabled";
605 }; 607 };
@@ -612,7 +614,7 @@
612 #size-cells = <0>; 614 #size-cells = <0>;
613 pinctrl-names = "default"; 615 pinctrl-names = "default";
614 pinctrl-0 = <&i2c9_hs_bus>; 616 pinctrl-0 = <&i2c9_hs_bus>;
615 clocks = <&clock 282>; 617 clocks = <&clock CLK_I2C9>;
616 clock-names = "hsi2c"; 618 clock-names = "hsi2c";
617 status = "disabled"; 619 status = "disabled";
618 }; 620 };
@@ -625,7 +627,7 @@
625 #size-cells = <0>; 627 #size-cells = <0>;
626 pinctrl-names = "default"; 628 pinctrl-names = "default";
627 pinctrl-0 = <&i2c10_hs_bus>; 629 pinctrl-0 = <&i2c10_hs_bus>;
628 clocks = <&clock 283>; 630 clocks = <&clock CLK_I2C10>;
629 clock-names = "hsi2c"; 631 clock-names = "hsi2c";
630 status = "disabled"; 632 status = "disabled";
631 }; 633 };
@@ -634,8 +636,9 @@
634 compatible = "samsung,exynos4212-hdmi"; 636 compatible = "samsung,exynos4212-hdmi";
635 reg = <0x14530000 0x70000>; 637 reg = <0x14530000 0x70000>;
636 interrupts = <0 95 0>; 638 interrupts = <0 95 0>;
637 clocks = <&clock 413>, <&clock 143>, <&clock 768>, 639 clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
638 <&clock 158>, <&clock 640>; 640 <&clock CLK_DOUT_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
641 <&clock CLK_MOUT_HDMI>;
639 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", 642 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
640 "sclk_hdmiphy", "mout_hdmi"; 643 "sclk_hdmiphy", "mout_hdmi";
641 status = "disabled"; 644 status = "disabled";
@@ -645,7 +648,7 @@
645 compatible = "samsung,exynos5420-mixer"; 648 compatible = "samsung,exynos5420-mixer";
646 reg = <0x14450000 0x10000>; 649 reg = <0x14450000 0x10000>;
647 interrupts = <0 94 0>; 650 interrupts = <0 94 0>;
648 clocks = <&clock 431>, <&clock 143>; 651 clocks = <&clock CLK_MIXER>, <&clock CLK_SCLK_HDMI>;
649 clock-names = "mixer", "sclk_hdmi"; 652 clock-names = "mixer", "sclk_hdmi";
650 }; 653 };
651 654
@@ -653,7 +656,7 @@
653 compatible = "samsung,exynos5-gsc"; 656 compatible = "samsung,exynos5-gsc";
654 reg = <0x13e00000 0x1000>; 657 reg = <0x13e00000 0x1000>;
655 interrupts = <0 85 0>; 658 interrupts = <0 85 0>;
656 clocks = <&clock 465>; 659 clocks = <&clock CLK_GSCL0>;
657 clock-names = "gscl"; 660 clock-names = "gscl";
658 samsung,power-domain = <&gsc_pd>; 661 samsung,power-domain = <&gsc_pd>;
659 }; 662 };
@@ -662,7 +665,7 @@
662 compatible = "samsung,exynos5-gsc"; 665 compatible = "samsung,exynos5-gsc";
663 reg = <0x13e10000 0x1000>; 666 reg = <0x13e10000 0x1000>;
664 interrupts = <0 86 0>; 667 interrupts = <0 86 0>;
665 clocks = <&clock 466>; 668 clocks = <&clock CLK_GSCL1>;
666 clock-names = "gscl"; 669 clock-names = "gscl";
667 samsung,power-domain = <&gsc_pd>; 670 samsung,power-domain = <&gsc_pd>;
668 }; 671 };
@@ -676,7 +679,7 @@
676 compatible = "samsung,exynos5420-tmu"; 679 compatible = "samsung,exynos5420-tmu";
677 reg = <0x10060000 0x100>; 680 reg = <0x10060000 0x100>;
678 interrupts = <0 65 0>; 681 interrupts = <0 65 0>;
679 clocks = <&clock 318>; 682 clocks = <&clock CLK_TMU>;
680 clock-names = "tmu_apbif"; 683 clock-names = "tmu_apbif";
681 }; 684 };
682 685
@@ -684,7 +687,7 @@
684 compatible = "samsung,exynos5420-tmu"; 687 compatible = "samsung,exynos5420-tmu";
685 reg = <0x10064000 0x100>; 688 reg = <0x10064000 0x100>;
686 interrupts = <0 183 0>; 689 interrupts = <0 183 0>;
687 clocks = <&clock 318>; 690 clocks = <&clock CLK_TMU>;
688 clock-names = "tmu_apbif"; 691 clock-names = "tmu_apbif";
689 }; 692 };
690 693
@@ -692,7 +695,7 @@
692 compatible = "samsung,exynos5420-tmu-ext-triminfo"; 695 compatible = "samsung,exynos5420-tmu-ext-triminfo";
693 reg = <0x10068000 0x100>, <0x1006c000 0x4>; 696 reg = <0x10068000 0x100>, <0x1006c000 0x4>;
694 interrupts = <0 184 0>; 697 interrupts = <0 184 0>;
695 clocks = <&clock 318>, <&clock 318>; 698 clocks = <&clock CLK_TMU>, <&clock CLK_TMU>;
696 clock-names = "tmu_apbif", "tmu_triminfo_apbif"; 699 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
697 }; 700 };
698 701
@@ -700,7 +703,7 @@
700 compatible = "samsung,exynos5420-tmu-ext-triminfo"; 703 compatible = "samsung,exynos5420-tmu-ext-triminfo";
701 reg = <0x1006c000 0x100>, <0x100a0000 0x4>; 704 reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
702 interrupts = <0 185 0>; 705 interrupts = <0 185 0>;
703 clocks = <&clock 318>, <&clock 319>; 706 clocks = <&clock CLK_TMU>, <&clock CLK_TMU_GPU>;
704 clock-names = "tmu_apbif", "tmu_triminfo_apbif"; 707 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
705 }; 708 };
706 709
@@ -708,7 +711,7 @@
708 compatible = "samsung,exynos5420-tmu-ext-triminfo"; 711 compatible = "samsung,exynos5420-tmu-ext-triminfo";
709 reg = <0x100a0000 0x100>, <0x10068000 0x4>; 712 reg = <0x100a0000 0x100>, <0x10068000 0x4>;
710 interrupts = <0 215 0>; 713 interrupts = <0 215 0>;
711 clocks = <&clock 319>, <&clock 318>; 714 clocks = <&clock CLK_TMU_GPU>, <&clock CLK_TMU>;
712 clock-names = "tmu_apbif", "tmu_triminfo_apbif"; 715 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
713 }; 716 };
714 717
@@ -716,7 +719,7 @@
716 compatible = "samsung,exynos5420-wdt"; 719 compatible = "samsung,exynos5420-wdt";
717 reg = <0x101D0000 0x100>; 720 reg = <0x101D0000 0x100>;
718 interrupts = <0 42 0>; 721 interrupts = <0 42 0>;
719 clocks = <&clock 316>; 722 clocks = <&clock CLK_WDT>;
720 clock-names = "watchdog"; 723 clock-names = "watchdog";
721 samsung,syscon-phandle = <&pmu_system_controller>; 724 samsung,syscon-phandle = <&pmu_system_controller>;
722 }; 725 };
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-22 07:14:34 -0400