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authorPhilipp Zabel <p.zabel@pengutronix.de>2015-02-11 12:50:09 -0500
committerThierry Reding <treding@nvidia.com>2015-04-02 13:04:15 -0400
commit1c550fa193d08920255240743f57731d4d57cd4d (patch)
tree6ebc8a5b3fd21a289c0377818410d65ac6242494
parent9df6d49adb4eecc50538e56c0bb0ccdcaae8c697 (diff)
drm/panel: Add support for Ampire AM-800480R3TMQW-A1H 800x480 7" panel
This adds support for the AM-800480R3TMQW-A1H 7" 800x480 panel to the DRM simple panel driver. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
-rw-r--r--Documentation/devicetree/bindings/panel/ampire,am800480r3tmqwa1h.txt7
-rw-r--r--drivers/gpu/drm/panel/panel-simple.c28
2 files changed, 35 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/panel/ampire,am800480r3tmqwa1h.txt b/Documentation/devicetree/bindings/panel/ampire,am800480r3tmqwa1h.txt
new file mode 100644
index 000000000000..83e2cae1cc1b
--- /dev/null
+++ b/Documentation/devicetree/bindings/panel/ampire,am800480r3tmqwa1h.txt
@@ -0,0 +1,7 @@
1Ampire AM-800480R3TMQW-A1H 7.0" WVGA TFT LCD panel
2
3Required properties:
4- compatible: should be "ampire,am800480r3tmqwa1h"
5
6This binding is compatible with the simple-panel binding, which is specified
7in simple-panel.txt in this directory.
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index 6ad7b5e00178..30904a9b2a4c 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -369,6 +369,31 @@ static void panel_simple_shutdown(struct device *dev)
369 panel_simple_disable(&panel->base); 369 panel_simple_disable(&panel->base);
370} 370}
371 371
372static const struct drm_display_mode ampire_am800480r3tmqwa1h_mode = {
373 .clock = 33333,
374 .hdisplay = 800,
375 .hsync_start = 800 + 0,
376 .hsync_end = 800 + 0 + 255,
377 .htotal = 800 + 0 + 255 + 0,
378 .vdisplay = 480,
379 .vsync_start = 480 + 2,
380 .vsync_end = 480 + 2 + 45,
381 .vtotal = 480 + 2 + 45 + 0,
382 .vrefresh = 60,
383 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
384};
385
386static const struct panel_desc ampire_am800480r3tmqwa1h = {
387 .modes = &ampire_am800480r3tmqwa1h_mode,
388 .num_modes = 1,
389 .bpc = 6,
390 .size = {
391 .width = 152,
392 .height = 91,
393 },
394 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
395};
396
372static const struct drm_display_mode auo_b101aw03_mode = { 397static const struct drm_display_mode auo_b101aw03_mode = {
373 .clock = 51450, 398 .clock = 51450,
374 .hdisplay = 1024, 399 .hdisplay = 1024,
@@ -965,6 +990,9 @@ static const struct panel_desc shelly_sca07010_bfn_lnn = {
965 990
966static const struct of_device_id platform_of_match[] = { 991static const struct of_device_id platform_of_match[] = {
967 { 992 {
993 .compatible = "ampire,am800480r3tmqwa1h",
994 .data = &ampire_am800480r3tmqwa1h,
995 }, {
968 .compatible = "auo,b101aw03", 996 .compatible = "auo,b101aw03",
969 .data = &auo_b101aw03, 997 .data = &auo_b101aw03,
970 }, { 998 }, {