diff options
author | Hyunwoong Kim <khw0178.kim@samsung.com> | 2010-12-21 22:56:05 -0500 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2011-03-21 19:31:39 -0400 |
commit | 10038bea7a729bcb8c51a2c856f5b58b33646d65 (patch) | |
tree | d0a71cc5c53961fbea0aea2975fe3f38bfd12cf6 | |
parent | a25be18dfb6e1b172498a9f6c9793d67057000b0 (diff) |
[media] s5p-fimc: fix the value of YUV422 1-plane formats
Some color formats are mismatched in s5p-fimc driver.
CIOCTRL[1:0], order422_out, should be set 2b'00 not 2b'11
to use V4L2_PIX_FMT_YUYV. Because in V4L2 standard V4L2_PIX_FMT_YUYV means
"start + 0: Y'00 Cb00 Y'01 Cr00 Y'02 Cb01 Y'03 Cr01". According to datasheet
2b'00 is right value for V4L2_PIX_FMT_YUYV.
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
-rw-r--r-- | drivers/media/video/s5p-fimc/fimc-core.c | 16 | ||||
-rw-r--r-- | drivers/media/video/s5p-fimc/fimc-core.h | 12 | ||||
-rw-r--r-- | drivers/media/video/s5p-fimc/regs-fimc.h | 12 |
3 files changed, 14 insertions, 26 deletions
diff --git a/drivers/media/video/s5p-fimc/fimc-core.c b/drivers/media/video/s5p-fimc/fimc-core.c index db249e6c355d..70d6b4c9760f 100644 --- a/drivers/media/video/s5p-fimc/fimc-core.c +++ b/drivers/media/video/s5p-fimc/fimc-core.c | |||
@@ -450,34 +450,34 @@ static void fimc_set_yuv_order(struct fimc_ctx *ctx) | |||
450 | /* Set order for 1 plane input formats. */ | 450 | /* Set order for 1 plane input formats. */ |
451 | switch (ctx->s_frame.fmt->color) { | 451 | switch (ctx->s_frame.fmt->color) { |
452 | case S5P_FIMC_YCRYCB422: | 452 | case S5P_FIMC_YCRYCB422: |
453 | ctx->in_order_1p = S5P_FIMC_IN_YCRYCB; | 453 | ctx->in_order_1p = S5P_MSCTRL_ORDER422_CBYCRY; |
454 | break; | 454 | break; |
455 | case S5P_FIMC_CBYCRY422: | 455 | case S5P_FIMC_CBYCRY422: |
456 | ctx->in_order_1p = S5P_FIMC_IN_CBYCRY; | 456 | ctx->in_order_1p = S5P_MSCTRL_ORDER422_YCRYCB; |
457 | break; | 457 | break; |
458 | case S5P_FIMC_CRYCBY422: | 458 | case S5P_FIMC_CRYCBY422: |
459 | ctx->in_order_1p = S5P_FIMC_IN_CRYCBY; | 459 | ctx->in_order_1p = S5P_MSCTRL_ORDER422_YCBYCR; |
460 | break; | 460 | break; |
461 | case S5P_FIMC_YCBYCR422: | 461 | case S5P_FIMC_YCBYCR422: |
462 | default: | 462 | default: |
463 | ctx->in_order_1p = S5P_FIMC_IN_YCBYCR; | 463 | ctx->in_order_1p = S5P_MSCTRL_ORDER422_CRYCBY; |
464 | break; | 464 | break; |
465 | } | 465 | } |
466 | dbg("ctx->in_order_1p= %d", ctx->in_order_1p); | 466 | dbg("ctx->in_order_1p= %d", ctx->in_order_1p); |
467 | 467 | ||
468 | switch (ctx->d_frame.fmt->color) { | 468 | switch (ctx->d_frame.fmt->color) { |
469 | case S5P_FIMC_YCRYCB422: | 469 | case S5P_FIMC_YCRYCB422: |
470 | ctx->out_order_1p = S5P_FIMC_OUT_YCRYCB; | 470 | ctx->out_order_1p = S5P_CIOCTRL_ORDER422_CBYCRY; |
471 | break; | 471 | break; |
472 | case S5P_FIMC_CBYCRY422: | 472 | case S5P_FIMC_CBYCRY422: |
473 | ctx->out_order_1p = S5P_FIMC_OUT_CBYCRY; | 473 | ctx->out_order_1p = S5P_CIOCTRL_ORDER422_YCRYCB; |
474 | break; | 474 | break; |
475 | case S5P_FIMC_CRYCBY422: | 475 | case S5P_FIMC_CRYCBY422: |
476 | ctx->out_order_1p = S5P_FIMC_OUT_CRYCBY; | 476 | ctx->out_order_1p = S5P_CIOCTRL_ORDER422_YCBYCR; |
477 | break; | 477 | break; |
478 | case S5P_FIMC_YCBYCR422: | 478 | case S5P_FIMC_YCBYCR422: |
479 | default: | 479 | default: |
480 | ctx->out_order_1p = S5P_FIMC_OUT_YCBYCR; | 480 | ctx->out_order_1p = S5P_CIOCTRL_ORDER422_CRYCBY; |
481 | break; | 481 | break; |
482 | } | 482 | } |
483 | dbg("ctx->out_order_1p= %d", ctx->out_order_1p); | 483 | dbg("ctx->out_order_1p= %d", ctx->out_order_1p); |
diff --git a/drivers/media/video/s5p-fimc/fimc-core.h b/drivers/media/video/s5p-fimc/fimc-core.h index 1c6aa6924550..562d15d7059a 100644 --- a/drivers/media/video/s5p-fimc/fimc-core.h +++ b/drivers/media/video/s5p-fimc/fimc-core.h | |||
@@ -99,18 +99,6 @@ enum fimc_color_fmt { | |||
99 | 99 | ||
100 | #define fimc_fmt_is_rgb(x) ((x) & 0x10) | 100 | #define fimc_fmt_is_rgb(x) ((x) & 0x10) |
101 | 101 | ||
102 | /* Y/Cb/Cr components order at DMA output for 1 plane YCbCr 4:2:2 formats. */ | ||
103 | #define S5P_FIMC_OUT_CRYCBY S5P_CIOCTRL_ORDER422_CRYCBY | ||
104 | #define S5P_FIMC_OUT_CBYCRY S5P_CIOCTRL_ORDER422_YCRYCB | ||
105 | #define S5P_FIMC_OUT_YCRYCB S5P_CIOCTRL_ORDER422_CBYCRY | ||
106 | #define S5P_FIMC_OUT_YCBYCR S5P_CIOCTRL_ORDER422_YCBYCR | ||
107 | |||
108 | /* Input Y/Cb/Cr components order for 1 plane YCbCr 4:2:2 color formats. */ | ||
109 | #define S5P_FIMC_IN_CRYCBY S5P_MSCTRL_ORDER422_CRYCBY | ||
110 | #define S5P_FIMC_IN_CBYCRY S5P_MSCTRL_ORDER422_YCRYCB | ||
111 | #define S5P_FIMC_IN_YCRYCB S5P_MSCTRL_ORDER422_CBYCRY | ||
112 | #define S5P_FIMC_IN_YCBYCR S5P_MSCTRL_ORDER422_YCBYCR | ||
113 | |||
114 | /* Cb/Cr chrominance components order for 2 plane Y/CbCr 4:2:2 formats. */ | 102 | /* Cb/Cr chrominance components order for 2 plane Y/CbCr 4:2:2 formats. */ |
115 | #define S5P_FIMC_LSB_CRCB S5P_CIOCTRL_ORDER422_2P_LSB_CRCB | 103 | #define S5P_FIMC_LSB_CRCB S5P_CIOCTRL_ORDER422_2P_LSB_CRCB |
116 | 104 | ||
diff --git a/drivers/media/video/s5p-fimc/regs-fimc.h b/drivers/media/video/s5p-fimc/regs-fimc.h index 74ca705df765..fe19b4b0fb6a 100644 --- a/drivers/media/video/s5p-fimc/regs-fimc.h +++ b/drivers/media/video/s5p-fimc/regs-fimc.h | |||
@@ -98,8 +98,8 @@ | |||
98 | #define S5P_CIOCTRL 0x4c | 98 | #define S5P_CIOCTRL 0x4c |
99 | #define S5P_CIOCTRL_ORDER422_MASK (3 << 0) | 99 | #define S5P_CIOCTRL_ORDER422_MASK (3 << 0) |
100 | #define S5P_CIOCTRL_ORDER422_CRYCBY (0 << 0) | 100 | #define S5P_CIOCTRL_ORDER422_CRYCBY (0 << 0) |
101 | #define S5P_CIOCTRL_ORDER422_YCRYCB (1 << 0) | 101 | #define S5P_CIOCTRL_ORDER422_CBYCRY (1 << 0) |
102 | #define S5P_CIOCTRL_ORDER422_CBYCRY (2 << 0) | 102 | #define S5P_CIOCTRL_ORDER422_YCRYCB (2 << 0) |
103 | #define S5P_CIOCTRL_ORDER422_YCBYCR (3 << 0) | 103 | #define S5P_CIOCTRL_ORDER422_YCBYCR (3 << 0) |
104 | #define S5P_CIOCTRL_LASTIRQ_ENABLE (1 << 2) | 104 | #define S5P_CIOCTRL_LASTIRQ_ENABLE (1 << 2) |
105 | #define S5P_CIOCTRL_YCBCR_3PLANE (0 << 3) | 105 | #define S5P_CIOCTRL_YCBCR_3PLANE (0 << 3) |
@@ -223,10 +223,10 @@ | |||
223 | #define S5P_MSCTRL_FLIP_Y_MIRROR (2 << 13) | 223 | #define S5P_MSCTRL_FLIP_Y_MIRROR (2 << 13) |
224 | #define S5P_MSCTRL_FLIP_180 (3 << 13) | 224 | #define S5P_MSCTRL_FLIP_180 (3 << 13) |
225 | #define S5P_MSCTRL_ORDER422_SHIFT 4 | 225 | #define S5P_MSCTRL_ORDER422_SHIFT 4 |
226 | #define S5P_MSCTRL_ORDER422_CRYCBY (0 << 4) | 226 | #define S5P_MSCTRL_ORDER422_YCBYCR (0 << 4) |
227 | #define S5P_MSCTRL_ORDER422_YCRYCB (1 << 4) | 227 | #define S5P_MSCTRL_ORDER422_CBYCRY (1 << 4) |
228 | #define S5P_MSCTRL_ORDER422_CBYCRY (2 << 4) | 228 | #define S5P_MSCTRL_ORDER422_YCRYCB (2 << 4) |
229 | #define S5P_MSCTRL_ORDER422_YCBYCR (3 << 4) | 229 | #define S5P_MSCTRL_ORDER422_CRYCBY (3 << 4) |
230 | #define S5P_MSCTRL_ORDER422_MASK (3 << 4) | 230 | #define S5P_MSCTRL_ORDER422_MASK (3 << 4) |
231 | #define S5P_MSCTRL_INPUT_EXTCAM (0 << 3) | 231 | #define S5P_MSCTRL_INPUT_EXTCAM (0 << 3) |
232 | #define S5P_MSCTRL_INPUT_MEMORY (1 << 3) | 232 | #define S5P_MSCTRL_INPUT_MEMORY (1 << 3) |