aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorMagnus Damm <damm@opensource.se>2011-06-30 05:22:50 -0400
committerPaul Mundt <lethal@linux-sh.org>2011-07-11 02:11:35 -0400
commit0ed61fc9da59ea45d56a6928653691cef14bab9b (patch)
tree9a1cf3e376edd04a12c9e556e2ffe63960bab31f
parente3bbfa78bab125f58b831b5f7f45b5a305091d72 (diff)
ARM: mach-shmobile: Use CMT2 for timer on sh7372
Switch the sh7372 CPU support to use CMT2 instead of CMT1 for system timer. CMT1 is located in the A3SP power domain while CMT2 is located in the always-on power domain C5. This improves our PM situation - with CMT2 as timer we can power down A3SP and still access the timer. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r--arch/arm/mach-shmobile/clock-sh7372.c8
-rw-r--r--arch/arm/mach-shmobile/setup-sh7372.c30
2 files changed, 19 insertions, 19 deletions
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index c0800d83971e..7fb1d2e52540 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -511,8 +511,8 @@ enum { MSTP001,
511 MSTP223, 511 MSTP223,
512 MSTP218, MSTP217, MSTP216, 512 MSTP218, MSTP217, MSTP216,
513 MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, 513 MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
514 MSTP329, MSTP328, MSTP323, MSTP322, MSTP314, MSTP313, MSTP312, 514 MSTP328, MSTP323, MSTP322, MSTP314, MSTP313, MSTP312,
515 MSTP423, MSTP415, MSTP413, MSTP411, MSTP410, MSTP406, MSTP403, 515 MSTP423, MSTP415, MSTP413, MSTP411, MSTP410, MSTP406, MSTP403, MSTP400,
516 MSTP_NR }; 516 MSTP_NR };
517 517
518#define MSTP(_parent, _reg, _bit, _flags) \ 518#define MSTP(_parent, _reg, _bit, _flags) \
@@ -545,7 +545,6 @@ static struct clk mstp_clks[MSTP_NR] = {
545 [MSTP202] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 2, 0), /* SCIFA2 */ 545 [MSTP202] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 2, 0), /* SCIFA2 */
546 [MSTP201] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 1, 0), /* SCIFA3 */ 546 [MSTP201] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 1, 0), /* SCIFA3 */
547 [MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */ 547 [MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */
548 [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
549 [MSTP328] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR3, 28, 0), /* FSI2 */ 548 [MSTP328] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR3, 28, 0), /* FSI2 */
550 [MSTP323] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 23, 0), /* IIC1 */ 549 [MSTP323] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 23, 0), /* IIC1 */
551 [MSTP322] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 22, 0), /* USB0 */ 550 [MSTP322] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 22, 0), /* USB0 */
@@ -559,6 +558,7 @@ static struct clk mstp_clks[MSTP_NR] = {
559 [MSTP410] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR4, 10, 0), /* IIC4 */ 558 [MSTP410] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR4, 10, 0), /* IIC4 */
560 [MSTP406] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR4, 6, 0), /* USB1 */ 559 [MSTP406] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR4, 6, 0), /* USB1 */
561 [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */ 560 [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */
561 [MSTP400] = MSTP(&r_clk, SMSTPCR4, 0, 0), /* CMT2 */
562}; 562};
563 563
564#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk } 564#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
@@ -640,7 +640,6 @@ static struct clk_lookup lookups[] = {
640 CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP202]), /* SCIFA2 */ 640 CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP202]), /* SCIFA2 */
641 CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]), /* SCIFA3 */ 641 CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]), /* SCIFA3 */
642 CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */ 642 CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */
643 CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
644 CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI2 */ 643 CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI2 */
645 CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */ 644 CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */
646 CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP322]), /* USB0 */ 645 CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP322]), /* USB0 */
@@ -658,6 +657,7 @@ static struct clk_lookup lookups[] = {
658 CLKDEV_DEV_ID("r8a66597_udc.1", &mstp_clks[MSTP406]), /* USB1 */ 657 CLKDEV_DEV_ID("r8a66597_udc.1", &mstp_clks[MSTP406]), /* USB1 */
659 CLKDEV_DEV_ID("renesas_usbhs.1", &mstp_clks[MSTP406]), /* USB1 */ 658 CLKDEV_DEV_ID("renesas_usbhs.1", &mstp_clks[MSTP406]), /* USB1 */
660 CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */ 659 CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */
660 CLKDEV_DEV_ID("sh_cmt.2", &mstp_clks[MSTP400]), /* CMT2 */
661 661
662 CLKDEV_ICK_ID("ick", "sh-mobile-hdmi", &div6_reparent_clks[DIV6_HDMI]), 662 CLKDEV_ICK_ID("ick", "sh-mobile-hdmi", &div6_reparent_clks[DIV6_HDMI]),
663 CLKDEV_ICK_ID("icka", "sh_fsi2", &div6_reparent_clks[DIV6_FSIA]), 663 CLKDEV_ICK_ID("icka", "sh_fsi2", &div6_reparent_clks[DIV6_FSIA]),
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index cd807eea69e2..cb8ac7845245 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -169,35 +169,35 @@ static struct platform_device scif6_device = {
169}; 169};
170 170
171/* CMT */ 171/* CMT */
172static struct sh_timer_config cmt10_platform_data = { 172static struct sh_timer_config cmt2_platform_data = {
173 .name = "CMT10", 173 .name = "CMT2",
174 .channel_offset = 0x10, 174 .channel_offset = 0x40,
175 .timer_bit = 0, 175 .timer_bit = 5,
176 .clockevent_rating = 125, 176 .clockevent_rating = 125,
177 .clocksource_rating = 125, 177 .clocksource_rating = 125,
178}; 178};
179 179
180static struct resource cmt10_resources[] = { 180static struct resource cmt2_resources[] = {
181 [0] = { 181 [0] = {
182 .name = "CMT10", 182 .name = "CMT2",
183 .start = 0xe6138010, 183 .start = 0xe6130040,
184 .end = 0xe613801b, 184 .end = 0xe613004b,
185 .flags = IORESOURCE_MEM, 185 .flags = IORESOURCE_MEM,
186 }, 186 },
187 [1] = { 187 [1] = {
188 .start = evt2irq(0x0b00), /* CMT1_CMT10 */ 188 .start = evt2irq(0x0b80), /* CMT2 */
189 .flags = IORESOURCE_IRQ, 189 .flags = IORESOURCE_IRQ,
190 }, 190 },
191}; 191};
192 192
193static struct platform_device cmt10_device = { 193static struct platform_device cmt2_device = {
194 .name = "sh_cmt", 194 .name = "sh_cmt",
195 .id = 10, 195 .id = 2,
196 .dev = { 196 .dev = {
197 .platform_data = &cmt10_platform_data, 197 .platform_data = &cmt2_platform_data,
198 }, 198 },
199 .resource = cmt10_resources, 199 .resource = cmt2_resources,
200 .num_resources = ARRAY_SIZE(cmt10_resources), 200 .num_resources = ARRAY_SIZE(cmt2_resources),
201}; 201};
202 202
203/* TMU */ 203/* TMU */
@@ -818,7 +818,7 @@ static struct platform_device *sh7372_early_devices[] __initdata = {
818 &scif4_device, 818 &scif4_device,
819 &scif5_device, 819 &scif5_device,
820 &scif6_device, 820 &scif6_device,
821 &cmt10_device, 821 &cmt2_device,
822 &tmu00_device, 822 &tmu00_device,
823 &tmu01_device, 823 &tmu01_device,
824}; 824};