diff options
author | Thierry Reding <treding@nvidia.com> | 2014-06-05 10:29:46 -0400 |
---|---|---|
committer | Thierry Reding <treding@nvidia.com> | 2014-06-09 06:02:50 -0400 |
commit | 0c90a184664abf657e3849f7e47e2e7fd1d93910 (patch) | |
tree | 73ec4f06876ade5e2ba101819204a432e81dc171 | |
parent | 899451b787eb55d51c46468aaf99367c5f3420a1 (diff) |
drm/tegra: sor - Enable only the necessary number of lanes
Instead of always enabling all four lanes, enable only the number probed
from the link.
Signed-off-by: Thierry Reding <treding@nvidia.com>
-rw-r--r-- | drivers/gpu/drm/tegra/sor.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/tegra/sor.c b/drivers/gpu/drm/tegra/sor.c index fefd26f0c751..7d2a5db72365 100644 --- a/drivers/gpu/drm/tegra/sor.c +++ b/drivers/gpu/drm/tegra/sor.c | |||
@@ -656,7 +656,7 @@ static int tegra_output_sor_enable(struct tegra_output *output) | |||
656 | 656 | ||
657 | value = tegra_sor_readl(sor, SOR_DP_LINKCTL_0); | 657 | value = tegra_sor_readl(sor, SOR_DP_LINKCTL_0); |
658 | value &= ~SOR_DP_LINKCTL_LANE_COUNT_MASK; | 658 | value &= ~SOR_DP_LINKCTL_LANE_COUNT_MASK; |
659 | value |= SOR_DP_LINKCTL_LANE_COUNT(4); | 659 | value |= SOR_DP_LINKCTL_LANE_COUNT(link.num_lanes); |
660 | tegra_sor_writel(sor, value, SOR_DP_LINKCTL_0); | 660 | tegra_sor_writel(sor, value, SOR_DP_LINKCTL_0); |
661 | 661 | ||
662 | /* start lane sequencer */ | 662 | /* start lane sequencer */ |