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authorMugunthan V N <mugunthanvnm@ti.com>2014-07-08 09:16:39 -0400
committerPaul Walmsley <paul@pwsan.com>2014-07-22 16:35:05 -0400
commit077c42f75ee309330a11d9437b4166601e4f2cd3 (patch)
tree9a6074c8d8e4488c7b42040002329dd9d3f65d07
parent8dd3eb711ecfe639306ccbe47a12bb2f2f64f4e2 (diff)
arm: dra7xx: Add hwmod data for MDIO and CPSW
Adding hwmod data for CPSW and MDIO which is present in DRA7xx SoC Cc: Rajendra Nayak <rnayak@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_7xx_data.c65
1 files changed, 65 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 559bbcbe6e06..6cf7b6ff154f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -273,6 +273,56 @@ static struct omap_hwmod dra7xx_ctrl_module_wkup_hwmod = {
273}; 273};
274 274
275/* 275/*
276 * 'gmac' class
277 * cpsw/gmac sub system
278 */
279static struct omap_hwmod_class_sysconfig dra7xx_gmac_sysc = {
280 .rev_offs = 0x0,
281 .sysc_offs = 0x8,
282 .syss_offs = 0x4,
283 .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE |
284 SYSS_HAS_RESET_STATUS),
285 .idlemodes = (SIDLE_FORCE | SIDLE_NO | MSTANDBY_FORCE |
286 MSTANDBY_NO),
287 .sysc_fields = &omap_hwmod_sysc_type3,
288};
289
290static struct omap_hwmod_class dra7xx_gmac_hwmod_class = {
291 .name = "gmac",
292 .sysc = &dra7xx_gmac_sysc,
293};
294
295static struct omap_hwmod dra7xx_gmac_hwmod = {
296 .name = "gmac",
297 .class = &dra7xx_gmac_hwmod_class,
298 .clkdm_name = "gmac_clkdm",
299 .flags = (HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY),
300 .main_clk = "dpll_gmac_ck",
301 .mpu_rt_idx = 1,
302 .prcm = {
303 .omap4 = {
304 .clkctrl_offs = DRA7XX_CM_GMAC_GMAC_CLKCTRL_OFFSET,
305 .context_offs = DRA7XX_RM_GMAC_GMAC_CONTEXT_OFFSET,
306 .modulemode = MODULEMODE_SWCTRL,
307 },
308 },
309};
310
311/*
312 * 'mdio' class
313 */
314static struct omap_hwmod_class dra7xx_mdio_hwmod_class = {
315 .name = "davinci_mdio",
316};
317
318static struct omap_hwmod dra7xx_mdio_hwmod = {
319 .name = "davinci_mdio",
320 .class = &dra7xx_mdio_hwmod_class,
321 .clkdm_name = "gmac_clkdm",
322 .main_clk = "dpll_gmac_ck",
323};
324
325/*
276 * 'dcan' class 326 * 'dcan' class
277 * 327 *
278 */ 328 */
@@ -2090,6 +2140,19 @@ static struct omap_hwmod_ocp_if dra7xx_l4_wkup__ctrl_module_wkup = {
2090 .user = OCP_USER_MPU | OCP_USER_SDMA, 2140 .user = OCP_USER_MPU | OCP_USER_SDMA,
2091}; 2141};
2092 2142
2143static struct omap_hwmod_ocp_if dra7xx_l4_per2__cpgmac0 = {
2144 .master = &dra7xx_l4_per2_hwmod,
2145 .slave = &dra7xx_gmac_hwmod,
2146 .clk = "dpll_gmac_ck",
2147 .user = OCP_USER_MPU,
2148};
2149
2150static struct omap_hwmod_ocp_if dra7xx_gmac__mdio = {
2151 .master = &dra7xx_gmac_hwmod,
2152 .slave = &dra7xx_mdio_hwmod,
2153 .user = OCP_USER_MPU,
2154};
2155
2093/* l4_wkup -> dcan1 */ 2156/* l4_wkup -> dcan1 */
2094static struct omap_hwmod_ocp_if dra7xx_l4_wkup__dcan1 = { 2157static struct omap_hwmod_ocp_if dra7xx_l4_wkup__dcan1 = {
2095 .master = &dra7xx_l4_wkup_hwmod, 2158 .master = &dra7xx_l4_wkup_hwmod,
@@ -2789,6 +2852,8 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
2789 &dra7xx_l4_wkup__ctrl_module_wkup, 2852 &dra7xx_l4_wkup__ctrl_module_wkup,
2790 &dra7xx_l4_wkup__dcan1, 2853 &dra7xx_l4_wkup__dcan1,
2791 &dra7xx_l4_per2__dcan2, 2854 &dra7xx_l4_per2__dcan2,
2855 &dra7xx_l4_per2__cpgmac0,
2856 &dra7xx_gmac__mdio,
2792 &dra7xx_l4_cfg__dma_system, 2857 &dra7xx_l4_cfg__dma_system,
2793 &dra7xx_l3_main_1__dss, 2858 &dra7xx_l3_main_1__dss,
2794 &dra7xx_l3_main_1__dispc, 2859 &dra7xx_l3_main_1__dispc,