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authorKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>2013-03-20 10:21:10 -0400
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2013-03-25 10:13:07 -0400
commit05e99c8cf9d4e53ef6e016815db40a89a6156529 (patch)
tree4c69dc3f28bb20711aa679693d002fc3d6a3d5cc
parente6f3eb29be471c4b536a91daab76d4aeda72a261 (diff)
intel-pstate: Use #defines instead of hard-coded values.
They are defined in coreboot (MSR_PLATFORM) and the other one is already defined in msr-index.h. Let's use those. Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Dirk Brandewie <dirk.j.brandewie@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
-rw-r--r--arch/x86/include/uapi/asm/msr-index.h1
-rw-r--r--drivers/cpufreq/intel_pstate.c6
2 files changed, 4 insertions, 3 deletions
diff --git a/arch/x86/include/uapi/asm/msr-index.h b/arch/x86/include/uapi/asm/msr-index.h
index 892ce40a7470..7a060f4b411f 100644
--- a/arch/x86/include/uapi/asm/msr-index.h
+++ b/arch/x86/include/uapi/asm/msr-index.h
@@ -44,6 +44,7 @@
44#define SNB_C1_AUTO_UNDEMOTE (1UL << 27) 44#define SNB_C1_AUTO_UNDEMOTE (1UL << 27)
45#define SNB_C3_AUTO_UNDEMOTE (1UL << 28) 45#define SNB_C3_AUTO_UNDEMOTE (1UL << 28)
46 46
47#define MSR_PLATFORM_INFO 0x000000ce
47#define MSR_MTRRcap 0x000000fe 48#define MSR_MTRRcap 0x000000fe
48#define MSR_IA32_BBL_CR_CTL 0x00000119 49#define MSR_IA32_BBL_CR_CTL 0x00000119
49#define MSR_IA32_BBL_CR_CTL3 0x0000011e 50#define MSR_IA32_BBL_CR_CTL3 0x0000011e
diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
index b662529072f7..ad72922919ed 100644
--- a/drivers/cpufreq/intel_pstate.c
+++ b/drivers/cpufreq/intel_pstate.c
@@ -358,14 +358,14 @@ static void intel_pstate_sysfs_expose_params(void)
358static int intel_pstate_min_pstate(void) 358static int intel_pstate_min_pstate(void)
359{ 359{
360 u64 value; 360 u64 value;
361 rdmsrl(0xCE, value); 361 rdmsrl(MSR_PLATFORM_INFO, value);
362 return (value >> 40) & 0xFF; 362 return (value >> 40) & 0xFF;
363} 363}
364 364
365static int intel_pstate_max_pstate(void) 365static int intel_pstate_max_pstate(void)
366{ 366{
367 u64 value; 367 u64 value;
368 rdmsrl(0xCE, value); 368 rdmsrl(MSR_PLATFORM_INFO, value);
369 return (value >> 8) & 0xFF; 369 return (value >> 8) & 0xFF;
370} 370}
371 371
@@ -373,7 +373,7 @@ static int intel_pstate_turbo_pstate(void)
373{ 373{
374 u64 value; 374 u64 value;
375 int nont, ret; 375 int nont, ret;
376 rdmsrl(0x1AD, value); 376 rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value);
377 nont = intel_pstate_max_pstate(); 377 nont = intel_pstate_max_pstate();
378 ret = ((value) & 255); 378 ret = ((value) & 255);
379 if (ret <= nont) 379 if (ret <= nont)