aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorPaul Mundt <lethal@linux-sh.org>2007-08-01 04:52:47 -0400
committerPaul Mundt <lethal@linux-sh.org>2007-09-20 22:57:47 -0400
commit7da3b8ef662af6252aa17c55cc0aa6d74cbf02e4 (patch)
tree2a1cacd022ef472c38e0c7f5eb4a0bfcc0d79d69
parent1ee010087e2d26f0d8182bb189d5606e3586253c (diff)
sh: Initial multiple-node support for SH-X3.
Wire up CPU#0 URAM as node 1 on SH-X3. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-shx3.c14
-rw-r--r--arch/sh/mm/Kconfig3
2 files changed, 17 insertions, 0 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-shx3.c b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
index 7f3fa5167c6b..f7a2cc221d22 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
@@ -255,3 +255,17 @@ void __init plat_irq_setup(void)
255{ 255{
256 register_intc_controller(&intc_desc); 256 register_intc_controller(&intc_desc);
257} 257}
258
259void __init plat_mem_setup(void)
260{
261 /* Register CPU#0 URAM space as Node 1 */
262 setup_bootmem_node(1, 0x145f0000, 0x14610000); /* CPU0 */
263
264#if 0
265 /* XXX: Not yet.. */
266 setup_bootmem_node(2, 0x14df0000, 0x14e10000); /* CPU1 */
267 setup_bootmem_node(3, 0x155f0000, 0x15610000); /* CPU2 */
268 setup_bootmem_node(4, 0x15df0000, 0x15e10000); /* CPU3 */
269 setup_bootmem_node(5, 0x16000000, 0x16020000); /* CSM */
270#endif
271}
diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig
index d1a7e3f7b4ae..eca68da7c0ab 100644
--- a/arch/sh/mm/Kconfig
+++ b/arch/sh/mm/Kconfig
@@ -198,6 +198,8 @@ config CPU_SUBTYPE_SHX3
198 select CPU_SH4A 198 select CPU_SH4A
199 select CPU_SHX3 199 select CPU_SHX3
200 select CPU_HAS_INTC_IRQ 200 select CPU_HAS_INTC_IRQ
201 select ARCH_SPARSEMEM_ENABLE
202 select SYS_SUPPORTS_NUMA
201 203
202# SH4AL-DSP Processor Support 204# SH4AL-DSP Processor Support
203 205
@@ -323,6 +325,7 @@ config ARCH_SPARSEMEM_DEFAULT
323 325
324config MAX_ACTIVE_REGIONS 326config MAX_ACTIVE_REGIONS
325 int 327 int
328 default "6" if (CPU_SUBTYPE_SHX3 && SPARSEMEM)
326 default "2" if (CPU_SUBTYPE_SH7722 && SPARSEMEM) 329 default "2" if (CPU_SUBTYPE_SH7722 && SPARSEMEM)
327 default "1" 330 default "1"
328 331