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authorLinus Torvalds <torvalds@linux-foundation.org>2010-11-24 16:58:19 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2010-11-24 16:58:19 -0500
commit3070fb888be52c5488976828ffc9f950872ffadc (patch)
treede59e3130d6e715a45199bf28e10d43d2ec570b1
parent68ca92aa1f980d91ac98f798b313b70864f60e4b (diff)
parentdfcd6e438927ad8c54278e5b1a34a4fe76e57ad2 (diff)
Merge branch 'sh-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* 'sh-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: sh: clkfwk: Build fix for non-legacy CPG changes. sh: Use GCC __builtin_prefetch() to implement prefetch(). sh: fix vsyscall compilation due to .eh_frame issue sh: avoid to flush all cache in sys_cacheflush sh: clkfwk: Disable init clk op for non-legacy clocks. sh: clkfwk: Kill off now unused algo_id in set_rate op. sh: clkfwk: Kill off unused clk_set_rate_ex().
-rw-r--r--Documentation/DocBook/sh.tmpl4
-rw-r--r--Documentation/sh/clk.txt32
-rw-r--r--arch/arm/mach-shmobile/clock-sh7372.c6
-rw-r--r--arch/sh/include/asm/processor_32.h7
-rw-r--r--arch/sh/kernel/cpu/sh4/clock-sh4-202.c2
-rw-r--r--arch/sh/kernel/sys_sh.c2
-rw-r--r--arch/sh/kernel/vsyscall/vsyscall-trapa.S2
-rw-r--r--drivers/sh/clk/core.c16
-rw-r--r--drivers/sh/clk/cpg.c7
-rw-r--r--include/linux/sh_clk.h34
10 files changed, 22 insertions, 90 deletions
diff --git a/Documentation/DocBook/sh.tmpl b/Documentation/DocBook/sh.tmpl
index d858d92cf6d9..4a38f604fa66 100644
--- a/Documentation/DocBook/sh.tmpl
+++ b/Documentation/DocBook/sh.tmpl
@@ -79,10 +79,6 @@
79 </sect2> 79 </sect2>
80 </sect1> 80 </sect1>
81 </chapter> 81 </chapter>
82 <chapter id="clk">
83 <title>Clock Framework Extensions</title>
84!Iinclude/linux/sh_clk.h
85 </chapter>
86 <chapter id="mach"> 82 <chapter id="mach">
87 <title>Machine Specific Interfaces</title> 83 <title>Machine Specific Interfaces</title>
88 <sect1 id="dreamcast"> 84 <sect1 id="dreamcast">
diff --git a/Documentation/sh/clk.txt b/Documentation/sh/clk.txt
deleted file mode 100644
index 114b595cfa97..000000000000
--- a/Documentation/sh/clk.txt
+++ /dev/null
@@ -1,32 +0,0 @@
1Clock framework on SuperH architecture
2
3The framework on SH extends existing API by the function clk_set_rate_ex,
4which prototype is as follows:
5
6 clk_set_rate_ex (struct clk *clk, unsigned long rate, int algo_id)
7
8The algo_id parameter is used to specify algorithm used to recalculate clocks,
9adjanced to clock, specified as first argument. It is assumed that algo_id==0
10means no changes to adjanced clock
11
12Internally, the clk_set_rate_ex forwards request to clk->ops->set_rate method,
13if it is present in ops structure. The method should set the clock rate and adjust
14all needed clocks according to the passed algo_id.
15Exact values for algo_id are machine-dependent. For the sh7722, the following
16values are defined:
17
18 NO_CHANGE = 0,
19 IUS_N1_N1, /* I:U = N:1, U:Sh = N:1 */
20 IUS_322, /* I:U:Sh = 3:2:2 */
21 IUS_522, /* I:U:Sh = 5:2:2 */
22 IUS_N11, /* I:U:Sh = N:1:1 */
23 SB_N1, /* Sh:B = N:1 */
24 SB3_N1, /* Sh:B3 = N:1 */
25 SB3_32, /* Sh:B3 = 3:2 */
26 SB3_43, /* Sh:B3 = 4:3 */
27 SB3_54, /* Sh:B3 = 5:4 */
28 BP_N1, /* B:P = N:1 */
29 IP_N1 /* I:P = N:1 */
30
31Each of these constants means relation between clocks that can be set via the FRQCR
32register
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 7db31e6c6bf2..b25ce90a346e 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -220,8 +220,7 @@ static void pllc2_disable(struct clk *clk)
220 __raw_writel(__raw_readl(PLLC2CR) & ~0x80000000, PLLC2CR); 220 __raw_writel(__raw_readl(PLLC2CR) & ~0x80000000, PLLC2CR);
221} 221}
222 222
223static int pllc2_set_rate(struct clk *clk, 223static int pllc2_set_rate(struct clk *clk, unsigned long rate)
224 unsigned long rate, int algo_id)
225{ 224{
226 unsigned long value; 225 unsigned long value;
227 int idx; 226 int idx;
@@ -463,8 +462,7 @@ static int fsidiv_enable(struct clk *clk)
463 return 0; 462 return 0;
464} 463}
465 464
466static int fsidiv_set_rate(struct clk *clk, 465static int fsidiv_set_rate(struct clk *clk, unsigned long rate)
467 unsigned long rate, int algo_id)
468{ 466{
469 int idx; 467 int idx;
470 468
diff --git a/arch/sh/include/asm/processor_32.h b/arch/sh/include/asm/processor_32.h
index 46d5179c9f49..e3c73cdd8c90 100644
--- a/arch/sh/include/asm/processor_32.h
+++ b/arch/sh/include/asm/processor_32.h
@@ -199,10 +199,13 @@ extern unsigned long get_wchan(struct task_struct *p);
199#define ARCH_HAS_PREFETCHW 199#define ARCH_HAS_PREFETCHW
200static inline void prefetch(void *x) 200static inline void prefetch(void *x)
201{ 201{
202 __asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory"); 202 __builtin_prefetch(x, 0, 3);
203} 203}
204 204
205#define prefetchw(x) prefetch(x) 205static inline void prefetchw(void *x)
206{
207 __builtin_prefetch(x, 1, 3);
208}
206#endif 209#endif
207 210
208#endif /* __KERNEL__ */ 211#endif /* __KERNEL__ */
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
index 4eabc68cd753..b601fa3978d1 100644
--- a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
+++ b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
@@ -110,7 +110,7 @@ static int shoc_clk_verify_rate(struct clk *clk, unsigned long rate)
110 return 0; 110 return 0;
111} 111}
112 112
113static int shoc_clk_set_rate(struct clk *clk, unsigned long rate, int algo_id) 113static int shoc_clk_set_rate(struct clk *clk, unsigned long rate)
114{ 114{
115 unsigned long frqcr3; 115 unsigned long frqcr3;
116 unsigned int tmp; 116 unsigned int tmp;
diff --git a/arch/sh/kernel/sys_sh.c b/arch/sh/kernel/sys_sh.c
index 81f58371613d..8c6a350df751 100644
--- a/arch/sh/kernel/sys_sh.c
+++ b/arch/sh/kernel/sys_sh.c
@@ -88,7 +88,7 @@ asmlinkage int sys_cacheflush(unsigned long addr, unsigned long len, int op)
88 } 88 }
89 89
90 if (op & CACHEFLUSH_I) 90 if (op & CACHEFLUSH_I)
91 flush_cache_all(); 91 flush_icache_range(addr, addr+len);
92 92
93 up_read(&current->mm->mmap_sem); 93 up_read(&current->mm->mmap_sem);
94 return 0; 94 return 0;
diff --git a/arch/sh/kernel/vsyscall/vsyscall-trapa.S b/arch/sh/kernel/vsyscall/vsyscall-trapa.S
index 3b6eb34c43fa..3e70f851cdc6 100644
--- a/arch/sh/kernel/vsyscall/vsyscall-trapa.S
+++ b/arch/sh/kernel/vsyscall/vsyscall-trapa.S
@@ -8,9 +8,9 @@ __kernel_vsyscall:
8 * fill out .eh_frame -- PFM. */ 8 * fill out .eh_frame -- PFM. */
9.LEND_vsyscall: 9.LEND_vsyscall:
10 .size __kernel_vsyscall,.-.LSTART_vsyscall 10 .size __kernel_vsyscall,.-.LSTART_vsyscall
11 .previous
12 11
13 .section .eh_frame,"a",@progbits 12 .section .eh_frame,"a",@progbits
13 .previous
14.LCIE: 14.LCIE:
15 .ualong .LCIE_end - .LCIE_start 15 .ualong .LCIE_end - .LCIE_start
16.LCIE_start: 16.LCIE_start:
diff --git a/drivers/sh/clk/core.c b/drivers/sh/clk/core.c
index cb12a8e1466b..3f5e387ed564 100644
--- a/drivers/sh/clk/core.c
+++ b/drivers/sh/clk/core.c
@@ -418,8 +418,11 @@ int clk_register(struct clk *clk)
418 list_add(&clk->sibling, &root_clks); 418 list_add(&clk->sibling, &root_clks);
419 419
420 list_add(&clk->node, &clock_list); 420 list_add(&clk->node, &clock_list);
421
422#ifdef CONFIG_SH_CLK_CPG_LEGACY
421 if (clk->ops && clk->ops->init) 423 if (clk->ops && clk->ops->init)
422 clk->ops->init(clk); 424 clk->ops->init(clk);
425#endif
423 426
424out_unlock: 427out_unlock:
425 mutex_unlock(&clock_list_sem); 428 mutex_unlock(&clock_list_sem);
@@ -455,19 +458,13 @@ EXPORT_SYMBOL_GPL(clk_get_rate);
455 458
456int clk_set_rate(struct clk *clk, unsigned long rate) 459int clk_set_rate(struct clk *clk, unsigned long rate)
457{ 460{
458 return clk_set_rate_ex(clk, rate, 0);
459}
460EXPORT_SYMBOL_GPL(clk_set_rate);
461
462int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id)
463{
464 int ret = -EOPNOTSUPP; 461 int ret = -EOPNOTSUPP;
465 unsigned long flags; 462 unsigned long flags;
466 463
467 spin_lock_irqsave(&clock_lock, flags); 464 spin_lock_irqsave(&clock_lock, flags);
468 465
469 if (likely(clk->ops && clk->ops->set_rate)) { 466 if (likely(clk->ops && clk->ops->set_rate)) {
470 ret = clk->ops->set_rate(clk, rate, algo_id); 467 ret = clk->ops->set_rate(clk, rate);
471 if (ret != 0) 468 if (ret != 0)
472 goto out_unlock; 469 goto out_unlock;
473 } else { 470 } else {
@@ -485,7 +482,7 @@ out_unlock:
485 482
486 return ret; 483 return ret;
487} 484}
488EXPORT_SYMBOL_GPL(clk_set_rate_ex); 485EXPORT_SYMBOL_GPL(clk_set_rate);
489 486
490int clk_set_parent(struct clk *clk, struct clk *parent) 487int clk_set_parent(struct clk *clk, struct clk *parent)
491{ 488{
@@ -653,8 +650,7 @@ static int clks_sysdev_suspend(struct sys_device *dev, pm_message_t state)
653 clkp->ops->set_parent(clkp, 650 clkp->ops->set_parent(clkp,
654 clkp->parent); 651 clkp->parent);
655 if (likely(clkp->ops->set_rate)) 652 if (likely(clkp->ops->set_rate))
656 clkp->ops->set_rate(clkp, 653 clkp->ops->set_rate(clkp, rate);
657 rate, NO_CHANGE);
658 else if (likely(clkp->ops->recalc)) 654 else if (likely(clkp->ops->recalc))
659 clkp->rate = clkp->ops->recalc(clkp); 655 clkp->rate = clkp->ops->recalc(clkp);
660 } 656 }
diff --git a/drivers/sh/clk/cpg.c b/drivers/sh/clk/cpg.c
index 3aea5f0ceb09..6172335ae323 100644
--- a/drivers/sh/clk/cpg.c
+++ b/drivers/sh/clk/cpg.c
@@ -110,8 +110,7 @@ static int sh_clk_div6_set_parent(struct clk *clk, struct clk *parent)
110 return 0; 110 return 0;
111} 111}
112 112
113static int sh_clk_div6_set_rate(struct clk *clk, 113static int sh_clk_div6_set_rate(struct clk *clk, unsigned long rate)
114 unsigned long rate, int algo_id)
115{ 114{
116 unsigned long value; 115 unsigned long value;
117 int idx; 116 int idx;
@@ -132,7 +131,7 @@ static int sh_clk_div6_enable(struct clk *clk)
132 unsigned long value; 131 unsigned long value;
133 int ret; 132 int ret;
134 133
135 ret = sh_clk_div6_set_rate(clk, clk->rate, 0); 134 ret = sh_clk_div6_set_rate(clk, clk->rate);
136 if (ret == 0) { 135 if (ret == 0) {
137 value = __raw_readl(clk->enable_reg); 136 value = __raw_readl(clk->enable_reg);
138 value &= ~0x100; /* clear stop bit to enable clock */ 137 value &= ~0x100; /* clear stop bit to enable clock */
@@ -253,7 +252,7 @@ static int sh_clk_div4_set_parent(struct clk *clk, struct clk *parent)
253 return 0; 252 return 0;
254} 253}
255 254
256static int sh_clk_div4_set_rate(struct clk *clk, unsigned long rate, int algo_id) 255static int sh_clk_div4_set_rate(struct clk *clk, unsigned long rate)
257{ 256{
258 struct clk_div4_table *d4t = clk->priv; 257 struct clk_div4_table *d4t = clk->priv;
259 unsigned long value; 258 unsigned long value;
diff --git a/include/linux/sh_clk.h b/include/linux/sh_clk.h
index cea0c38e7a63..9a52f72527dc 100644
--- a/include/linux/sh_clk.h
+++ b/include/linux/sh_clk.h
@@ -19,11 +19,13 @@ struct clk_mapping {
19}; 19};
20 20
21struct clk_ops { 21struct clk_ops {
22#ifdef CONFIG_SH_CLK_CPG_LEGACY
22 void (*init)(struct clk *clk); 23 void (*init)(struct clk *clk);
24#endif
23 int (*enable)(struct clk *clk); 25 int (*enable)(struct clk *clk);
24 void (*disable)(struct clk *clk); 26 void (*disable)(struct clk *clk);
25 unsigned long (*recalc)(struct clk *clk); 27 unsigned long (*recalc)(struct clk *clk);
26 int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id); 28 int (*set_rate)(struct clk *clk, unsigned long rate);
27 int (*set_parent)(struct clk *clk, struct clk *parent); 29 int (*set_parent)(struct clk *clk, struct clk *parent);
28 long (*round_rate)(struct clk *clk, unsigned long rate); 30 long (*round_rate)(struct clk *clk, unsigned long rate);
29}; 31};
@@ -67,36 +69,6 @@ int clk_register(struct clk *);
67void clk_unregister(struct clk *); 69void clk_unregister(struct clk *);
68void clk_enable_init_clocks(void); 70void clk_enable_init_clocks(void);
69 71
70/**
71 * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter
72 * @clk: clock source
73 * @rate: desired clock rate in Hz
74 * @algo_id: algorithm id to be passed down to ops->set_rate
75 *
76 * Returns success (0) or negative errno.
77 */
78int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id);
79
80enum clk_sh_algo_id {
81 NO_CHANGE = 0,
82
83 IUS_N1_N1,
84 IUS_322,
85 IUS_522,
86 IUS_N11,
87
88 SB_N1,
89
90 SB3_N1,
91 SB3_32,
92 SB3_43,
93 SB3_54,
94
95 BP_N1,
96
97 IP_N1,
98};
99
100struct clk_div_mult_table { 72struct clk_div_mult_table {
101 unsigned int *divisors; 73 unsigned int *divisors;
102 unsigned int nr_divisors; 74 unsigned int nr_divisors;