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authorMaciej W. Rozycki <macro@linux-mips.org>2005-06-30 06:48:40 -0400
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 14:31:34 -0400
commitc3455b0efc2b5b1bdc755602f77ce7f43725bf61 (patch)
tree835ffe4b5509053c0623146157d92c4ca2d32aea
parentc134a5ecdb8f4aee09feca0d4d395915e752fcb8 (diff)
Inline ioremap() calls for constant addresses that map to KSEG1.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/au1000/common/setup.c2
-rw-r--r--arch/mips/mm/ioremap.c15
-rw-r--r--include/asm-mips/io.h31
-rw-r--r--include/asm-mips/mach-au1x00/ioremap.h30
-rw-r--r--include/asm-mips/mach-generic/ioremap.h23
5 files changed, 86 insertions, 15 deletions
diff --git a/arch/mips/au1000/common/setup.c b/arch/mips/au1000/common/setup.c
index 8d21efdf29b7..c1e102e55adb 100644
--- a/arch/mips/au1000/common/setup.c
+++ b/arch/mips/au1000/common/setup.c
@@ -155,7 +155,7 @@ void __init plat_setup(void)
155 155
156#if defined(CONFIG_64BIT_PHYS_ADDR) 156#if defined(CONFIG_64BIT_PHYS_ADDR)
157/* This routine should be valid for all Au1x based boards */ 157/* This routine should be valid for all Au1x based boards */
158phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size) 158phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size)
159{ 159{
160 u32 start, end; 160 u32 start, end;
161 161
diff --git a/arch/mips/mm/ioremap.c b/arch/mips/mm/ioremap.c
index d06107360db4..9c44ca70befa 100644
--- a/arch/mips/mm/ioremap.c
+++ b/arch/mips/mm/ioremap.c
@@ -102,15 +102,6 @@ static int remap_area_pages(unsigned long address, phys_t phys_addr,
102} 102}
103 103
104/* 104/*
105 * Allow physical addresses to be fixed up to help 36 bit peripherals.
106 */
107phys_t __attribute__ ((weak))
108fixup_bigphys_addr(phys_t phys_addr, phys_t size)
109{
110 return phys_addr;
111}
112
113/*
114 * Generic mapping function (not visible outside): 105 * Generic mapping function (not visible outside):
115 */ 106 */
116 107
@@ -126,7 +117,7 @@ fixup_bigphys_addr(phys_t phys_addr, phys_t size)
126 117
127#define IS_LOW512(addr) (!((phys_t)(addr) & (phys_t) ~0x1fffffffULL)) 118#define IS_LOW512(addr) (!((phys_t)(addr) & (phys_t) ~0x1fffffffULL))
128 119
129void * __ioremap(phys_t phys_addr, phys_t size, unsigned long flags) 120void __iomem * __ioremap(phys_t phys_addr, phys_t size, unsigned long flags)
130{ 121{
131 struct vm_struct * area; 122 struct vm_struct * area;
132 unsigned long offset; 123 unsigned long offset;
@@ -146,7 +137,7 @@ void * __ioremap(phys_t phys_addr, phys_t size, unsigned long flags)
146 */ 137 */
147 if (IS_LOW512(phys_addr) && IS_LOW512(last_addr) && 138 if (IS_LOW512(phys_addr) && IS_LOW512(last_addr) &&
148 flags == _CACHE_UNCACHED) 139 flags == _CACHE_UNCACHED)
149 return (void *) CKSEG1ADDR(phys_addr); 140 return (void __iomem *) CKSEG1ADDR(phys_addr);
150 141
151 /* 142 /*
152 * Don't allow anybody to remap normal RAM that we're using.. 143 * Don't allow anybody to remap normal RAM that we're using..
@@ -182,7 +173,7 @@ void * __ioremap(phys_t phys_addr, phys_t size, unsigned long flags)
182 return NULL; 173 return NULL;
183 } 174 }
184 175
185 return (void *) (offset + (char *)addr); 176 return (void __iomem *) (offset + (char *)addr);
186} 177}
187 178
188#define IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == CKSEG1) 179#define IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == CKSEG1)
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index 3b4d97d80643..42f80782acd2 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -27,6 +27,7 @@
27#include <asm/processor.h> 27#include <asm/processor.h>
28#include <asm/string.h> 28#include <asm/string.h>
29 29
30#include <ioremap.h>
30#include <mangle-port.h> 31#include <mangle-port.h>
31 32
32/* 33/*
@@ -209,6 +210,8 @@ extern void __iounmap(volatile void __iomem *addr);
209static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size, 210static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size,
210 unsigned long flags) 211 unsigned long flags)
211{ 212{
213#define __IS_LOW512(addr) (!((phys_t)(addr) & (phys_t) ~0x1fffffffULL))
214
212 if (cpu_has_64bit_addresses) { 215 if (cpu_has_64bit_addresses) {
213 u64 base = UNCAC_BASE; 216 u64 base = UNCAC_BASE;
214 217
@@ -219,9 +222,29 @@ static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size,
219 if (flags == _CACHE_UNCACHED) 222 if (flags == _CACHE_UNCACHED)
220 base = (u64) IO_BASE; 223 base = (u64) IO_BASE;
221 return (void __iomem *) (unsigned long) (base + offset); 224 return (void __iomem *) (unsigned long) (base + offset);
225 } else if (__builtin_constant_p(offset) &&
226 __builtin_constant_p(size) && __builtin_constant_p(flags)) {
227 phys_t phys_addr, last_addr;
228
229 phys_addr = fixup_bigphys_addr(offset, size);
230
231 /* Don't allow wraparound or zero size. */
232 last_addr = phys_addr + size - 1;
233 if (!size || last_addr < phys_addr)
234 return NULL;
235
236 /*
237 * Map uncached objects in the low 512MB of address
238 * space using KSEG1.
239 */
240 if (__IS_LOW512(phys_addr) && __IS_LOW512(last_addr) &&
241 flags == _CACHE_UNCACHED)
242 return (void __iomem *)CKSEG1ADDR(phys_addr);
222 } 243 }
223 244
224 return __ioremap(offset, size, flags); 245 return __ioremap(offset, size, flags);
246
247#undef __IS_LOW512
225} 248}
226 249
227/* 250/*
@@ -273,12 +296,16 @@ static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size,
273 296
274static inline void iounmap(volatile void __iomem *addr) 297static inline void iounmap(volatile void __iomem *addr)
275{ 298{
276 if (cpu_has_64bit_addresses) 299#define __IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == CKSEG1)
300
301 if (cpu_has_64bit_addresses ||
302 (__builtin_constant_p(addr) && __IS_KSEG1(addr)))
277 return; 303 return;
278 304
279 __iounmap(addr); 305 __iounmap(addr);
280}
281 306
307#undef __IS_KSEG1
308}
282 309
283#define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq) \ 310#define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq) \
284 \ 311 \
diff --git a/include/asm-mips/mach-au1x00/ioremap.h b/include/asm-mips/mach-au1x00/ioremap.h
new file mode 100644
index 000000000000..f1c8c1087115
--- /dev/null
+++ b/include/asm-mips/mach-au1x00/ioremap.h
@@ -0,0 +1,30 @@
1/*
2 * include/asm-mips/mach-au1x00/ioremap.h
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
9#ifndef __ASM_MACH_AU1X00_IOREMAP_H
10#define __ASM_MACH_AU1X00_IOREMAP_H
11
12#include <linux/config.h>
13#include <linux/types.h>
14
15#ifndef CONFIG_64BIT_PHYS_ADDR
16static inline phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size)
17{
18 return phys_addr;
19}
20#endif
21
22/*
23 * Allow physical addresses to be fixed up to help 36-bit peripherals.
24 */
25static inline phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size)
26{
27 return __fixup_bigphys_addr(phys_addr, size);
28}
29
30#endif /* __ASM_MACH_AU1X00_IOREMAP_H */
diff --git a/include/asm-mips/mach-generic/ioremap.h b/include/asm-mips/mach-generic/ioremap.h
new file mode 100644
index 000000000000..9b64ff6e485d
--- /dev/null
+++ b/include/asm-mips/mach-generic/ioremap.h
@@ -0,0 +1,23 @@
1/*
2 * include/asm-mips/mach-generic/ioremap.h
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
9#ifndef __ASM_MACH_GENERIC_IOREMAP_H
10#define __ASM_MACH_GENERIC_IOREMAP_H
11
12#include <linux/types.h>
13
14/*
15 * Allow physical addresses to be fixed up to help peripherals located
16 * outside the low 32-bit range -- generic pass-through version.
17 */
18static inline phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size)
19{
20 return phys_addr;
21}
22
23#endif /* __ASM_MACH_GENERIC_IOREMAP_H */