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authorPaul Walmsley <paul@pwsan.com>2010-10-08 13:40:19 -0400
committerPaul Walmsley <paul@pwsan.com>2010-10-08 13:40:19 -0400
commitaa218dafd7b37ba92fcfdd6d5c8d459772f88042 (patch)
treef2963de6ff263066214530e670249055254db2e3
parentd13586574d373ef40acd4725c9a269daa355e412 (diff)
OMAP: split plat-omap/common.c
Split plat-omap/common.c into three pieces: 1. the 32KiHz sync timer and clocksource code, which now lives in plat-omap/counter_32k.c; 2. the OMAP2+ common code, which has been moved to mach-omap2/common.c; 3. and the remainder of the OMAP-wide common code, which includes the deprecated ATAGs code and a deprecated video RAM reservation function. The primary motivation for doing this is to move the OMAP2+-specific parts into an OMAP2+-specific file, so that build breakage related to the System Control Module code can be resolved. Benoît Cousson <b-cousson@ti.com> suggested a new filename and found some bugs in the counter_32k.c comments - thanks Benoît. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoît Cousson <b-cousson@ti.com>
Diffstat
-rw-r--r--arch/arm/mach-omap2/Makefile3
-rw-r--r--arch/arm/mach-omap2/common.c135
-rw-r--r--arch/arm/plat-omap/Makefile2
-rw-r--r--arch/arm/plat-omap/common.c275
-rw-r--r--arch/arm/plat-omap/counter_32k.c183
-rw-r--r--arch/arm/plat-omap/devices.c1
-rw-r--r--arch/arm/plat-omap/sram.c3
7 files changed, 321 insertions, 281 deletions
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index d8b1de6f3f62..7352412e4917 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -3,7 +3,8 @@
3# 3#
4 4
5# Common support 5# Common support
6obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o pm.o 6obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o pm.o \
7 common.o
7 8
8omap-2-3-common = irq.o sdrc.o prm2xxx_3xxx.o 9omap-2-3-common = irq.o sdrc.o prm2xxx_3xxx.o
9hwmod-common = omap_hwmod.o \ 10hwmod-common = omap_hwmod.o \
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c
new file mode 100644
index 000000000000..cddc89ab7479
--- /dev/null
+++ b/arch/arm/mach-omap2/common.c
@@ -0,0 +1,135 @@
1/*
2 * linux/arch/arm/mach-omap2/common.c
3 *
4 * Code common to all OMAP2+ machines.
5 *
6 * Copyright (C) 2009 Texas Instruments
7 * Copyright (C) 2010 Nokia Corporation
8 * Tony Lindgren <tony@atomide.com>
9 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/clk.h>
18#include <linux/io.h>
19
20#include <plat/common.h>
21#include <plat/board.h>
22#include <plat/control.h>
23#include <plat/mux.h>
24
25#include <plat/clock.h>
26
27#include "sdrc.h"
28
29/* Global address base setup code */
30
31#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
32
33static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
34{
35 omap2_set_globals_tap(omap2_globals);
36 omap2_set_globals_sdrc(omap2_globals);
37 omap2_set_globals_control(omap2_globals);
38 omap2_set_globals_prcm(omap2_globals);
39}
40
41#endif
42
43#if defined(CONFIG_ARCH_OMAP2420)
44
45static struct omap_globals omap242x_globals = {
46 .class = OMAP242X_CLASS,
47 .tap = OMAP2_L4_IO_ADDRESS(0x48014000),
48 .sdrc = OMAP2420_SDRC_BASE,
49 .sms = OMAP2420_SMS_BASE,
50 .ctrl = OMAP242X_CTRL_BASE,
51 .prm = OMAP2420_PRM_BASE,
52 .cm = OMAP2420_CM_BASE,
53 .uart1_phys = OMAP2_UART1_BASE,
54 .uart2_phys = OMAP2_UART2_BASE,
55 .uart3_phys = OMAP2_UART3_BASE,
56};
57
58void __init omap2_set_globals_242x(void)
59{
60 __omap2_set_globals(&omap242x_globals);
61}
62#endif
63
64#if defined(CONFIG_ARCH_OMAP2430)
65
66static struct omap_globals omap243x_globals = {
67 .class = OMAP243X_CLASS,
68 .tap = OMAP2_L4_IO_ADDRESS(0x4900a000),
69 .sdrc = OMAP243X_SDRC_BASE,
70 .sms = OMAP243X_SMS_BASE,
71 .ctrl = OMAP243X_CTRL_BASE,
72 .prm = OMAP2430_PRM_BASE,
73 .cm = OMAP2430_CM_BASE,
74 .uart1_phys = OMAP2_UART1_BASE,
75 .uart2_phys = OMAP2_UART2_BASE,
76 .uart3_phys = OMAP2_UART3_BASE,
77};
78
79void __init omap2_set_globals_243x(void)
80{
81 __omap2_set_globals(&omap243x_globals);
82}
83#endif
84
85#if defined(CONFIG_ARCH_OMAP3)
86
87static struct omap_globals omap3_globals = {
88 .class = OMAP343X_CLASS,
89 .tap = OMAP2_L4_IO_ADDRESS(0x4830A000),
90 .sdrc = OMAP343X_SDRC_BASE,
91 .sms = OMAP343X_SMS_BASE,
92 .ctrl = OMAP343X_CTRL_BASE,
93 .prm = OMAP3430_PRM_BASE,
94 .cm = OMAP3430_CM_BASE,
95 .uart1_phys = OMAP3_UART1_BASE,
96 .uart2_phys = OMAP3_UART2_BASE,
97 .uart3_phys = OMAP3_UART3_BASE,
98 .uart4_phys = OMAP3_UART4_BASE, /* Only on 3630 */
99};
100
101void __init omap2_set_globals_3xxx(void)
102{
103 __omap2_set_globals(&omap3_globals);
104}
105
106void __init omap3_map_io(void)
107{
108 omap2_set_globals_3xxx();
109 omap34xx_map_common_io();
110}
111#endif
112
113#if defined(CONFIG_ARCH_OMAP4)
114static struct omap_globals omap4_globals = {
115 .class = OMAP443X_CLASS,
116 .tap = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
117 .ctrl = OMAP443X_SCM_BASE,
118 .ctrl_pad = OMAP443X_CTRL_BASE,
119 .prm = OMAP4430_PRM_BASE,
120 .cm = OMAP4430_CM_BASE,
121 .cm2 = OMAP4430_CM2_BASE,
122 .uart1_phys = OMAP4_UART1_BASE,
123 .uart2_phys = OMAP4_UART2_BASE,
124 .uart3_phys = OMAP4_UART3_BASE,
125 .uart4_phys = OMAP4_UART4_BASE,
126};
127
128void __init omap2_set_globals_443x(void)
129{
130 omap2_set_globals_tap(&omap4_globals);
131 omap2_set_globals_control(&omap4_globals);
132 omap2_set_globals_prcm(&omap4_globals);
133}
134#endif
135
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index 2a151917ef52..a4a12859fdd5 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -4,7 +4,7 @@
4 4
5# Common support 5# Common support
6obj-y := common.o sram.o clock.o devices.o dma.o mux.o gpio.o \ 6obj-y := common.o sram.o clock.o devices.o dma.o mux.o gpio.o \
7 usb.o fb.o io.o 7 usb.o fb.o io.o counter_32k.o
8obj-m := 8obj-m :=
9obj-n := 9obj-n :=
10obj- := 10obj- :=
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index cbaf14bbe197..221a675ebbae 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -11,38 +11,15 @@
11 * it under the terms of the GNU General Public License version 2 as 11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 */ 13 */
14#include <linux/module.h>
15#include <linux/kernel.h> 14#include <linux/kernel.h>
16#include <linux/init.h> 15#include <linux/init.h>
17#include <linux/delay.h>
18#include <linux/console.h>
19#include <linux/serial.h>
20#include <linux/tty.h>
21#include <linux/serial_8250.h>
22#include <linux/serial_reg.h>
23#include <linux/clk.h>
24#include <linux/io.h> 16#include <linux/io.h>
25#include <linux/omapfb.h> 17#include <linux/omapfb.h>
26 18
27#include <mach/hardware.h>
28#include <asm/system.h>
29#include <asm/pgtable.h>
30#include <asm/mach/map.h>
31#include <asm/setup.h>
32
33#include <plat/common.h> 19#include <plat/common.h>
34#include <plat/board.h> 20#include <plat/board.h>
35#include <plat/control.h>
36#include <plat/mux.h>
37#include <plat/fpga.h>
38#include <plat/serial.h>
39#include <plat/vram.h> 21#include <plat/vram.h>
40 22
41#include <plat/clock.h>
42
43#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
44# include "../mach-omap2/sdrc.h"
45#endif
46 23
47#define NO_LENGTH_CHECK 0xffffffff 24#define NO_LENGTH_CHECK 0xffffffff
48 25
@@ -88,255 +65,3 @@ void __init omap_reserve(void)
88 omapfb_reserve_sdram_memblock(); 65 omapfb_reserve_sdram_memblock();
89 omap_vram_reserve_sdram_memblock(); 66 omap_vram_reserve_sdram_memblock();
90} 67}
91
92/*
93 * 32KHz clocksource ... always available, on pretty most chips except
94 * OMAP 730 and 1510. Other timers could be used as clocksources, with
95 * higher resolution in free-running counter modes (e.g. 12 MHz xtal),
96 * but systems won't necessarily want to spend resources that way.
97 */
98
99#define OMAP16XX_TIMER_32K_SYNCHRONIZED 0xfffbc410
100
101#if !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX))
102
103#include <linux/clocksource.h>
104
105/*
106 * offset_32k holds the init time counter value. It is then subtracted
107 * from every counter read to achieve a counter that counts time from the
108 * kernel boot (needed for sched_clock()).
109 */
110static u32 offset_32k __read_mostly;
111
112#ifdef CONFIG_ARCH_OMAP16XX
113static cycle_t omap16xx_32k_read(struct clocksource *cs)
114{
115 return omap_readl(OMAP16XX_TIMER_32K_SYNCHRONIZED) - offset_32k;
116}
117#else
118#define omap16xx_32k_read NULL
119#endif
120
121#ifdef CONFIG_ARCH_OMAP2420
122static cycle_t omap2420_32k_read(struct clocksource *cs)
123{
124 return omap_readl(OMAP2420_32KSYNCT_BASE + 0x10) - offset_32k;
125}
126#else
127#define omap2420_32k_read NULL
128#endif
129
130#ifdef CONFIG_ARCH_OMAP2430
131static cycle_t omap2430_32k_read(struct clocksource *cs)
132{
133 return omap_readl(OMAP2430_32KSYNCT_BASE + 0x10) - offset_32k;
134}
135#else
136#define omap2430_32k_read NULL
137#endif
138
139#ifdef CONFIG_ARCH_OMAP3
140static cycle_t omap34xx_32k_read(struct clocksource *cs)
141{
142 return omap_readl(OMAP3430_32KSYNCT_BASE + 0x10) - offset_32k;
143}
144#else
145#define omap34xx_32k_read NULL
146#endif
147
148#ifdef CONFIG_ARCH_OMAP4
149static cycle_t omap44xx_32k_read(struct clocksource *cs)
150{
151 return omap_readl(OMAP4430_32KSYNCT_BASE + 0x10) - offset_32k;
152}
153#else
154#define omap44xx_32k_read NULL
155#endif
156
157/*
158 * Kernel assumes that sched_clock can be called early but may not have
159 * things ready yet.
160 */
161static cycle_t omap_32k_read_dummy(struct clocksource *cs)
162{
163 return 0;
164}
165
166static struct clocksource clocksource_32k = {
167 .name = "32k_counter",
168 .rating = 250,
169 .read = omap_32k_read_dummy,
170 .mask = CLOCKSOURCE_MASK(32),
171 .shift = 10,
172 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
173};
174
175/*
176 * Returns current time from boot in nsecs. It's OK for this to wrap
177 * around for now, as it's just a relative time stamp.
178 */
179unsigned long long sched_clock(void)
180{
181 return clocksource_cyc2ns(clocksource_32k.read(&clocksource_32k),
182 clocksource_32k.mult, clocksource_32k.shift);
183}
184
185/**
186 * read_persistent_clock - Return time from a persistent clock.
187 *
188 * Reads the time from a source which isn't disabled during PM, the
189 * 32k sync timer. Convert the cycles elapsed since last read into
190 * nsecs and adds to a monotonically increasing timespec.
191 */
192static struct timespec persistent_ts;
193static cycles_t cycles, last_cycles;
194void read_persistent_clock(struct timespec *ts)
195{
196 unsigned long long nsecs;
197 cycles_t delta;
198 struct timespec *tsp = &persistent_ts;
199
200 last_cycles = cycles;
201 cycles = clocksource_32k.read(&clocksource_32k);
202 delta = cycles - last_cycles;
203
204 nsecs = clocksource_cyc2ns(delta,
205 clocksource_32k.mult, clocksource_32k.shift);
206
207 timespec_add_ns(tsp, nsecs);
208 *ts = *tsp;
209}
210
211static int __init omap_init_clocksource_32k(void)
212{
213 static char err[] __initdata = KERN_ERR
214 "%s: can't register clocksource!\n";
215
216 if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
217 struct clk *sync_32k_ick;
218
219 if (cpu_is_omap16xx())
220 clocksource_32k.read = omap16xx_32k_read;
221 else if (cpu_is_omap2420())
222 clocksource_32k.read = omap2420_32k_read;
223 else if (cpu_is_omap2430())
224 clocksource_32k.read = omap2430_32k_read;
225 else if (cpu_is_omap34xx())
226 clocksource_32k.read = omap34xx_32k_read;
227 else if (cpu_is_omap44xx())
228 clocksource_32k.read = omap44xx_32k_read;
229 else
230 return -ENODEV;
231
232 sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
233 if (sync_32k_ick)
234 clk_enable(sync_32k_ick);
235
236 clocksource_32k.mult = clocksource_hz2mult(32768,
237 clocksource_32k.shift);
238
239 offset_32k = clocksource_32k.read(&clocksource_32k);
240
241 if (clocksource_register(&clocksource_32k))
242 printk(err, clocksource_32k.name);
243 }
244 return 0;
245}
246arch_initcall(omap_init_clocksource_32k);
247
248#endif /* !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) */
249
250/* Global address base setup code */
251
252#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
253
254static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
255{
256 omap2_set_globals_tap(omap2_globals);
257 omap2_set_globals_sdrc(omap2_globals);
258 omap2_set_globals_control(omap2_globals);
259 omap2_set_globals_prcm(omap2_globals);
260}
261
262#endif
263
264#if defined(CONFIG_ARCH_OMAP2420)
265
266static struct omap_globals omap242x_globals = {
267 .class = OMAP242X_CLASS,
268 .tap = OMAP2_L4_IO_ADDRESS(0x48014000),
269 .sdrc = OMAP2420_SDRC_BASE,
270 .sms = OMAP2420_SMS_BASE,
271 .ctrl = OMAP242X_CTRL_BASE,
272 .prm = OMAP2420_PRM_BASE,
273 .cm = OMAP2420_CM_BASE,
274};
275
276void __init omap2_set_globals_242x(void)
277{
278 __omap2_set_globals(&omap242x_globals);
279}
280#endif
281
282#if defined(CONFIG_ARCH_OMAP2430)
283
284static struct omap_globals omap243x_globals = {
285 .class = OMAP243X_CLASS,
286 .tap = OMAP2_L4_IO_ADDRESS(0x4900a000),
287 .sdrc = OMAP243X_SDRC_BASE,
288 .sms = OMAP243X_SMS_BASE,
289 .ctrl = OMAP243X_CTRL_BASE,
290 .prm = OMAP2430_PRM_BASE,
291 .cm = OMAP2430_CM_BASE,
292};
293
294void __init omap2_set_globals_243x(void)
295{
296 __omap2_set_globals(&omap243x_globals);
297}
298#endif
299
300#if defined(CONFIG_ARCH_OMAP3)
301
302static struct omap_globals omap3_globals = {
303 .class = OMAP343X_CLASS,
304 .tap = OMAP2_L4_IO_ADDRESS(0x4830A000),
305 .sdrc = OMAP343X_SDRC_BASE,
306 .sms = OMAP343X_SMS_BASE,
307 .ctrl = OMAP343X_CTRL_BASE,
308 .prm = OMAP3430_PRM_BASE,
309 .cm = OMAP3430_CM_BASE,
310};
311
312void __init omap2_set_globals_3xxx(void)
313{
314 __omap2_set_globals(&omap3_globals);
315}
316
317void __init omap3_map_io(void)
318{
319 omap2_set_globals_3xxx();
320 omap34xx_map_common_io();
321}
322#endif
323
324#if defined(CONFIG_ARCH_OMAP4)
325static struct omap_globals omap4_globals = {
326 .class = OMAP443X_CLASS,
327 .tap = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
328 .ctrl = OMAP443X_SCM_BASE,
329 .ctrl_pad = OMAP443X_CTRL_BASE,
330 .prm = OMAP4430_PRM_BASE,
331 .cm = OMAP4430_CM_BASE,
332 .cm2 = OMAP4430_CM2_BASE,
333};
334
335void __init omap2_set_globals_443x(void)
336{
337 omap2_set_globals_tap(&omap4_globals);
338 omap2_set_globals_control(&omap4_globals);
339 omap2_set_globals_prcm(&omap4_globals);
340}
341#endif
342
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
new file mode 100644
index 000000000000..155fe43a672b
--- /dev/null
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -0,0 +1,183 @@
1/*
2 * OMAP 32ksynctimer/counter_32k-related code
3 *
4 * Copyright (C) 2009 Texas Instruments
5 * Copyright (C) 2010 Nokia Corporation
6 * Tony Lindgren <tony@atomide.com>
7 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * NOTE: This timer is not the same timer as the old OMAP1 MPU timer.
14 */
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/clk.h>
18#include <linux/io.h>
19
20#include <plat/common.h>
21#include <plat/board.h>
22
23#include <plat/clock.h>
24
25
26/*
27 * 32KHz clocksource ... always available, on pretty most chips except
28 * OMAP 730 and 1510. Other timers could be used as clocksources, with
29 * higher resolution in free-running counter modes (e.g. 12 MHz xtal),
30 * but systems won't necessarily want to spend resources that way.
31 */
32
33#define OMAP16XX_TIMER_32K_SYNCHRONIZED 0xfffbc410
34
35#if !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX))
36
37#include <linux/clocksource.h>
38
39/*
40 * offset_32k holds the init time counter value. It is then subtracted
41 * from every counter read to achieve a counter that counts time from the
42 * kernel boot (needed for sched_clock()).
43 */
44static u32 offset_32k __read_mostly;
45
46#ifdef CONFIG_ARCH_OMAP16XX
47static cycle_t omap16xx_32k_read(struct clocksource *cs)
48{
49 return omap_readl(OMAP16XX_TIMER_32K_SYNCHRONIZED) - offset_32k;
50}
51#else
52#define omap16xx_32k_read NULL
53#endif
54
55#ifdef CONFIG_ARCH_OMAP2420
56static cycle_t omap2420_32k_read(struct clocksource *cs)
57{
58 return omap_readl(OMAP2420_32KSYNCT_BASE + 0x10) - offset_32k;
59}
60#else
61#define omap2420_32k_read NULL
62#endif
63
64#ifdef CONFIG_ARCH_OMAP2430
65static cycle_t omap2430_32k_read(struct clocksource *cs)
66{
67 return omap_readl(OMAP2430_32KSYNCT_BASE + 0x10) - offset_32k;
68}
69#else
70#define omap2430_32k_read NULL
71#endif
72
73#ifdef CONFIG_ARCH_OMAP3
74static cycle_t omap34xx_32k_read(struct clocksource *cs)
75{
76 return omap_readl(OMAP3430_32KSYNCT_BASE + 0x10) - offset_32k;
77}
78#else
79#define omap34xx_32k_read NULL
80#endif
81
82#ifdef CONFIG_ARCH_OMAP4
83static cycle_t omap44xx_32k_read(struct clocksource *cs)
84{
85 return omap_readl(OMAP4430_32KSYNCT_BASE + 0x10) - offset_32k;
86}
87#else
88#define omap44xx_32k_read NULL
89#endif
90
91/*
92 * Kernel assumes that sched_clock can be called early but may not have
93 * things ready yet.
94 */
95static cycle_t omap_32k_read_dummy(struct clocksource *cs)
96{
97 return 0;
98}
99
100static struct clocksource clocksource_32k = {
101 .name = "32k_counter",
102 .rating = 250,
103 .read = omap_32k_read_dummy,
104 .mask = CLOCKSOURCE_MASK(32),
105 .shift = 10,
106 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
107};
108
109/*
110 * Returns current time from boot in nsecs. It's OK for this to wrap
111 * around for now, as it's just a relative time stamp.
112 */
113unsigned long long sched_clock(void)
114{
115 return clocksource_cyc2ns(clocksource_32k.read(&clocksource_32k),
116 clocksource_32k.mult, clocksource_32k.shift);
117}
118
119/**
120 * read_persistent_clock - Return time from a persistent clock.
121 *
122 * Reads the time from a source which isn't disabled during PM, the
123 * 32k sync timer. Convert the cycles elapsed since last read into
124 * nsecs and adds to a monotonically increasing timespec.
125 */
126static struct timespec persistent_ts;
127static cycles_t cycles, last_cycles;
128void read_persistent_clock(struct timespec *ts)
129{
130 unsigned long long nsecs;
131 cycles_t delta;
132 struct timespec *tsp = &persistent_ts;
133
134 last_cycles = cycles;
135 cycles = clocksource_32k.read(&clocksource_32k);
136 delta = cycles - last_cycles;
137
138 nsecs = clocksource_cyc2ns(delta,
139 clocksource_32k.mult, clocksource_32k.shift);
140
141 timespec_add_ns(tsp, nsecs);
142 *ts = *tsp;
143}
144
145static int __init omap_init_clocksource_32k(void)
146{
147 static char err[] __initdata = KERN_ERR
148 "%s: can't register clocksource!\n";
149
150 if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
151 struct clk *sync_32k_ick;
152
153 if (cpu_is_omap16xx())
154 clocksource_32k.read = omap16xx_32k_read;
155 else if (cpu_is_omap2420())
156 clocksource_32k.read = omap2420_32k_read;
157 else if (cpu_is_omap2430())
158 clocksource_32k.read = omap2430_32k_read;
159 else if (cpu_is_omap34xx())
160 clocksource_32k.read = omap34xx_32k_read;
161 else if (cpu_is_omap44xx())
162 clocksource_32k.read = omap44xx_32k_read;
163 else
164 return -ENODEV;
165
166 sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
167 if (sync_32k_ick)
168 clk_enable(sync_32k_ick);
169
170 clocksource_32k.mult = clocksource_hz2mult(32768,
171 clocksource_32k.shift);
172
173 offset_32k = clocksource_32k.read(&clocksource_32k);
174
175 if (clocksource_register(&clocksource_32k))
176 printk(err, clocksource_32k.name);
177 }
178 return 0;
179}
180arch_initcall(omap_init_clocksource_32k);
181
182#endif /* !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) */
183
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index 8e88e0e5d524..1e2383eae638 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -21,7 +21,6 @@
21#include <asm/mach/map.h> 21#include <asm/mach/map.h>
22 22
23#include <plat/tc.h> 23#include <plat/tc.h>
24#include <plat/control.h>
25#include <plat/board.h> 24#include <plat/board.h>
26#include <plat/mmc.h> 25#include <plat/mmc.h>
27#include <mach/gpio.h> 26#include <mach/gpio.h>
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index dba5704b77db..c209163563b8 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -31,10 +31,8 @@
31#include <plat/cpu.h> 31#include <plat/cpu.h>
32#include <plat/vram.h> 32#include <plat/vram.h>
33 33
34#include <plat/control.h>
35#include "sram.h" 34#include "sram.h"
36#include "fb.h" 35#include "fb.h"
37
38#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 36#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
39# include "../mach-omap2/prm.h" 37# include "../mach-omap2/prm.h"
40# include "../mach-omap2/cm.h" 38# include "../mach-omap2/cm.h"
@@ -71,7 +69,6 @@
71#define OMAP34XX_VA_WRITEPERM0 OMAP2_L3_IO_ADDRESS(0x68012858) 69#define OMAP34XX_VA_WRITEPERM0 OMAP2_L3_IO_ADDRESS(0x68012858)
72#define OMAP34XX_VA_ADDR_MATCH2 OMAP2_L3_IO_ADDRESS(0x68012880) 70#define OMAP34XX_VA_ADDR_MATCH2 OMAP2_L3_IO_ADDRESS(0x68012880)
73#define OMAP34XX_VA_SMS_RG_ATT0 OMAP2_L3_IO_ADDRESS(0x6C000048) 71#define OMAP34XX_VA_SMS_RG_ATT0 OMAP2_L3_IO_ADDRESS(0x6C000048)
74#define OMAP34XX_VA_CONTROL_STAT OMAP2_L4_IO_ADDRESS(0x480022F0)
75 72
76#define GP_DEVICE 0x300 73#define GP_DEVICE 0x300
77 74
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-23 17:22:59 -0400