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authorDavid Gibson <david@gibson.dropbear.id.au>2005-07-13 04:11:42 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2005-07-13 14:25:25 -0400
commit96e2844999f99878fc5b03b81ccaa60580005b81 (patch)
tree353c1bc9a5602d556e6741f4a261010cde45e93b
parentf13487c66c75f5db004a0631047309d9e7c5aab7 (diff)
[PATCH] ppc64: kill bitfields in ppc64 hash code
This patch removes the use of bitfield types from the ppc64 hash table manipulation code. Signed-off-by: David Gibson <dwg@au1.ibm.com> Acked-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat
-rw-r--r--arch/ppc64/kernel/iSeries_htab.c51
-rw-r--r--arch/ppc64/kernel/iSeries_setup.c18
-rw-r--r--arch/ppc64/kernel/pSeries_lpar.c47
-rw-r--r--arch/ppc64/mm/hash_low.S8
-rw-r--r--arch/ppc64/mm/hash_native.c129
-rw-r--r--arch/ppc64/mm/hash_utils.c16
-rw-r--r--arch/ppc64/mm/hugetlbpage.c16
-rw-r--r--arch/ppc64/mm/init.c7
-rw-r--r--include/asm-ppc64/iSeries/HvCallHpt.h11
-rw-r--r--include/asm-ppc64/machdep.h6
-rw-r--r--include/asm-ppc64/mmu.h83
11 files changed, 164 insertions, 228 deletions
diff --git a/arch/ppc64/kernel/iSeries_htab.c b/arch/ppc64/kernel/iSeries_htab.c
index aa9e8fdd1a4f..b0250ae4a72a 100644
--- a/arch/ppc64/kernel/iSeries_htab.c
+++ b/arch/ppc64/kernel/iSeries_htab.c
@@ -38,11 +38,12 @@ static inline void iSeries_hunlock(unsigned long slot)
38} 38}
39 39
40static long iSeries_hpte_insert(unsigned long hpte_group, unsigned long va, 40static long iSeries_hpte_insert(unsigned long hpte_group, unsigned long va,
41 unsigned long prpn, int secondary, 41 unsigned long prpn, unsigned long vflags,
42 unsigned long hpteflags, int bolted, int large) 42 unsigned long rflags)
43{ 43{
44 long slot; 44 long slot;
45 HPTE lhpte; 45 hpte_t lhpte;
46 int secondary = 0;
46 47
47 /* 48 /*
48 * The hypervisor tries both primary and secondary. 49 * The hypervisor tries both primary and secondary.
@@ -50,13 +51,13 @@ static long iSeries_hpte_insert(unsigned long hpte_group, unsigned long va,
50 * it means we have already tried both primary and secondary, 51 * it means we have already tried both primary and secondary,
51 * so we return failure immediately. 52 * so we return failure immediately.
52 */ 53 */
53 if (secondary) 54 if (vflags & HPTE_V_SECONDARY)
54 return -1; 55 return -1;
55 56
56 iSeries_hlock(hpte_group); 57 iSeries_hlock(hpte_group);
57 58
58 slot = HvCallHpt_findValid(&lhpte, va >> PAGE_SHIFT); 59 slot = HvCallHpt_findValid(&lhpte, va >> PAGE_SHIFT);
59 BUG_ON(lhpte.dw0.dw0.v); 60 BUG_ON(lhpte.v & HPTE_V_VALID);
60 61
61 if (slot == -1) { /* No available entry found in either group */ 62 if (slot == -1) { /* No available entry found in either group */
62 iSeries_hunlock(hpte_group); 63 iSeries_hunlock(hpte_group);
@@ -64,19 +65,13 @@ static long iSeries_hpte_insert(unsigned long hpte_group, unsigned long va,
64 } 65 }
65 66
66 if (slot < 0) { /* MSB set means secondary group */ 67 if (slot < 0) { /* MSB set means secondary group */
68 vflags |= HPTE_V_VALID;
67 secondary = 1; 69 secondary = 1;
68 slot &= 0x7fffffffffffffff; 70 slot &= 0x7fffffffffffffff;
69 } 71 }
70 72
71 lhpte.dw1.dword1 = 0; 73 lhpte.v = (va >> 23) << HPTE_V_AVPN_SHIFT | vflags | HPTE_V_VALID;
72 lhpte.dw1.dw1.rpn = physRpn_to_absRpn(prpn); 74 lhpte.r = (physRpn_to_absRpn(prpn) << HPTE_R_RPN_SHIFT) | rflags;
73 lhpte.dw1.flags.flags = hpteflags;
74
75 lhpte.dw0.dword0 = 0;
76 lhpte.dw0.dw0.avpn = va >> 23;
77 lhpte.dw0.dw0.h = secondary;
78 lhpte.dw0.dw0.bolted = bolted;
79 lhpte.dw0.dw0.v = 1;
80 75
81 /* Now fill in the actual HPTE */ 76 /* Now fill in the actual HPTE */
82 HvCallHpt_addValidate(slot, secondary, &lhpte); 77 HvCallHpt_addValidate(slot, secondary, &lhpte);
@@ -88,20 +83,17 @@ static long iSeries_hpte_insert(unsigned long hpte_group, unsigned long va,
88 83
89static unsigned long iSeries_hpte_getword0(unsigned long slot) 84static unsigned long iSeries_hpte_getword0(unsigned long slot)
90{ 85{
91 unsigned long dword0; 86 hpte_t hpte;
92 HPTE hpte;
93 87
94 HvCallHpt_get(&hpte, slot); 88 HvCallHpt_get(&hpte, slot);
95 dword0 = hpte.dw0.dword0; 89 return hpte.v;
96
97 return dword0;
98} 90}
99 91
100static long iSeries_hpte_remove(unsigned long hpte_group) 92static long iSeries_hpte_remove(unsigned long hpte_group)
101{ 93{
102 unsigned long slot_offset; 94 unsigned long slot_offset;
103 int i; 95 int i;
104 HPTE lhpte; 96 unsigned long hpte_v;
105 97
106 /* Pick a random slot to start at */ 98 /* Pick a random slot to start at */
107 slot_offset = mftb() & 0x7; 99 slot_offset = mftb() & 0x7;
@@ -109,10 +101,9 @@ static long iSeries_hpte_remove(unsigned long hpte_group)
109 iSeries_hlock(hpte_group); 101 iSeries_hlock(hpte_group);
110 102
111 for (i = 0; i < HPTES_PER_GROUP; i++) { 103 for (i = 0; i < HPTES_PER_GROUP; i++) {
112 lhpte.dw0.dword0 = 104 hpte_v = iSeries_hpte_getword0(hpte_group + slot_offset);
113 iSeries_hpte_getword0(hpte_group + slot_offset);
114 105
115 if (!lhpte.dw0.dw0.bolted) { 106 if (! (hpte_v & HPTE_V_BOLTED)) {
116 HvCallHpt_invalidateSetSwBitsGet(hpte_group + 107 HvCallHpt_invalidateSetSwBitsGet(hpte_group +
117 slot_offset, 0, 0); 108 slot_offset, 0, 0);
118 iSeries_hunlock(hpte_group); 109 iSeries_hunlock(hpte_group);
@@ -137,13 +128,13 @@ static long iSeries_hpte_remove(unsigned long hpte_group)
137static long iSeries_hpte_updatepp(unsigned long slot, unsigned long newpp, 128static long iSeries_hpte_updatepp(unsigned long slot, unsigned long newpp,
138 unsigned long va, int large, int local) 129 unsigned long va, int large, int local)
139{ 130{
140 HPTE hpte; 131 hpte_t hpte;
141 unsigned long avpn = va >> 23; 132 unsigned long avpn = va >> 23;
142 133
143 iSeries_hlock(slot); 134 iSeries_hlock(slot);
144 135
145 HvCallHpt_get(&hpte, slot); 136 HvCallHpt_get(&hpte, slot);
146 if ((hpte.dw0.dw0.avpn == avpn) && (hpte.dw0.dw0.v)) { 137 if ((HPTE_V_AVPN_VAL(hpte.v) == avpn) && (hpte.v & HPTE_V_VALID)) {
147 /* 138 /*
148 * Hypervisor expects bits as NPPP, which is 139 * Hypervisor expects bits as NPPP, which is
149 * different from how they are mapped in our PP. 140 * different from how they are mapped in our PP.
@@ -167,7 +158,7 @@ static long iSeries_hpte_updatepp(unsigned long slot, unsigned long newpp,
167 */ 158 */
168static long iSeries_hpte_find(unsigned long vpn) 159static long iSeries_hpte_find(unsigned long vpn)
169{ 160{
170 HPTE hpte; 161 hpte_t hpte;
171 long slot; 162 long slot;
172 163
173 /* 164 /*
@@ -177,7 +168,7 @@ static long iSeries_hpte_find(unsigned long vpn)
177 * 0x80000000xxxxxxxx : Entry found in secondary group, slot x 168 * 0x80000000xxxxxxxx : Entry found in secondary group, slot x
178 */ 169 */
179 slot = HvCallHpt_findValid(&hpte, vpn); 170 slot = HvCallHpt_findValid(&hpte, vpn);
180 if (hpte.dw0.dw0.v) { 171 if (hpte.v & HPTE_V_VALID) {
181 if (slot < 0) { 172 if (slot < 0) {
182 slot &= 0x7fffffffffffffff; 173 slot &= 0x7fffffffffffffff;
183 slot = -slot; 174 slot = -slot;
@@ -212,7 +203,7 @@ static void iSeries_hpte_updateboltedpp(unsigned long newpp, unsigned long ea)
212static void iSeries_hpte_invalidate(unsigned long slot, unsigned long va, 203static void iSeries_hpte_invalidate(unsigned long slot, unsigned long va,
213 int large, int local) 204 int large, int local)
214{ 205{
215 HPTE lhpte; 206 unsigned long hpte_v;
216 unsigned long avpn = va >> 23; 207 unsigned long avpn = va >> 23;
217 unsigned long flags; 208 unsigned long flags;
218 209
@@ -220,9 +211,9 @@ static void iSeries_hpte_invalidate(unsigned long slot, unsigned long va,
220 211
221 iSeries_hlock(slot); 212 iSeries_hlock(slot);
222 213
223 lhpte.dw0.dword0 = iSeries_hpte_getword0(slot); 214 hpte_v = iSeries_hpte_getword0(slot);
224 215
225 if ((lhpte.dw0.dw0.avpn == avpn) && lhpte.dw0.dw0.v) 216 if ((HPTE_V_AVPN_VAL(hpte_v) == avpn) && (hpte_v & HPTE_V_VALID))
226 HvCallHpt_invalidateSetSwBitsGet(slot, 0, 0); 217 HvCallHpt_invalidateSetSwBitsGet(slot, 0, 0);
227 218
228 iSeries_hunlock(slot); 219 iSeries_hunlock(slot);
diff --git a/arch/ppc64/kernel/iSeries_setup.c b/arch/ppc64/kernel/iSeries_setup.c
index 077c82fc9f3a..a649edbb23b6 100644
--- a/arch/ppc64/kernel/iSeries_setup.c
+++ b/arch/ppc64/kernel/iSeries_setup.c
@@ -503,7 +503,7 @@ static void __init build_iSeries_Memory_Map(void)
503 503
504 /* Fill in the hashed page table hash mask */ 504 /* Fill in the hashed page table hash mask */
505 num_ptegs = hptSizePages * 505 num_ptegs = hptSizePages *
506 (PAGE_SIZE / (sizeof(HPTE) * HPTES_PER_GROUP)); 506 (PAGE_SIZE / (sizeof(hpte_t) * HPTES_PER_GROUP));
507 htab_hash_mask = num_ptegs - 1; 507 htab_hash_mask = num_ptegs - 1;
508 508
509 /* 509 /*
@@ -618,25 +618,23 @@ static void __init setup_iSeries_cache_sizes(void)
618static void iSeries_make_pte(unsigned long va, unsigned long pa, 618static void iSeries_make_pte(unsigned long va, unsigned long pa,
619 int mode) 619 int mode)
620{ 620{
621 HPTE local_hpte, rhpte; 621 hpte_t local_hpte, rhpte;
622 unsigned long hash, vpn; 622 unsigned long hash, vpn;
623 long slot; 623 long slot;
624 624
625 vpn = va >> PAGE_SHIFT; 625 vpn = va >> PAGE_SHIFT;
626 hash = hpt_hash(vpn, 0); 626 hash = hpt_hash(vpn, 0);
627 627
628 local_hpte.dw1.dword1 = pa | mode; 628 local_hpte.r = pa | mode;
629 local_hpte.dw0.dword0 = 0; 629 local_hpte.v = ((va >> 23) << HPTE_V_AVPN_SHIFT)
630 local_hpte.dw0.dw0.avpn = va >> 23; 630 | HPTE_V_BOLTED | HPTE_V_VALID;
631 local_hpte.dw0.dw0.bolted = 1; /* bolted */
632 local_hpte.dw0.dw0.v = 1;
633 631
634 slot = HvCallHpt_findValid(&rhpte, vpn); 632 slot = HvCallHpt_findValid(&rhpte, vpn);
635 if (slot < 0) { 633 if (slot < 0) {
636 /* Must find space in primary group */ 634 /* Must find space in primary group */
637 panic("hash_page: hpte already exists\n"); 635 panic("hash_page: hpte already exists\n");
638 } 636 }
639 HvCallHpt_addValidate(slot, 0, (HPTE *)&local_hpte ); 637 HvCallHpt_addValidate(slot, 0, &local_hpte);
640} 638}
641 639
642/* 640/*
@@ -646,7 +644,7 @@ static void __init iSeries_bolt_kernel(unsigned long saddr, unsigned long eaddr)
646{ 644{
647 unsigned long pa; 645 unsigned long pa;
648 unsigned long mode_rw = _PAGE_ACCESSED | _PAGE_COHERENT | PP_RWXX; 646 unsigned long mode_rw = _PAGE_ACCESSED | _PAGE_COHERENT | PP_RWXX;
649 HPTE hpte; 647 hpte_t hpte;
650 648
651 for (pa = saddr; pa < eaddr ;pa += PAGE_SIZE) { 649 for (pa = saddr; pa < eaddr ;pa += PAGE_SIZE) {
652 unsigned long ea = (unsigned long)__va(pa); 650 unsigned long ea = (unsigned long)__va(pa);
@@ -659,7 +657,7 @@ static void __init iSeries_bolt_kernel(unsigned long saddr, unsigned long eaddr)
659 if (!in_kernel_text(ea)) 657 if (!in_kernel_text(ea))
660 mode_rw |= HW_NO_EXEC; 658 mode_rw |= HW_NO_EXEC;
661 659
662 if (hpte.dw0.dw0.v) { 660 if (hpte.v & HPTE_V_VALID) {
663 /* HPTE exists, so just bolt it */ 661 /* HPTE exists, so just bolt it */
664 HvCallHpt_setSwBits(slot, 0x10, 0); 662 HvCallHpt_setSwBits(slot, 0x10, 0);
665 /* And make sure the pp bits are correct */ 663 /* And make sure the pp bits are correct */
diff --git a/arch/ppc64/kernel/pSeries_lpar.c b/arch/ppc64/kernel/pSeries_lpar.c
index 6534812db437..74dd144dcce8 100644
--- a/arch/ppc64/kernel/pSeries_lpar.c
+++ b/arch/ppc64/kernel/pSeries_lpar.c
@@ -277,31 +277,20 @@ void vpa_init(int cpu)
277 277
278long pSeries_lpar_hpte_insert(unsigned long hpte_group, 278long pSeries_lpar_hpte_insert(unsigned long hpte_group,
279 unsigned long va, unsigned long prpn, 279 unsigned long va, unsigned long prpn,
280 int secondary, unsigned long hpteflags, 280 unsigned long vflags, unsigned long rflags)
281 int bolted, int large)
282{ 281{
283 unsigned long arpn = physRpn_to_absRpn(prpn); 282 unsigned long arpn = physRpn_to_absRpn(prpn);
284 unsigned long lpar_rc; 283 unsigned long lpar_rc;
285 unsigned long flags; 284 unsigned long flags;
286 unsigned long slot; 285 unsigned long slot;
287 HPTE lhpte; 286 unsigned long hpte_v, hpte_r;
288 unsigned long dummy0, dummy1; 287 unsigned long dummy0, dummy1;
289 288
290 /* Fill in the local HPTE with absolute rpn, avpn and flags */ 289 hpte_v = ((va >> 23) << HPTE_V_AVPN_SHIFT) | vflags | HPTE_V_VALID;
291 lhpte.dw1.dword1 = 0; 290 if (vflags & HPTE_V_LARGE)
292 lhpte.dw1.dw1.rpn = arpn; 291 hpte_v &= ~(1UL << HPTE_V_AVPN_SHIFT);
293 lhpte.dw1.flags.flags = hpteflags;
294 292
295 lhpte.dw0.dword0 = 0; 293 hpte_r = (arpn << HPTE_R_RPN_SHIFT) | rflags;
296 lhpte.dw0.dw0.avpn = va >> 23;
297 lhpte.dw0.dw0.h = secondary;
298 lhpte.dw0.dw0.bolted = bolted;
299 lhpte.dw0.dw0.v = 1;
300
301 if (large) {
302 lhpte.dw0.dw0.l = 1;
303 lhpte.dw0.dw0.avpn &= ~0x1UL;
304 }
305 294
306 /* Now fill in the actual HPTE */ 295 /* Now fill in the actual HPTE */
307 /* Set CEC cookie to 0 */ 296 /* Set CEC cookie to 0 */
@@ -312,11 +301,11 @@ long pSeries_lpar_hpte_insert(unsigned long hpte_group,
312 flags = 0; 301 flags = 0;
313 302
314 /* XXX why is this here? - Anton */ 303 /* XXX why is this here? - Anton */
315 if (hpteflags & (_PAGE_GUARDED|_PAGE_NO_CACHE)) 304 if (rflags & (_PAGE_GUARDED|_PAGE_NO_CACHE))
316 lhpte.dw1.flags.flags &= ~_PAGE_COHERENT; 305 hpte_r &= ~_PAGE_COHERENT;
317 306
318 lpar_rc = plpar_hcall(H_ENTER, flags, hpte_group, lhpte.dw0.dword0, 307 lpar_rc = plpar_hcall(H_ENTER, flags, hpte_group, hpte_v,
319 lhpte.dw1.dword1, &slot, &dummy0, &dummy1); 308 hpte_r, &slot, &dummy0, &dummy1);
320 309
321 if (unlikely(lpar_rc == H_PTEG_Full)) 310 if (unlikely(lpar_rc == H_PTEG_Full))
322 return -1; 311 return -1;
@@ -332,7 +321,7 @@ long pSeries_lpar_hpte_insert(unsigned long hpte_group,
332 /* Because of iSeries, we have to pass down the secondary 321 /* Because of iSeries, we have to pass down the secondary
333 * bucket bit here as well 322 * bucket bit here as well
334 */ 323 */
335 return (slot & 7) | (secondary << 3); 324 return (slot & 7) | (!!(vflags & HPTE_V_SECONDARY) << 3);
336} 325}
337 326
338static DEFINE_SPINLOCK(pSeries_lpar_tlbie_lock); 327static DEFINE_SPINLOCK(pSeries_lpar_tlbie_lock);
@@ -427,22 +416,18 @@ static long pSeries_lpar_hpte_find(unsigned long vpn)
427 unsigned long hash; 416 unsigned long hash;
428 unsigned long i, j; 417 unsigned long i, j;
429 long slot; 418 long slot;
430 union { 419 unsigned long hpte_v;
431 unsigned long dword0;
432 Hpte_dword0 dw0;
433 } hpte_dw0;
434 Hpte_dword0 dw0;
435 420
436 hash = hpt_hash(vpn, 0); 421 hash = hpt_hash(vpn, 0);
437 422
438 for (j = 0; j < 2; j++) { 423 for (j = 0; j < 2; j++) {
439 slot = (hash & htab_hash_mask) * HPTES_PER_GROUP; 424 slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
440 for (i = 0; i < HPTES_PER_GROUP; i++) { 425 for (i = 0; i < HPTES_PER_GROUP; i++) {
441 hpte_dw0.dword0 = pSeries_lpar_hpte_getword0(slot); 426 hpte_v = pSeries_lpar_hpte_getword0(slot);
442 dw0 = hpte_dw0.dw0;
443 427
444 if ((dw0.avpn == (vpn >> 11)) && dw0.v && 428 if ((HPTE_V_AVPN_VAL(hpte_v) == (vpn >> 11))
445 (dw0.h == j)) { 429 && (hpte_v & HPTE_V_VALID)
430 && (!!(hpte_v & HPTE_V_SECONDARY) == j)) {
446 /* HPTE matches */ 431 /* HPTE matches */
447 if (j) 432 if (j)
448 slot = -slot; 433 slot = -slot;
diff --git a/arch/ppc64/mm/hash_low.S b/arch/ppc64/mm/hash_low.S
index c23d46956dd9..fbff24827ae7 100644
--- a/arch/ppc64/mm/hash_low.S
+++ b/arch/ppc64/mm/hash_low.S
@@ -170,9 +170,7 @@ htab_insert_pte:
170 /* Call ppc_md.hpte_insert */ 170 /* Call ppc_md.hpte_insert */
171 ld r7,STK_PARM(r4)(r1) /* Retreive new pp bits */ 171 ld r7,STK_PARM(r4)(r1) /* Retreive new pp bits */
172 mr r4,r29 /* Retreive va */ 172 mr r4,r29 /* Retreive va */
173 li r6,0 /* primary slot */ 173 li r6,0 /* no vflags */
174 li r8,0 /* not bolted and not large */
175 li r9,0
176_GLOBAL(htab_call_hpte_insert1) 174_GLOBAL(htab_call_hpte_insert1)
177 bl . /* Will be patched by htab_finish_init() */ 175 bl . /* Will be patched by htab_finish_init() */
178 cmpdi 0,r3,0 176 cmpdi 0,r3,0
@@ -192,9 +190,7 @@ _GLOBAL(htab_call_hpte_insert1)
192 /* Call ppc_md.hpte_insert */ 190 /* Call ppc_md.hpte_insert */
193 ld r7,STK_PARM(r4)(r1) /* Retreive new pp bits */ 191 ld r7,STK_PARM(r4)(r1) /* Retreive new pp bits */
194 mr r4,r29 /* Retreive va */ 192 mr r4,r29 /* Retreive va */
195 li r6,1 /* secondary slot */ 193 li r6,HPTE_V_SECONDARY@l /* secondary slot */
196 li r8,0 /* not bolted and not large */
197 li r9,0
198_GLOBAL(htab_call_hpte_insert2) 194_GLOBAL(htab_call_hpte_insert2)
199 bl . /* Will be patched by htab_finish_init() */ 195 bl . /* Will be patched by htab_finish_init() */
200 cmpdi 0,r3,0 196 cmpdi 0,r3,0
diff --git a/arch/ppc64/mm/hash_native.c b/arch/ppc64/mm/hash_native.c
index 4fec05817d66..a6abd3a979bf 100644
--- a/arch/ppc64/mm/hash_native.c
+++ b/arch/ppc64/mm/hash_native.c
@@ -27,9 +27,9 @@
27 27
28static DEFINE_SPINLOCK(native_tlbie_lock); 28static DEFINE_SPINLOCK(native_tlbie_lock);
29 29
30static inline void native_lock_hpte(HPTE *hptep) 30static inline void native_lock_hpte(hpte_t *hptep)
31{ 31{
32 unsigned long *word = &hptep->dw0.dword0; 32 unsigned long *word = &hptep->v;
33 33
34 while (1) { 34 while (1) {
35 if (!test_and_set_bit(HPTE_LOCK_BIT, word)) 35 if (!test_and_set_bit(HPTE_LOCK_BIT, word))
@@ -39,32 +39,28 @@ static inline void native_lock_hpte(HPTE *hptep)
39 } 39 }
40} 40}
41 41
42static inline void native_unlock_hpte(HPTE *hptep) 42static inline void native_unlock_hpte(hpte_t *hptep)
43{ 43{
44 unsigned long *word = &hptep->dw0.dword0; 44 unsigned long *word = &hptep->v;
45 45
46 asm volatile("lwsync":::"memory"); 46 asm volatile("lwsync":::"memory");
47 clear_bit(HPTE_LOCK_BIT, word); 47 clear_bit(HPTE_LOCK_BIT, word);
48} 48}
49 49
50long native_hpte_insert(unsigned long hpte_group, unsigned long va, 50long native_hpte_insert(unsigned long hpte_group, unsigned long va,
51 unsigned long prpn, int secondary, 51 unsigned long prpn, unsigned long vflags,
52 unsigned long hpteflags, int bolted, int large) 52 unsigned long rflags)
53{ 53{
54 unsigned long arpn = physRpn_to_absRpn(prpn); 54 unsigned long arpn = physRpn_to_absRpn(prpn);
55 HPTE *hptep = htab_address + hpte_group; 55 hpte_t *hptep = htab_address + hpte_group;
56 Hpte_dword0 dw0; 56 unsigned long hpte_v, hpte_r;
57 HPTE lhpte;
58 int i; 57 int i;
59 58
60 for (i = 0; i < HPTES_PER_GROUP; i++) { 59 for (i = 0; i < HPTES_PER_GROUP; i++) {
61 dw0 = hptep->dw0.dw0; 60 if (! (hptep->v & HPTE_V_VALID)) {
62
63 if (!dw0.v) {
64 /* retry with lock held */ 61 /* retry with lock held */
65 native_lock_hpte(hptep); 62 native_lock_hpte(hptep);
66 dw0 = hptep->dw0.dw0; 63 if (! (hptep->v & HPTE_V_VALID))
67 if (!dw0.v)
68 break; 64 break;
69 native_unlock_hpte(hptep); 65 native_unlock_hpte(hptep);
70 } 66 }
@@ -75,56 +71,45 @@ long native_hpte_insert(unsigned long hpte_group, unsigned long va,
75 if (i == HPTES_PER_GROUP) 71 if (i == HPTES_PER_GROUP)
76 return -1; 72 return -1;
77 73
78 lhpte.dw1.dword1 = 0; 74 hpte_v = (va >> 23) << HPTE_V_AVPN_SHIFT | vflags | HPTE_V_VALID;
79 lhpte.dw1.dw1.rpn = arpn; 75 if (vflags & HPTE_V_LARGE)
80 lhpte.dw1.flags.flags = hpteflags; 76 va &= ~(1UL << HPTE_V_AVPN_SHIFT);
81 77 hpte_r = (arpn << HPTE_R_RPN_SHIFT) | rflags;
82 lhpte.dw0.dword0 = 0;
83 lhpte.dw0.dw0.avpn = va >> 23;
84 lhpte.dw0.dw0.h = secondary;
85 lhpte.dw0.dw0.bolted = bolted;
86 lhpte.dw0.dw0.v = 1;
87
88 if (large) {
89 lhpte.dw0.dw0.l = 1;
90 lhpte.dw0.dw0.avpn &= ~0x1UL;
91 }
92
93 hptep->dw1.dword1 = lhpte.dw1.dword1;
94 78
79 hptep->r = hpte_r;
95 /* Guarantee the second dword is visible before the valid bit */ 80 /* Guarantee the second dword is visible before the valid bit */
96 __asm__ __volatile__ ("eieio" : : : "memory"); 81 __asm__ __volatile__ ("eieio" : : : "memory");
97
98 /* 82 /*
99 * Now set the first dword including the valid bit 83 * Now set the first dword including the valid bit
100 * NOTE: this also unlocks the hpte 84 * NOTE: this also unlocks the hpte
101 */ 85 */
102 hptep->dw0.dword0 = lhpte.dw0.dword0; 86 hptep->v = hpte_v;
103 87
104 __asm__ __volatile__ ("ptesync" : : : "memory"); 88 __asm__ __volatile__ ("ptesync" : : : "memory");
105 89
106 return i | (secondary << 3); 90 return i | (!!(vflags & HPTE_V_SECONDARY) << 3);
107} 91}
108 92
109static long native_hpte_remove(unsigned long hpte_group) 93static long native_hpte_remove(unsigned long hpte_group)
110{ 94{
111 HPTE *hptep; 95 hpte_t *hptep;
112 Hpte_dword0 dw0;
113 int i; 96 int i;
114 int slot_offset; 97 int slot_offset;
98 unsigned long hpte_v;
115 99
116 /* pick a random entry to start at */ 100 /* pick a random entry to start at */
117 slot_offset = mftb() & 0x7; 101 slot_offset = mftb() & 0x7;
118 102
119 for (i = 0; i < HPTES_PER_GROUP; i++) { 103 for (i = 0; i < HPTES_PER_GROUP; i++) {
120 hptep = htab_address + hpte_group + slot_offset; 104 hptep = htab_address + hpte_group + slot_offset;
121 dw0 = hptep->dw0.dw0; 105 hpte_v = hptep->v;
122 106
123 if (dw0.v && !dw0.bolted) { 107 if ((hpte_v & HPTE_V_VALID) && !(hpte_v & HPTE_V_BOLTED)) {
124 /* retry with lock held */ 108 /* retry with lock held */
125 native_lock_hpte(hptep); 109 native_lock_hpte(hptep);
126 dw0 = hptep->dw0.dw0; 110 hpte_v = hptep->v;
127 if (dw0.v && !dw0.bolted) 111 if ((hpte_v & HPTE_V_VALID)
112 && !(hpte_v & HPTE_V_BOLTED))
128 break; 113 break;
129 native_unlock_hpte(hptep); 114 native_unlock_hpte(hptep);
130 } 115 }
@@ -137,15 +122,15 @@ static long native_hpte_remove(unsigned long hpte_group)
137 return -1; 122 return -1;
138 123
139 /* Invalidate the hpte. NOTE: this also unlocks it */ 124 /* Invalidate the hpte. NOTE: this also unlocks it */
140 hptep->dw0.dword0 = 0; 125 hptep->v = 0;
141 126
142 return i; 127 return i;
143} 128}
144 129
145static inline void set_pp_bit(unsigned long pp, HPTE *addr) 130static inline void set_pp_bit(unsigned long pp, hpte_t *addr)
146{ 131{
147 unsigned long old; 132 unsigned long old;
148 unsigned long *p = &addr->dw1.dword1; 133 unsigned long *p = &addr->r;
149 134
150 __asm__ __volatile__( 135 __asm__ __volatile__(
151 "1: ldarx %0,0,%3\n\ 136 "1: ldarx %0,0,%3\n\
@@ -163,11 +148,11 @@ static inline void set_pp_bit(unsigned long pp, HPTE *addr)
163 */ 148 */
164static long native_hpte_find(unsigned long vpn) 149static long native_hpte_find(unsigned long vpn)
165{ 150{
166 HPTE *hptep; 151 hpte_t *hptep;
167 unsigned long hash; 152 unsigned long hash;
168 unsigned long i, j; 153 unsigned long i, j;
169 long slot; 154 long slot;
170 Hpte_dword0 dw0; 155 unsigned long hpte_v;
171 156
172 hash = hpt_hash(vpn, 0); 157 hash = hpt_hash(vpn, 0);
173 158
@@ -175,10 +160,11 @@ static long native_hpte_find(unsigned long vpn)
175 slot = (hash & htab_hash_mask) * HPTES_PER_GROUP; 160 slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
176 for (i = 0; i < HPTES_PER_GROUP; i++) { 161 for (i = 0; i < HPTES_PER_GROUP; i++) {
177 hptep = htab_address + slot; 162 hptep = htab_address + slot;
178 dw0 = hptep->dw0.dw0; 163 hpte_v = hptep->v;
179 164
180 if ((dw0.avpn == (vpn >> 11)) && dw0.v && 165 if ((HPTE_V_AVPN_VAL(hpte_v) == (vpn >> 11))
181 (dw0.h == j)) { 166 && (hpte_v & HPTE_V_VALID)
167 && ( !!(hpte_v & HPTE_V_SECONDARY) == j)) {
182 /* HPTE matches */ 168 /* HPTE matches */
183 if (j) 169 if (j)
184 slot = -slot; 170 slot = -slot;
@@ -195,20 +181,21 @@ static long native_hpte_find(unsigned long vpn)
195static long native_hpte_updatepp(unsigned long slot, unsigned long newpp, 181static long native_hpte_updatepp(unsigned long slot, unsigned long newpp,
196 unsigned long va, int large, int local) 182 unsigned long va, int large, int local)
197{ 183{
198 HPTE *hptep = htab_address + slot; 184 hpte_t *hptep = htab_address + slot;
199 Hpte_dword0 dw0; 185 unsigned long hpte_v;
200 unsigned long avpn = va >> 23; 186 unsigned long avpn = va >> 23;
201 int ret = 0; 187 int ret = 0;
202 188
203 if (large) 189 if (large)
204 avpn &= ~0x1UL; 190 avpn &= ~1;
205 191
206 native_lock_hpte(hptep); 192 native_lock_hpte(hptep);
207 193
208 dw0 = hptep->dw0.dw0; 194 hpte_v = hptep->v;
209 195
210 /* Even if we miss, we need to invalidate the TLB */ 196 /* Even if we miss, we need to invalidate the TLB */
211 if ((dw0.avpn != avpn) || !dw0.v) { 197 if ((HPTE_V_AVPN_VAL(hpte_v) != avpn)
198 || !(hpte_v & HPTE_V_VALID)) {
212 native_unlock_hpte(hptep); 199 native_unlock_hpte(hptep);
213 ret = -1; 200 ret = -1;
214 } else { 201 } else {
@@ -244,7 +231,7 @@ static void native_hpte_updateboltedpp(unsigned long newpp, unsigned long ea)
244{ 231{
245 unsigned long vsid, va, vpn, flags = 0; 232 unsigned long vsid, va, vpn, flags = 0;
246 long slot; 233 long slot;
247 HPTE *hptep; 234 hpte_t *hptep;
248 int lock_tlbie = !cpu_has_feature(CPU_FTR_LOCKLESS_TLBIE); 235 int lock_tlbie = !cpu_has_feature(CPU_FTR_LOCKLESS_TLBIE);
249 236
250 vsid = get_kernel_vsid(ea); 237 vsid = get_kernel_vsid(ea);
@@ -269,26 +256,27 @@ static void native_hpte_updateboltedpp(unsigned long newpp, unsigned long ea)
269static void native_hpte_invalidate(unsigned long slot, unsigned long va, 256static void native_hpte_invalidate(unsigned long slot, unsigned long va,
270 int large, int local) 257 int large, int local)
271{ 258{
272 HPTE *hptep = htab_address + slot; 259 hpte_t *hptep = htab_address + slot;
273 Hpte_dword0 dw0; 260 unsigned long hpte_v;
274 unsigned long avpn = va >> 23; 261 unsigned long avpn = va >> 23;
275 unsigned long flags; 262 unsigned long flags;
276 int lock_tlbie = !cpu_has_feature(CPU_FTR_LOCKLESS_TLBIE); 263 int lock_tlbie = !cpu_has_feature(CPU_FTR_LOCKLESS_TLBIE);
277 264
278 if (large) 265 if (large)
279 avpn &= ~0x1UL; 266 avpn &= ~1;
280 267
281 local_irq_save(flags); 268 local_irq_save(flags);
282 native_lock_hpte(hptep); 269 native_lock_hpte(hptep);
283 270
284 dw0 = hptep->dw0.dw0; 271 hpte_v = hptep->v;
285 272
286 /* Even if we miss, we need to invalidate the TLB */ 273 /* Even if we miss, we need to invalidate the TLB */
287 if ((dw0.avpn != avpn) || !dw0.v) { 274 if ((HPTE_V_AVPN_VAL(hpte_v) != avpn)
275 || !(hpte_v & HPTE_V_VALID)) {
288 native_unlock_hpte(hptep); 276 native_unlock_hpte(hptep);
289 } else { 277 } else {
290 /* Invalidate the hpte. NOTE: this also unlocks it */ 278 /* Invalidate the hpte. NOTE: this also unlocks it */
291 hptep->dw0.dword0 = 0; 279 hptep->v = 0;
292 } 280 }
293 281
294 /* Invalidate the tlb */ 282 /* Invalidate the tlb */
@@ -315,8 +303,8 @@ static void native_hpte_invalidate(unsigned long slot, unsigned long va,
315static void native_hpte_clear(void) 303static void native_hpte_clear(void)
316{ 304{
317 unsigned long slot, slots, flags; 305 unsigned long slot, slots, flags;
318 HPTE *hptep = htab_address; 306 hpte_t *hptep = htab_address;
319 Hpte_dword0 dw0; 307 unsigned long hpte_v;
320 unsigned long pteg_count; 308 unsigned long pteg_count;
321 309
322 pteg_count = htab_hash_mask + 1; 310 pteg_count = htab_hash_mask + 1;
@@ -336,11 +324,11 @@ static void native_hpte_clear(void)
336 * running, right? and for crash dump, we probably 324 * running, right? and for crash dump, we probably
337 * don't want to wait for a maybe bad cpu. 325 * don't want to wait for a maybe bad cpu.
338 */ 326 */
339 dw0 = hptep->dw0.dw0; 327 hpte_v = hptep->v;
340 328
341 if (dw0.v) { 329 if (hpte_v & HPTE_V_VALID) {
342 hptep->dw0.dword0 = 0; 330 hptep->v = 0;
343 tlbie(slot2va(dw0.avpn, dw0.l, dw0.h, slot), dw0.l); 331 tlbie(slot2va(hpte_v, slot), hpte_v & HPTE_V_LARGE);
344 } 332 }
345 } 333 }
346 334
@@ -353,8 +341,8 @@ static void native_flush_hash_range(unsigned long context,
353{ 341{
354 unsigned long vsid, vpn, va, hash, secondary, slot, flags, avpn; 342 unsigned long vsid, vpn, va, hash, secondary, slot, flags, avpn;
355 int i, j; 343 int i, j;
356 HPTE *hptep; 344 hpte_t *hptep;
357 Hpte_dword0 dw0; 345 unsigned long hpte_v;
358 struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch); 346 struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
359 347
360 /* XXX fix for large ptes */ 348 /* XXX fix for large ptes */
@@ -390,14 +378,15 @@ static void native_flush_hash_range(unsigned long context,
390 378
391 native_lock_hpte(hptep); 379 native_lock_hpte(hptep);
392 380
393 dw0 = hptep->dw0.dw0; 381 hpte_v = hptep->v;
394 382
395 /* Even if we miss, we need to invalidate the TLB */ 383 /* Even if we miss, we need to invalidate the TLB */
396 if ((dw0.avpn != avpn) || !dw0.v) { 384 if ((HPTE_V_AVPN_VAL(hpte_v) != avpn)
385 || !(hpte_v & HPTE_V_VALID)) {
397 native_unlock_hpte(hptep); 386 native_unlock_hpte(hptep);
398 } else { 387 } else {
399 /* Invalidate the hpte. NOTE: this also unlocks it */ 388 /* Invalidate the hpte. NOTE: this also unlocks it */
400 hptep->dw0.dword0 = 0; 389 hptep->v = 0;
401 } 390 }
402 391
403 j++; 392 j++;
diff --git a/arch/ppc64/mm/hash_utils.c b/arch/ppc64/mm/hash_utils.c
index 1647b1c6f28e..623b5d130c31 100644
--- a/arch/ppc64/mm/hash_utils.c
+++ b/arch/ppc64/mm/hash_utils.c
@@ -75,8 +75,8 @@
75extern unsigned long dart_tablebase; 75extern unsigned long dart_tablebase;
76#endif /* CONFIG_U3_DART */ 76#endif /* CONFIG_U3_DART */
77 77
78HPTE *htab_address; 78hpte_t *htab_address;
79unsigned long htab_hash_mask; 79unsigned long htab_hash_mask;
80 80
81extern unsigned long _SDR1; 81extern unsigned long _SDR1;
82 82
@@ -97,11 +97,15 @@ static inline void create_pte_mapping(unsigned long start, unsigned long end,
97 unsigned long addr; 97 unsigned long addr;
98 unsigned int step; 98 unsigned int step;
99 unsigned long tmp_mode; 99 unsigned long tmp_mode;
100 unsigned long vflags;
100 101
101 if (large) 102 if (large) {
102 step = 16*MB; 103 step = 16*MB;
103 else 104 vflags = HPTE_V_BOLTED | HPTE_V_LARGE;
105 } else {
104 step = 4*KB; 106 step = 4*KB;
107 vflags = HPTE_V_BOLTED;
108 }
105 109
106 for (addr = start; addr < end; addr += step) { 110 for (addr = start; addr < end; addr += step) {
107 unsigned long vpn, hash, hpteg; 111 unsigned long vpn, hash, hpteg;
@@ -129,12 +133,12 @@ static inline void create_pte_mapping(unsigned long start, unsigned long end,
129 if (systemcfg->platform & PLATFORM_LPAR) 133 if (systemcfg->platform & PLATFORM_LPAR)
130 ret = pSeries_lpar_hpte_insert(hpteg, va, 134 ret = pSeries_lpar_hpte_insert(hpteg, va,
131 virt_to_abs(addr) >> PAGE_SHIFT, 135 virt_to_abs(addr) >> PAGE_SHIFT,
132 0, tmp_mode, 1, large); 136 vflags, tmp_mode);
133 else 137 else
134#endif /* CONFIG_PPC_PSERIES */ 138#endif /* CONFIG_PPC_PSERIES */
135 ret = native_hpte_insert(hpteg, va, 139 ret = native_hpte_insert(hpteg, va,
136 virt_to_abs(addr) >> PAGE_SHIFT, 140 virt_to_abs(addr) >> PAGE_SHIFT,
137 0, tmp_mode, 1, large); 141 vflags, tmp_mode);
138 142
139 if (ret == -1) { 143 if (ret == -1) {
140 ppc64_terminate_msg(0x20, "create_pte_mapping"); 144 ppc64_terminate_msg(0x20, "create_pte_mapping");
diff --git a/arch/ppc64/mm/hugetlbpage.c b/arch/ppc64/mm/hugetlbpage.c
index fdcfe97c75c1..f9524602818d 100644
--- a/arch/ppc64/mm/hugetlbpage.c
+++ b/arch/ppc64/mm/hugetlbpage.c
@@ -583,7 +583,7 @@ int hash_huge_page(struct mm_struct *mm, unsigned long access,
583 pte_t *ptep; 583 pte_t *ptep;
584 unsigned long va, vpn; 584 unsigned long va, vpn;
585 pte_t old_pte, new_pte; 585 pte_t old_pte, new_pte;
586 unsigned long hpteflags, prpn; 586 unsigned long rflags, prpn;
587 long slot; 587 long slot;
588 int err = 1; 588 int err = 1;
589 589
@@ -626,9 +626,9 @@ int hash_huge_page(struct mm_struct *mm, unsigned long access,
626 old_pte = *ptep; 626 old_pte = *ptep;
627 new_pte = old_pte; 627 new_pte = old_pte;
628 628
629 hpteflags = 0x2 | (! (pte_val(new_pte) & _PAGE_RW)); 629 rflags = 0x2 | (! (pte_val(new_pte) & _PAGE_RW));
630 /* _PAGE_EXEC -> HW_NO_EXEC since it's inverted */ 630 /* _PAGE_EXEC -> HW_NO_EXEC since it's inverted */
631 hpteflags |= ((pte_val(new_pte) & _PAGE_EXEC) ? 0 : HW_NO_EXEC); 631 rflags |= ((pte_val(new_pte) & _PAGE_EXEC) ? 0 : HW_NO_EXEC);
632 632
633 /* Check if pte already has an hpte (case 2) */ 633 /* Check if pte already has an hpte (case 2) */
634 if (unlikely(pte_val(old_pte) & _PAGE_HASHPTE)) { 634 if (unlikely(pte_val(old_pte) & _PAGE_HASHPTE)) {
@@ -641,7 +641,7 @@ int hash_huge_page(struct mm_struct *mm, unsigned long access,
641 slot = (hash & htab_hash_mask) * HPTES_PER_GROUP; 641 slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
642 slot += (pte_val(old_pte) & _PAGE_GROUP_IX) >> 12; 642 slot += (pte_val(old_pte) & _PAGE_GROUP_IX) >> 12;
643 643
644 if (ppc_md.hpte_updatepp(slot, hpteflags, va, 1, local) == -1) 644 if (ppc_md.hpte_updatepp(slot, rflags, va, 1, local) == -1)
645 pte_val(old_pte) &= ~_PAGE_HPTEFLAGS; 645 pte_val(old_pte) &= ~_PAGE_HPTEFLAGS;
646 } 646 }
647 647
@@ -661,10 +661,10 @@ repeat:
661 661
662 /* Add in WIMG bits */ 662 /* Add in WIMG bits */
663 /* XXX We should store these in the pte */ 663 /* XXX We should store these in the pte */
664 hpteflags |= _PAGE_COHERENT; 664 rflags |= _PAGE_COHERENT;
665 665
666 slot = ppc_md.hpte_insert(hpte_group, va, prpn, 0, 666 slot = ppc_md.hpte_insert(hpte_group, va, prpn,
667 hpteflags, 0, 1); 667 HPTE_V_LARGE, rflags);
668 668
669 /* Primary is full, try the secondary */ 669 /* Primary is full, try the secondary */
670 if (unlikely(slot == -1)) { 670 if (unlikely(slot == -1)) {
@@ -672,7 +672,7 @@ repeat:
672 hpte_group = ((~hash & htab_hash_mask) * 672 hpte_group = ((~hash & htab_hash_mask) *
673 HPTES_PER_GROUP) & ~0x7UL; 673 HPTES_PER_GROUP) & ~0x7UL;
674 slot = ppc_md.hpte_insert(hpte_group, va, prpn, 674 slot = ppc_md.hpte_insert(hpte_group, va, prpn,
675 1, hpteflags, 0, 1); 675 HPTE_V_LARGE, rflags);
676 if (slot == -1) { 676 if (slot == -1) {
677 if (mftb() & 0x1) 677 if (mftb() & 0x1)
678 hpte_group = ((hash & htab_hash_mask) * HPTES_PER_GROUP) & ~0x7UL; 678 hpte_group = ((hash & htab_hash_mask) * HPTES_PER_GROUP) & ~0x7UL;
diff --git a/arch/ppc64/mm/init.c b/arch/ppc64/mm/init.c
index b50b3a446dbe..e58a24d42879 100644
--- a/arch/ppc64/mm/init.c
+++ b/arch/ppc64/mm/init.c
@@ -180,9 +180,10 @@ static int map_io_page(unsigned long ea, unsigned long pa, int flags)
180 hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP); 180 hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP);
181 181
182 /* Panic if a pte grpup is full */ 182 /* Panic if a pte grpup is full */
183 if (ppc_md.hpte_insert(hpteg, va, pa >> PAGE_SHIFT, 0, 183 if (ppc_md.hpte_insert(hpteg, va, pa >> PAGE_SHIFT,
184 _PAGE_NO_CACHE|_PAGE_GUARDED|PP_RWXX, 184 HPTE_V_BOLTED,
185 1, 0) == -1) { 185 _PAGE_NO_CACHE|_PAGE_GUARDED|PP_RWXX)
186 == -1) {
186 panic("map_io_page: could not insert mapping"); 187 panic("map_io_page: could not insert mapping");
187 } 188 }
188 } 189 }
diff --git a/include/asm-ppc64/iSeries/HvCallHpt.h b/include/asm-ppc64/iSeries/HvCallHpt.h
index 66f38222ff75..43a1969230b8 100644
--- a/include/asm-ppc64/iSeries/HvCallHpt.h
+++ b/include/asm-ppc64/iSeries/HvCallHpt.h
@@ -77,27 +77,26 @@ static inline u64 HvCallHpt_invalidateSetSwBitsGet(u32 hpteIndex, u8 bitson,
77 return compressedStatus; 77 return compressedStatus;
78} 78}
79 79
80static inline u64 HvCallHpt_findValid(HPTE *hpte, u64 vpn) 80static inline u64 HvCallHpt_findValid(hpte_t *hpte, u64 vpn)
81{ 81{
82 return HvCall3Ret16(HvCallHptFindValid, hpte, vpn, 0, 0); 82 return HvCall3Ret16(HvCallHptFindValid, hpte, vpn, 0, 0);
83} 83}
84 84
85static inline u64 HvCallHpt_findNextValid(HPTE *hpte, u32 hpteIndex, 85static inline u64 HvCallHpt_findNextValid(hpte_t *hpte, u32 hpteIndex,
86 u8 bitson, u8 bitsoff) 86 u8 bitson, u8 bitsoff)
87{ 87{
88 return HvCall3Ret16(HvCallHptFindNextValid, hpte, hpteIndex, 88 return HvCall3Ret16(HvCallHptFindNextValid, hpte, hpteIndex,
89 bitson, bitsoff); 89 bitson, bitsoff);
90} 90}
91 91
92static inline void HvCallHpt_get(HPTE *hpte, u32 hpteIndex) 92static inline void HvCallHpt_get(hpte_t *hpte, u32 hpteIndex)
93{ 93{
94 HvCall2Ret16(HvCallHptGet, hpte, hpteIndex, 0); 94 HvCall2Ret16(HvCallHptGet, hpte, hpteIndex, 0);
95} 95}
96 96
97static inline void HvCallHpt_addValidate(u32 hpteIndex, u32 hBit, HPTE *hpte) 97static inline void HvCallHpt_addValidate(u32 hpteIndex, u32 hBit, hpte_t *hpte)
98{ 98{
99 HvCall4(HvCallHptAddValidate, hpteIndex, hBit, (*((u64 *)hpte)), 99 HvCall4(HvCallHptAddValidate, hpteIndex, hBit, hpte->v, hpte->r);
100 (*(((u64 *)hpte)+1)));
101} 100}
102 101
103#endif /* _HVCALLHPT_H */ 102#endif /* _HVCALLHPT_H */
diff --git a/include/asm-ppc64/machdep.h b/include/asm-ppc64/machdep.h
index 1e6ad4824132..f0c1d2d92672 100644
--- a/include/asm-ppc64/machdep.h
+++ b/include/asm-ppc64/machdep.h
@@ -53,10 +53,8 @@ struct machdep_calls {
53 long (*hpte_insert)(unsigned long hpte_group, 53 long (*hpte_insert)(unsigned long hpte_group,
54 unsigned long va, 54 unsigned long va,
55 unsigned long prpn, 55 unsigned long prpn,
56 int secondary, 56 unsigned long vflags,
57 unsigned long hpteflags, 57 unsigned long rflags);
58 int bolted,
59 int large);
60 long (*hpte_remove)(unsigned long hpte_group); 58 long (*hpte_remove)(unsigned long hpte_group);
61 void (*flush_hash_range)(unsigned long context, 59 void (*flush_hash_range)(unsigned long context,
62 unsigned long number, 60 unsigned long number,
diff --git a/include/asm-ppc64/mmu.h b/include/asm-ppc64/mmu.h
index f373de5e3dd9..3d07ddd11e3b 100644
--- a/include/asm-ppc64/mmu.h
+++ b/include/asm-ppc64/mmu.h
@@ -60,6 +60,22 @@
60 60
61#define HPTES_PER_GROUP 8 61#define HPTES_PER_GROUP 8
62 62
63#define HPTE_V_AVPN_SHIFT 7
64#define HPTE_V_AVPN ASM_CONST(0xffffffffffffff80)
65#define HPTE_V_AVPN_VAL(x) (((x) & HPTE_V_AVPN) >> HPTE_V_AVPN_SHIFT)
66#define HPTE_V_BOLTED ASM_CONST(0x0000000000000010)
67#define HPTE_V_LOCK ASM_CONST(0x0000000000000008)
68#define HPTE_V_LARGE ASM_CONST(0x0000000000000004)
69#define HPTE_V_SECONDARY ASM_CONST(0x0000000000000002)
70#define HPTE_V_VALID ASM_CONST(0x0000000000000001)
71
72#define HPTE_R_PP0 ASM_CONST(0x8000000000000000)
73#define HPTE_R_TS ASM_CONST(0x4000000000000000)
74#define HPTE_R_RPN_SHIFT 12
75#define HPTE_R_RPN ASM_CONST(0x3ffffffffffff000)
76#define HPTE_R_FLAGS ASM_CONST(0x00000000000003ff)
77#define HPTE_R_PP ASM_CONST(0x0000000000000003)
78
63/* Values for PP (assumes Ks=0, Kp=1) */ 79/* Values for PP (assumes Ks=0, Kp=1) */
64/* pp0 will always be 0 for linux */ 80/* pp0 will always be 0 for linux */
65#define PP_RWXX 0 /* Supervisor read/write, User none */ 81#define PP_RWXX 0 /* Supervisor read/write, User none */
@@ -69,54 +85,13 @@
69 85
70#ifndef __ASSEMBLY__ 86#ifndef __ASSEMBLY__
71 87
72/* Hardware Page Table Entry */
73typedef struct {
74 unsigned long avpn:57; /* vsid | api == avpn */
75 unsigned long : 2; /* Software use */
76 unsigned long bolted: 1; /* HPTE is "bolted" */
77 unsigned long lock: 1; /* lock on pSeries SMP */
78 unsigned long l: 1; /* Virtual page is large (L=1) or 4 KB (L=0) */
79 unsigned long h: 1; /* Hash function identifier */
80 unsigned long v: 1; /* Valid (v=1) or invalid (v=0) */
81} Hpte_dword0;
82
83typedef struct {
84 unsigned long pp0: 1; /* Page protection bit 0 */
85 unsigned long ts: 1; /* Tag set bit */
86 unsigned long rpn: 50; /* Real page number */
87 unsigned long : 2; /* Reserved */
88 unsigned long ac: 1; /* Address compare */
89 unsigned long r: 1; /* Referenced */
90 unsigned long c: 1; /* Changed */
91 unsigned long w: 1; /* Write-thru cache mode */
92 unsigned long i: 1; /* Cache inhibited */
93 unsigned long m: 1; /* Memory coherence required */
94 unsigned long g: 1; /* Guarded */
95 unsigned long n: 1; /* No-execute */
96 unsigned long pp: 2; /* Page protection bits 1:2 */
97} Hpte_dword1;
98
99typedef struct {
100 char padding[6]; /* padding */
101 unsigned long : 6; /* padding */
102 unsigned long flags: 10; /* HPTE flags */
103} Hpte_dword1_flags;
104
105typedef struct { 88typedef struct {
106 union { 89 unsigned long v;
107 unsigned long dword0; 90 unsigned long r;
108 Hpte_dword0 dw0; 91} hpte_t;
109 } dw0;
110
111 union {
112 unsigned long dword1;
113 Hpte_dword1 dw1;
114 Hpte_dword1_flags flags;
115 } dw1;
116} HPTE;
117 92
118extern HPTE * htab_address; 93extern hpte_t *htab_address;
119extern unsigned long htab_hash_mask; 94extern unsigned long htab_hash_mask;
120 95
121static inline unsigned long hpt_hash(unsigned long vpn, int large) 96static inline unsigned long hpt_hash(unsigned long vpn, int large)
122{ 97{
@@ -181,18 +156,18 @@ static inline void tlbiel(unsigned long va)
181 asm volatile("ptesync": : :"memory"); 156 asm volatile("ptesync": : :"memory");
182} 157}
183 158
184static inline unsigned long slot2va(unsigned long avpn, unsigned long large, 159static inline unsigned long slot2va(unsigned long hpte_v, unsigned long slot)
185 unsigned long secondary, unsigned long slot)
186{ 160{
161 unsigned long avpn = HPTE_V_AVPN_VAL(hpte_v);
187 unsigned long va; 162 unsigned long va;
188 163
189 va = avpn << 23; 164 va = avpn << 23;
190 165
191 if (!large) { 166 if (! (hpte_v & HPTE_V_LARGE)) {
192 unsigned long vpi, pteg; 167 unsigned long vpi, pteg;
193 168
194 pteg = slot / HPTES_PER_GROUP; 169 pteg = slot / HPTES_PER_GROUP;
195 if (secondary) 170 if (hpte_v & HPTE_V_SECONDARY)
196 pteg = ~pteg; 171 pteg = ~pteg;
197 172
198 vpi = ((va >> 28) ^ pteg) & htab_hash_mask; 173 vpi = ((va >> 28) ^ pteg) & htab_hash_mask;
@@ -219,11 +194,11 @@ extern void hpte_init_iSeries(void);
219 194
220extern long pSeries_lpar_hpte_insert(unsigned long hpte_group, 195extern long pSeries_lpar_hpte_insert(unsigned long hpte_group,
221 unsigned long va, unsigned long prpn, 196 unsigned long va, unsigned long prpn,
222 int secondary, unsigned long hpteflags, 197 unsigned long vflags,
223 int bolted, int large); 198 unsigned long rflags);
224extern long native_hpte_insert(unsigned long hpte_group, unsigned long va, 199extern long native_hpte_insert(unsigned long hpte_group, unsigned long va,
225 unsigned long prpn, int secondary, 200 unsigned long prpn,
226 unsigned long hpteflags, int bolted, int large); 201 unsigned long vflags, unsigned long rflags);
227 202
228#endif /* __ASSEMBLY__ */ 203#endif /* __ASSEMBLY__ */
229 204
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-25 13:26:40 -0400