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authorjoe@perches.com <joe@perches.com>2007-12-17 14:30:13 -0500
committerPaul Mackerras <paulus@samba.org>2007-12-20 00:17:44 -0500
commit567e9fdd49bcfa7e15ebc0005853ac5529c81856 (patch)
treed1b22a2f9f3ef929bdd479e72f0eb4c66e3aebf0
parent00d70419fc8f86db94f56e0191be392c4a57f244 (diff)
[POWERPC] include/asm-powerpc/: Spelling fixes
Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
-rw-r--r--include/asm-powerpc/8xx_immap.h2
-rw-r--r--include/asm-powerpc/commproc.h2
-rw-r--r--include/asm-powerpc/iseries/hv_lp_event.h2
-rw-r--r--include/asm-powerpc/reg_booke.h2
-rw-r--r--include/asm-powerpc/smu.h10
-rw-r--r--include/asm-powerpc/spu.h2
-rw-r--r--include/asm-powerpc/spu_csa.h2
7 files changed, 11 insertions, 11 deletions
diff --git a/include/asm-powerpc/8xx_immap.h b/include/asm-powerpc/8xx_immap.h
index 1311cefdfd30..4b0e15206006 100644
--- a/include/asm-powerpc/8xx_immap.h
+++ b/include/asm-powerpc/8xx_immap.h
@@ -123,7 +123,7 @@ typedef struct mem_ctlr {
123#define OR_G5LA 0x00000400 /* Output #GPL5 on #GPL_A5 */ 123#define OR_G5LA 0x00000400 /* Output #GPL5 on #GPL_A5 */
124#define OR_G5LS 0x00000200 /* Drive #GPL high on falling edge of...*/ 124#define OR_G5LS 0x00000200 /* Drive #GPL high on falling edge of...*/
125#define OR_BI 0x00000100 /* Burst inhibit */ 125#define OR_BI 0x00000100 /* Burst inhibit */
126#define OR_SCY_MSK 0x000000f0 /* Cycle Lenght in Clocks */ 126#define OR_SCY_MSK 0x000000f0 /* Cycle Length in Clocks */
127#define OR_SCY_0_CLK 0x00000000 /* 0 clock cycles wait states */ 127#define OR_SCY_0_CLK 0x00000000 /* 0 clock cycles wait states */
128#define OR_SCY_1_CLK 0x00000010 /* 1 clock cycles wait states */ 128#define OR_SCY_1_CLK 0x00000010 /* 1 clock cycles wait states */
129#define OR_SCY_2_CLK 0x00000020 /* 2 clock cycles wait states */ 129#define OR_SCY_2_CLK 0x00000020 /* 2 clock cycles wait states */
diff --git a/include/asm-powerpc/commproc.h b/include/asm-powerpc/commproc.h
index a2328b8addd8..0e192cc3ead2 100644
--- a/include/asm-powerpc/commproc.h
+++ b/include/asm-powerpc/commproc.h
@@ -693,7 +693,7 @@ typedef struct risc_timer_pram {
693#define CICR_SCC_SCC3 ((uint)0x00200000) /* SCC3 @ SCCc */ 693#define CICR_SCC_SCC3 ((uint)0x00200000) /* SCC3 @ SCCc */
694#define CICR_SCB_SCC2 ((uint)0x00040000) /* SCC2 @ SCCb */ 694#define CICR_SCB_SCC2 ((uint)0x00040000) /* SCC2 @ SCCb */
695#define CICR_SCA_SCC1 ((uint)0x00000000) /* SCC1 @ SCCa */ 695#define CICR_SCA_SCC1 ((uint)0x00000000) /* SCC1 @ SCCa */
696#define CICR_IRL_MASK ((uint)0x0000e000) /* Core interrrupt */ 696#define CICR_IRL_MASK ((uint)0x0000e000) /* Core interrupt */
697#define CICR_HP_MASK ((uint)0x00001f00) /* Hi-pri int. */ 697#define CICR_HP_MASK ((uint)0x00001f00) /* Hi-pri int. */
698#define CICR_IEN ((uint)0x00000080) /* Int. enable */ 698#define CICR_IEN ((uint)0x00000080) /* Int. enable */
699#define CICR_SPS ((uint)0x00000001) /* SCC Spread */ 699#define CICR_SPS ((uint)0x00000001) /* SCC Spread */
diff --git a/include/asm-powerpc/iseries/hv_lp_event.h b/include/asm-powerpc/iseries/hv_lp_event.h
index 6ce2ce1e2690..8f5da7d77202 100644
--- a/include/asm-powerpc/iseries/hv_lp_event.h
+++ b/include/asm-powerpc/iseries/hv_lp_event.h
@@ -78,7 +78,7 @@ extern int HvLpEvent_openPath(HvLpEvent_Type eventType, HvLpIndex lpIndex);
78 78
79/* 79/*
80 * Close an Lp Event Path for a type and partition 80 * Close an Lp Event Path for a type and partition
81 * returns 0 on sucess 81 * returns 0 on success
82 */ 82 */
83extern int HvLpEvent_closePath(HvLpEvent_Type eventType, HvLpIndex lpIndex); 83extern int HvLpEvent_closePath(HvLpEvent_Type eventType, HvLpIndex lpIndex);
84 84
diff --git a/include/asm-powerpc/reg_booke.h b/include/asm-powerpc/reg_booke.h
index 98350f0f92c9..d3e8dd0fc738 100644
--- a/include/asm-powerpc/reg_booke.h
+++ b/include/asm-powerpc/reg_booke.h
@@ -304,7 +304,7 @@
304#define ESR_IMCB 0x20000000 /* Instr. Machine Check - Bus error */ 304#define ESR_IMCB 0x20000000 /* Instr. Machine Check - Bus error */
305#define ESR_IMCT 0x10000000 /* Instr. Machine Check - Timeout */ 305#define ESR_IMCT 0x10000000 /* Instr. Machine Check - Timeout */
306#define ESR_PIL 0x08000000 /* Program Exception - Illegal */ 306#define ESR_PIL 0x08000000 /* Program Exception - Illegal */
307#define ESR_PPR 0x04000000 /* Program Exception - Priveleged */ 307#define ESR_PPR 0x04000000 /* Program Exception - Privileged */
308#define ESR_PTR 0x02000000 /* Program Exception - Trap */ 308#define ESR_PTR 0x02000000 /* Program Exception - Trap */
309#define ESR_FP 0x01000000 /* Floating Point Operation */ 309#define ESR_FP 0x01000000 /* Floating Point Operation */
310#define ESR_DST 0x00800000 /* Storage Exception - Data miss */ 310#define ESR_DST 0x00800000 /* Storage Exception - Data miss */
diff --git a/include/asm-powerpc/smu.h b/include/asm-powerpc/smu.h
index 76329f451aba..7ae2753da565 100644
--- a/include/asm-powerpc/smu.h
+++ b/include/asm-powerpc/smu.h
@@ -22,7 +22,7 @@
22 * Partition info commands 22 * Partition info commands
23 * 23 *
24 * These commands are used to retrieve the sdb-partition-XX datas from 24 * These commands are used to retrieve the sdb-partition-XX datas from
25 * the SMU. The lenght is always 2. First byte is the subcommand code 25 * the SMU. The length is always 2. First byte is the subcommand code
26 * and second byte is the partition ID. 26 * and second byte is the partition ID.
27 * 27 *
28 * The reply is 6 bytes: 28 * The reply is 6 bytes:
@@ -176,9 +176,9 @@
176 * data length is that of the string. 176 * data length is that of the string.
177 * 177 *
178 * The VSLEW command can be used to get or set the voltage slewing. 178 * The VSLEW command can be used to get or set the voltage slewing.
179 * - lenght 5 (only "VSLEW") : it returns "DONE" and 3 bytes of 179 * - length 5 (only "VSLEW") : it returns "DONE" and 3 bytes of
180 * reply at data offset 6, 7 and 8. 180 * reply at data offset 6, 7 and 8.
181 * - lenght 8 ("VSLEWxyz") has 3 additional bytes appended, and is 181 * - length 8 ("VSLEWxyz") has 3 additional bytes appended, and is
182 * used to set the voltage slewing point. The SMU replies with "DONE" 182 * used to set the voltage slewing point. The SMU replies with "DONE"
183 * I yet have to figure out their exact meaning of those 3 bytes in 183 * I yet have to figure out their exact meaning of those 3 bytes in
184 * both cases. They seem to be: 184 * both cases. They seem to be:
@@ -688,13 +688,13 @@ struct smu_user_cmd_hdr
688 688
689 __u8 cmd; /* SMU command byte */ 689 __u8 cmd; /* SMU command byte */
690 __u8 pad[3]; /* padding */ 690 __u8 pad[3]; /* padding */
691 __u32 data_len; /* Lenght of data following */ 691 __u32 data_len; /* Length of data following */
692}; 692};
693 693
694struct smu_user_reply_hdr 694struct smu_user_reply_hdr
695{ 695{
696 __u32 status; /* Command status */ 696 __u32 status; /* Command status */
697 __u32 reply_len; /* Lenght of data follwing */ 697 __u32 reply_len; /* Length of data follwing */
698}; 698};
699 699
700#endif /* _SMU_H */ 700#endif /* _SMU_H */
diff --git a/include/asm-powerpc/spu.h b/include/asm-powerpc/spu.h
index 314aad357d98..90aadf5bed2c 100644
--- a/include/asm-powerpc/spu.h
+++ b/include/asm-powerpc/spu.h
@@ -304,7 +304,7 @@ int spu_switch_event_register(struct notifier_block * n);
304int spu_switch_event_unregister(struct notifier_block * n); 304int spu_switch_event_unregister(struct notifier_block * n);
305 305
306/* 306/*
307 * This defines the Local Store, Problem Area and Privlege Area of an SPU. 307 * This defines the Local Store, Problem Area and Privilege Area of an SPU.
308 */ 308 */
309 309
310union mfc_tag_size_class_cmd { 310union mfc_tag_size_class_cmd {
diff --git a/include/asm-powerpc/spu_csa.h b/include/asm-powerpc/spu_csa.h
index e87794d5d4ea..867bc2667330 100644
--- a/include/asm-powerpc/spu_csa.h
+++ b/include/asm-powerpc/spu_csa.h
@@ -194,7 +194,7 @@ struct spu_priv1_collapsed {
194}; 194};
195 195
196/* 196/*
197 * struct spu_priv2_collapsed - condensed priviliged 2 area, w/o pads. 197 * struct spu_priv2_collapsed - condensed privileged 2 area, w/o pads.
198 */ 198 */
199struct spu_priv2_collapsed { 199struct spu_priv2_collapsed {
200 u64 slb_index_W; 200 u64 slb_index_W;