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authorMarcelo Tosatti <marcelo.tosatti@cyclades.com>2005-11-05 11:06:24 -0500
committerPaul Mackerras <paulus@samba.org>2005-11-06 20:37:12 -0500
commit55b6332ec89a5fc65d1287708cfd9f06f7a88b90 (patch)
tree12dc1f0a94e222c0577f439e06e49d80cd969f21
parentc6d95044a2e124b606b78896a3a2d512e90ef65c (diff)
[PATCH] ppc32: handle access to non-present IO ports on 8xx
This adds exception table entries for I/O instructions on and changes MachineCheckException() slightly to cover 8xx specifics (on 8xx the MCE can be generated while executing the IO access instruction itself, which is not the case on PowerMac's, as the comment on traps.c details). Signed-off-by: Marcelo Tosatti <marcelo.tosatti@cyclades.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat
-rw-r--r--arch/ppc/kernel/misc.S145
-rw-r--r--arch/ppc/kernel/traps.c8
-rw-r--r--include/asm-ppc/io.h12
3 files changed, 138 insertions, 27 deletions
diff --git a/arch/ppc/kernel/misc.S b/arch/ppc/kernel/misc.S
index 3056ede2424d..ae6af29938a1 100644
--- a/arch/ppc/kernel/misc.S
+++ b/arch/ppc/kernel/misc.S
@@ -25,6 +25,11 @@
25#include <asm/thread_info.h> 25#include <asm/thread_info.h>
26#include <asm/asm-offsets.h> 26#include <asm/asm-offsets.h>
27 27
28#ifdef CONFIG_8xx
29#define ISYNC_8xx isync
30#else
31#define ISYNC_8xx
32#endif
28 .text 33 .text
29 34
30 .align 5 35 .align 5
@@ -800,8 +805,18 @@ _GLOBAL(_insb)
800 subi r4,r4,1 805 subi r4,r4,1
801 blelr- 806 blelr-
80200: lbz r5,0(r3) 80700: lbz r5,0(r3)
803 eieio 80801: eieio
804 stbu r5,1(r4) 80902: stbu r5,1(r4)
810 ISYNC_8xx
811 .section .fixup,"ax"
81203: blr
813 .text
814 .section __ex_table, "a"
815 .align 2
816 .long 00b, 03b
817 .long 01b, 03b
818 .long 02b, 03b
819 .text
805 bdnz 00b 820 bdnz 00b
806 blr 821 blr
807 822
@@ -811,8 +826,18 @@ _GLOBAL(_outsb)
811 subi r4,r4,1 826 subi r4,r4,1
812 blelr- 827 blelr-
81300: lbzu r5,1(r4) 82800: lbzu r5,1(r4)
814 stb r5,0(r3) 82901: stb r5,0(r3)
815 eieio 83002: eieio
831 ISYNC_8xx
832 .section .fixup,"ax"
83303: blr
834 .text
835 .section __ex_table, "a"
836 .align 2
837 .long 00b, 03b
838 .long 01b, 03b
839 .long 02b, 03b
840 .text
816 bdnz 00b 841 bdnz 00b
817 blr 842 blr
818 843
@@ -822,8 +847,18 @@ _GLOBAL(_insw)
822 subi r4,r4,2 847 subi r4,r4,2
823 blelr- 848 blelr-
82400: lhbrx r5,0,r3 84900: lhbrx r5,0,r3
825 eieio 85001: eieio
826 sthu r5,2(r4) 85102: sthu r5,2(r4)
852 ISYNC_8xx
853 .section .fixup,"ax"
85403: blr
855 .text
856 .section __ex_table, "a"
857 .align 2
858 .long 00b, 03b
859 .long 01b, 03b
860 .long 02b, 03b
861 .text
827 bdnz 00b 862 bdnz 00b
828 blr 863 blr
829 864
@@ -833,8 +868,18 @@ _GLOBAL(_outsw)
833 subi r4,r4,2 868 subi r4,r4,2
834 blelr- 869 blelr-
83500: lhzu r5,2(r4) 87000: lhzu r5,2(r4)
836 eieio 87101: eieio
837 sthbrx r5,0,r3 87202: sthbrx r5,0,r3
873 ISYNC_8xx
874 .section .fixup,"ax"
87503: blr
876 .text
877 .section __ex_table, "a"
878 .align 2
879 .long 00b, 03b
880 .long 01b, 03b
881 .long 02b, 03b
882 .text
838 bdnz 00b 883 bdnz 00b
839 blr 884 blr
840 885
@@ -844,8 +889,18 @@ _GLOBAL(_insl)
844 subi r4,r4,4 889 subi r4,r4,4
845 blelr- 890 blelr-
84600: lwbrx r5,0,r3 89100: lwbrx r5,0,r3
847 eieio 89201: eieio
848 stwu r5,4(r4) 89302: stwu r5,4(r4)
894 ISYNC_8xx
895 .section .fixup,"ax"
89603: blr
897 .text
898 .section __ex_table, "a"
899 .align 2
900 .long 00b, 03b
901 .long 01b, 03b
902 .long 02b, 03b
903 .text
849 bdnz 00b 904 bdnz 00b
850 blr 905 blr
851 906
@@ -855,8 +910,18 @@ _GLOBAL(_outsl)
855 subi r4,r4,4 910 subi r4,r4,4
856 blelr- 911 blelr-
85700: lwzu r5,4(r4) 91200: lwzu r5,4(r4)
858 stwbrx r5,0,r3 91301: stwbrx r5,0,r3
859 eieio 91402: eieio
915 ISYNC_8xx
916 .section .fixup,"ax"
91703: blr
918 .text
919 .section __ex_table, "a"
920 .align 2
921 .long 00b, 03b
922 .long 01b, 03b
923 .long 02b, 03b
924 .text
860 bdnz 00b 925 bdnz 00b
861 blr 926 blr
862 927
@@ -867,8 +932,18 @@ _GLOBAL(_insw_ns)
867 subi r4,r4,2 932 subi r4,r4,2
868 blelr- 933 blelr-
86900: lhz r5,0(r3) 93400: lhz r5,0(r3)
870 eieio 93501: eieio
871 sthu r5,2(r4) 93602: sthu r5,2(r4)
937 ISYNC_8xx
938 .section .fixup,"ax"
93903: blr
940 .text
941 .section __ex_table, "a"
942 .align 2
943 .long 00b, 03b
944 .long 01b, 03b
945 .long 02b, 03b
946 .text
872 bdnz 00b 947 bdnz 00b
873 blr 948 blr
874 949
@@ -879,8 +954,18 @@ _GLOBAL(_outsw_ns)
879 subi r4,r4,2 954 subi r4,r4,2
880 blelr- 955 blelr-
88100: lhzu r5,2(r4) 95600: lhzu r5,2(r4)
882 sth r5,0(r3) 95701: sth r5,0(r3)
883 eieio 95802: eieio
959 ISYNC_8xx
960 .section .fixup,"ax"
96103: blr
962 .text
963 .section __ex_table, "a"
964 .align 2
965 .long 00b, 03b
966 .long 01b, 03b
967 .long 02b, 03b
968 .text
884 bdnz 00b 969 bdnz 00b
885 blr 970 blr
886 971
@@ -891,8 +976,18 @@ _GLOBAL(_insl_ns)
891 subi r4,r4,4 976 subi r4,r4,4
892 blelr- 977 blelr-
89300: lwz r5,0(r3) 97800: lwz r5,0(r3)
894 eieio 97901: eieio
895 stwu r5,4(r4) 98002: stwu r5,4(r4)
981 ISYNC_8xx
982 .section .fixup,"ax"
98303: blr
984 .text
985 .section __ex_table, "a"
986 .align 2
987 .long 00b, 03b
988 .long 01b, 03b
989 .long 02b, 03b
990 .text
896 bdnz 00b 991 bdnz 00b
897 blr 992 blr
898 993
@@ -903,8 +998,18 @@ _GLOBAL(_outsl_ns)
903 subi r4,r4,4 998 subi r4,r4,4
904 blelr- 999 blelr-
90500: lwzu r5,4(r4) 100000: lwzu r5,4(r4)
906 stw r5,0(r3) 100101: stw r5,0(r3)
907 eieio 100202: eieio
1003 ISYNC_8xx
1004 .section .fixup,"ax"
100503: blr
1006 .text
1007 .section __ex_table, "a"
1008 .align 2
1009 .long 00b, 03b
1010 .long 01b, 03b
1011 .long 02b, 03b
1012 .text
908 bdnz 00b 1013 bdnz 00b
909 blr 1014 blr
910 1015
diff --git a/arch/ppc/kernel/traps.c b/arch/ppc/kernel/traps.c
index 16adde6b429d..42d980e82bdc 100644
--- a/arch/ppc/kernel/traps.c
+++ b/arch/ppc/kernel/traps.c
@@ -159,7 +159,7 @@ void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
159 */ 159 */
160static inline int check_io_access(struct pt_regs *regs) 160static inline int check_io_access(struct pt_regs *regs)
161{ 161{
162#ifdef CONFIG_PPC_PMAC 162#if defined CONFIG_PPC_PMAC || defined CONFIG_8xx
163 unsigned long msr = regs->msr; 163 unsigned long msr = regs->msr;
164 const struct exception_table_entry *entry; 164 const struct exception_table_entry *entry;
165 unsigned int *nip = (unsigned int *)regs->nip; 165 unsigned int *nip = (unsigned int *)regs->nip;
@@ -178,7 +178,11 @@ static inline int check_io_access(struct pt_regs *regs)
178 nip -= 2; 178 nip -= 2;
179 else if (*nip == 0x4c00012c) /* isync */ 179 else if (*nip == 0x4c00012c) /* isync */
180 --nip; 180 --nip;
181 if (*nip == 0x7c0004ac || (*nip >> 26) == 3) { 181 /* eieio from I/O string functions */
182 else if ((*nip) == 0x7c0006ac || *(nip+1) == 0x7c0006ac)
183 nip += 2;
184 if (*nip == 0x7c0004ac || (*nip >> 26) == 3 ||
185 (*(nip+1) >> 26) == 3) {
182 /* sync or twi */ 186 /* sync or twi */
183 unsigned int rb; 187 unsigned int rb;
184 188
diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h
index f7f614dfc648..2bfdf9c98459 100644
--- a/include/asm-ppc/io.h
+++ b/include/asm-ppc/io.h
@@ -237,9 +237,9 @@ static inline void __raw_writel(__u32 b, volatile void __iomem *addr)
237#define outsl(port, buf, nl) _outsl_ns((port)+___IO_BASE, (buf), (nl)) 237#define outsl(port, buf, nl) _outsl_ns((port)+___IO_BASE, (buf), (nl))
238 238
239/* 239/*
240 * On powermacs, we will get a machine check exception if we 240 * On powermacs and 8xx we will get a machine check exception
241 * try to read data from a non-existent I/O port. Because the 241 * if we try to read data from a non-existent I/O port. Because
242 * machine check is an asynchronous exception, it isn't 242 * the machine check is an asynchronous exception, it isn't
243 * well-defined which instruction SRR0 will point to when the 243 * well-defined which instruction SRR0 will point to when the
244 * exception occurs. 244 * exception occurs.
245 * With the sequence below (twi; isync; nop), we have found that 245 * With the sequence below (twi; isync; nop), we have found that
@@ -258,7 +258,7 @@ extern __inline__ unsigned int name(unsigned int port) \
258{ \ 258{ \
259 unsigned int x; \ 259 unsigned int x; \
260 __asm__ __volatile__( \ 260 __asm__ __volatile__( \
261 op " %0,0,%1\n" \ 261 "0:" op " %0,0,%1\n" \
262 "1: twi 0,%0,0\n" \ 262 "1: twi 0,%0,0\n" \
263 "2: isync\n" \ 263 "2: isync\n" \
264 "3: nop\n" \ 264 "3: nop\n" \
@@ -269,6 +269,7 @@ extern __inline__ unsigned int name(unsigned int port) \
269 ".previous\n" \ 269 ".previous\n" \
270 ".section __ex_table,\"a\"\n" \ 270 ".section __ex_table,\"a\"\n" \
271 " .align 2\n" \ 271 " .align 2\n" \
272 " .long 0b,5b\n" \
272 " .long 1b,5b\n" \ 273 " .long 1b,5b\n" \
273 " .long 2b,5b\n" \ 274 " .long 2b,5b\n" \
274 " .long 3b,5b\n" \ 275 " .long 3b,5b\n" \
@@ -282,11 +283,12 @@ extern __inline__ unsigned int name(unsigned int port) \
282extern __inline__ void name(unsigned int val, unsigned int port) \ 283extern __inline__ void name(unsigned int val, unsigned int port) \
283{ \ 284{ \
284 __asm__ __volatile__( \ 285 __asm__ __volatile__( \
285 op " %0,0,%1\n" \ 286 "0:" op " %0,0,%1\n" \
286 "1: sync\n" \ 287 "1: sync\n" \
287 "2:\n" \ 288 "2:\n" \
288 ".section __ex_table,\"a\"\n" \ 289 ".section __ex_table,\"a\"\n" \
289 " .align 2\n" \ 290 " .align 2\n" \
291 " .long 0b,2b\n" \
290 " .long 1b,2b\n" \ 292 " .long 1b,2b\n" \
291 ".previous" \ 293 ".previous" \
292 : : "r" (val), "r" (port + ___IO_BASE)); \ 294 : : "r" (val), "r" (port + ___IO_BASE)); \
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