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authorSam Ravnborg <sam@ravnborg.org>2008-12-07 03:03:26 -0500
committerDavid S. Miller <davem@davemloft.net>2008-12-07 03:03:26 -0500
commit2bf05fa03ea10e7dcfd38cc8643bbb29c3ad6f9e (patch)
tree014ae19168498dc4184722616f037121c683f510
parent53ae341926b1238af3170f2f306f52a22430776c (diff)
sparc: expand cpu table
Prepare cputable to include sparc64 versions Declare it __initconst so it can be dropped after init Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--arch/sparc/kernel/cpu_32.c319
1 files changed, 195 insertions, 124 deletions
diff --git a/arch/sparc/kernel/cpu_32.c b/arch/sparc/kernel/cpu_32.c
index 4e14240f9ce3..60528227e591 100644
--- a/arch/sparc/kernel/cpu_32.c
+++ b/arch/sparc/kernel/cpu_32.c
@@ -19,158 +19,229 @@
19 19
20DEFINE_PER_CPU(cpuinfo_sparc, __cpu_data) = { 0 }; 20DEFINE_PER_CPU(cpuinfo_sparc, __cpu_data) = { 0 };
21 21
22struct cpu_iu_info { 22struct cpu_info {
23 int psr_impl;
24 int psr_vers; 23 int psr_vers;
25 char *cpu_name; /* should be enough I hope... */ 24 const char *name;
26}; 25};
27 26
28struct cpu_fp_info { 27struct fpu_info {
29 int psr_impl;
30 int fp_vers; 28 int fp_vers;
31 char *fp_name; 29 const char *name;
32}; 30};
33 31
34/* In order to get the fpu type correct, you need to take the IDPROM's 32#define NOCPU 8
35 * machine type value into consideration too. I will fix this. 33#define NOFPU 8
36 */ 34
37#define CPU_FP(psr, ver, name) \ 35struct manufacturer_info {
38{ .psr_impl = (psr), .fp_vers = (ver), .fp_name = (name) } 36 int psr_impl;
39static struct cpu_fp_info linux_sparc_fpu[] = { 37 struct cpu_info cpu_info[NOCPU];
40 CPU_FP(0, 0, "Fujitsu MB86910 or Weitek WTL1164/5"), 38 struct fpu_info fpu_info[NOFPU];
41 CPU_FP(0, 1, "Fujitsu MB86911 or Weitek WTL1164/5 or LSI L64831"),
42 CPU_FP(0, 2, "LSI Logic L64802 or Texas Instruments ACT8847"),
43 /* SparcStation SLC, SparcStation1 */
44 CPU_FP(0, 3, "Weitek WTL3170/2"),
45 /* SPARCstation-5 */
46 CPU_FP(0, 4, "Lsi Logic/Meiko L64804 or compatible"),
47 CPU_FP(0, 5, "reserved"),
48 CPU_FP(0, 6, "reserved"),
49 CPU_FP(0, 7, "No FPU"),
50 CPU_FP(1, 0, "ROSS HyperSparc combined IU/FPU"),
51 CPU_FP(1, 1, "Lsi Logic L64814"),
52 CPU_FP(1, 2, "Texas Instruments TMS390-C602A"),
53 CPU_FP(1, 3, "Cypress CY7C602 FPU"),
54 CPU_FP(1, 4, "reserved"),
55 CPU_FP(1, 5, "reserved"),
56 CPU_FP(1, 6, "reserved"),
57 CPU_FP(1, 7, "No FPU"),
58 CPU_FP(2, 0, "BIT B5010 or B5110/20 or B5210"),
59 CPU_FP(2, 1, "reserved"),
60 CPU_FP(2, 2, "reserved"),
61 CPU_FP(2, 3, "reserved"),
62 CPU_FP(2, 4, "reserved"),
63 CPU_FP(2, 5, "reserved"),
64 CPU_FP(2, 6, "reserved"),
65 CPU_FP(2, 7, "No FPU"),
66 /* SuperSparc 50 module */
67 CPU_FP(4, 0, "SuperSparc on-chip FPU"),
68 /* SparcClassic */
69 CPU_FP(4, 4, "TI MicroSparc on chip FPU"),
70 CPU_FP(5, 0, "Matsushita MN10501"),
71 CPU_FP(5, 1, "reserved"),
72 CPU_FP(5, 2, "reserved"),
73 CPU_FP(5, 3, "reserved"),
74 CPU_FP(5, 4, "reserved"),
75 CPU_FP(5, 5, "reserved"),
76 CPU_FP(5, 6, "reserved"),
77 CPU_FP(5, 7, "No FPU"),
78 CPU_FP(9, 3, "Fujitsu or Weitek on-chip FPU"),
79}; 39};
80 40
81#define NSPARCFPU ARRAY_SIZE(linux_sparc_fpu) 41#define CPU(ver, _name) \
42{ .psr_vers = ver, .name = _name }
43
44#define FPU(ver, _name) \
45{ .fp_vers = ver, .name = _name }
82 46
83#define CPU_INFO(psr, ver, name) \ 47static const struct manufacturer_info __initconst manufacturer_info[] = {
84{ .psr_impl = (psr), .psr_vers = (ver), .cpu_name = (name) } 48{
85static struct cpu_iu_info linux_sparc_chips[] = { 49 0,
86 /* Sun4/100, 4/200, SLC */ 50 /* Sun4/100, 4/200, SLC */
87 CPU_INFO(0, 0, "Fujitsu MB86900/1A or LSI L64831 SparcKIT-40"), 51 .cpu_info = {
88 /* borned STP1012PGA */ 52 CPU(0, "Fujitsu MB86900/1A or LSI L64831 SparcKIT-40"),
89 CPU_INFO(0, 4, "Fujitsu MB86904"), 53 /* borned STP1012PGA */
90 CPU_INFO(0, 5, "Fujitsu TurboSparc MB86907"), 54 CPU(4, "Fujitsu MB86904"),
91 /* SparcStation2, SparcServer 490 & 690 */ 55 CPU(5, "Fujitsu TurboSparc MB86907"),
92 CPU_INFO(1, 0, "LSI Logic Corporation - L64811"), 56 CPU(-1, NULL)
93 /* SparcStation2 */ 57 },
94 CPU_INFO(1, 1, "Cypress/ROSS CY7C601"), 58 .fpu_info = {
95 /* Embedded controller */ 59 FPU(0, "Fujitsu MB86910 or Weitek WTL1164/5"),
96 CPU_INFO(1, 3, "Cypress/ROSS CY7C611"), 60 FPU(1, "Fujitsu MB86911 or Weitek WTL1164/5 or LSI L64831"),
97 /* Ross Technologies HyperSparc */ 61 FPU(2, "LSI Logic L64802 or Texas Instruments ACT8847"),
98 CPU_INFO(1, 0xf, "ROSS HyperSparc RT620"), 62 /* SparcStation SLC, SparcStation1 */
99 CPU_INFO(1, 0xe, "ROSS HyperSparc RT625 or RT626"), 63 FPU(3, "Weitek WTL3170/2"),
100 /* ECL Implementation, CRAY S-MP Supercomputer... AIEEE! */ 64 /* SPARCstation-5 */
101 /* Someone please write the code to support this beast! ;) */ 65 FPU(4, "Lsi Logic/Meiko L64804 or compatible"),
102 CPU_INFO(2, 0, "Bipolar Integrated Technology - B5010"), 66 FPU(-1, NULL)
103 CPU_INFO(3, 0, "LSI Logic Corporation - unknown-type"), 67 }
104 CPU_INFO(4, 0, "Texas Instruments, Inc. - SuperSparc-(II)"), 68},{
105 /* SparcClassic -- borned STP1010TAB-50*/ 69 1,
106 CPU_INFO(4, 1, "Texas Instruments, Inc. - MicroSparc"), 70 .cpu_info = {
107 CPU_INFO(4, 2, "Texas Instruments, Inc. - MicroSparc II"), 71 /* SparcStation2, SparcServer 490 & 690 */
108 CPU_INFO(4, 3, "Texas Instruments, Inc. - SuperSparc 51"), 72 CPU(0, "LSI Logic Corporation - L64811"),
109 CPU_INFO(4, 4, "Texas Instruments, Inc. - SuperSparc 61"), 73 /* SparcStation2 */
110 CPU_INFO(4, 5, "Texas Instruments, Inc. - unknown"), 74 CPU(1, "Cypress/ROSS CY7C601"),
111 CPU_INFO(5, 0, "Matsushita - MN10501"), 75 /* Embedded controller */
112 CPU_INFO(6, 0, "Philips Corporation - unknown"), 76 CPU(3, "Cypress/ROSS CY7C611"),
113 CPU_INFO(7, 0, "Harvest VLSI Design Center, Inc. - unknown"), 77 /* Ross Technologies HyperSparc */
114 /* Gallium arsenide 200MHz, BOOOOGOOOOMIPS!!! */ 78 CPU(0xf, "ROSS HyperSparc RT620"),
115 CPU_INFO(8, 0, "Systems and Processes Engineering Corporation (SPEC)"), 79 CPU(0xe, "ROSS HyperSparc RT625 or RT626"),
116 CPU_INFO(9, 0, "Fujitsu or Weitek Power-UP"), 80 CPU(-1, NULL)
117 CPU_INFO(9, 1, "Fujitsu or Weitek Power-UP"), 81 },
118 CPU_INFO(9, 2, "Fujitsu or Weitek Power-UP"), 82 .fpu_info = {
119 CPU_INFO(9, 3, "Fujitsu or Weitek Power-UP"), 83 FPU(0, "ROSS HyperSparc combined IU/FPU"),
120 CPU_INFO(0xa, 0, "UNKNOWN CPU-VENDOR/TYPE"), 84 FPU(1, "Lsi Logic L64814"),
121 CPU_INFO(0xb, 0, "UNKNOWN CPU-VENDOR/TYPE"), 85 FPU(2, "Texas Instruments TMS390-C602A"),
122 CPU_INFO(0xc, 0, "UNKNOWN CPU-VENDOR/TYPE"), 86 FPU(3, "Cypress CY7C602 FPU"),
123 CPU_INFO(0xd, 0, "UNKNOWN CPU-VENDOR/TYPE"), 87 FPU(-1, NULL)
124 CPU_INFO(0xe, 0, "UNKNOWN CPU-VENDOR/TYPE"), 88 }
125 CPU_INFO(0xf, 0, "UNKNOWN CPU-VENDOR/TYPE"), 89},{
126}; 90 2,
91 .cpu_info = {
92 /* ECL Implementation, CRAY S-MP Supercomputer... AIEEE! */
93 /* Someone please write the code to support this beast! ;) */
94 CPU(0, "Bipolar Integrated Technology - B5010"),
95 CPU(-1, NULL)
96 },
97 .fpu_info = {
98 FPU(-1, NULL)
99 }
100},{
101 3,
102 .cpu_info = {
103 CPU(0, "LSI Logic Corporation - unknown-type"),
104 CPU(-1, NULL)
105 },
106 .fpu_info = {
107 FPU(-1, NULL)
108 }
109},{
110 4,
111 .cpu_info = {
112 CPU(0, "Texas Instruments, Inc. - SuperSparc-(II)"),
113 /* SparcClassic -- borned STP1010TAB-50*/
114 CPU(1, "Texas Instruments, Inc. - MicroSparc"),
115 CPU(2, "Texas Instruments, Inc. - MicroSparc II"),
116 CPU(3, "Texas Instruments, Inc. - SuperSparc 51"),
117 CPU(4, "Texas Instruments, Inc. - SuperSparc 61"),
118 CPU(5, "Texas Instruments, Inc. - unknown"),
119 CPU(-1, NULL)
120 },
121 .fpu_info = {
122 /* SuperSparc 50 module */
123 FPU(0, "SuperSparc on-chip FPU"),
124 /* SparcClassic */
125 FPU(4, "TI MicroSparc on chip FPU"),
126 FPU(-1, NULL)
127 }
128},{
129 5,
130 .cpu_info = {
131 CPU(0, "Matsushita - MN10501"),
132 CPU(-1, NULL)
133 },
134 .fpu_info = {
135 FPU(0, "Matsushita MN10501"),
136 FPU(-1, NULL)
137 }
138},{
139 6,
140 .cpu_info = {
141 CPU(0, "Philips Corporation - unknown"),
142 CPU(-1, NULL)
143 },
144 .fpu_info = {
145 FPU(-1, NULL)
146 }
147},{
148 7,
149 .cpu_info = {
150 CPU(0, "Harvest VLSI Design Center, Inc. - unknown"),
151 CPU(-1, NULL)
152 },
153 .fpu_info = {
154 FPU(-1, NULL)
155 }
156},{
157 8,
158 .cpu_info = {
159 CPU(0, "Systems and Processes Engineering Corporation (SPEC)"),
160 CPU(-1, NULL)
161 },
162 .fpu_info = {
163 FPU(-1, NULL)
164 }
165},{
166 9,
167 .cpu_info = {
168 /* Gallium arsenide 200MHz, BOOOOGOOOOMIPS!!! */
169 CPU(0, "Fujitsu or Weitek Power-UP"),
170 CPU(1, "Fujitsu or Weitek Power-UP"),
171 CPU(2, "Fujitsu or Weitek Power-UP"),
172 CPU(3, "Fujitsu or Weitek Power-UP"),
173 CPU(-1, NULL)
174 },
175 .fpu_info = {
176 FPU(3, "Fujitsu or Weitek on-chip FPU"),
177 FPU(-1, NULL)
178 }
179}};
127 180
128#define NSPARCCHIPS ARRAY_SIZE(linux_sparc_chips) 181/* In order to get the fpu type correct, you need to take the IDPROM's
182 * machine type value into consideration too. I will fix this.
183 */
129 184
130const char *sparc_cpu_type; 185const char *sparc_cpu_type;
131const char *sparc_fpu_type; 186const char *sparc_fpu_type;
132 187
133unsigned int fsr_storage; 188unsigned int fsr_storage;
134 189
135void __cpuinit cpu_probe(void) 190static void set_cpu_and_fpu(int psr_impl, int psr_vers, int fpu_vers)
136{ 191{
137 int psr_impl, psr_vers, fpu_vers; 192 sparc_cpu_type = NULL;
138 int i, psr; 193 sparc_fpu_type = NULL;
139 194 if (psr_impl < ARRAY_SIZE(manufacturer_info))
140 psr_impl = ((get_psr() >> 28) & 0xf); 195 {
141 psr_vers = ((get_psr() >> 24) & 0xf); 196 const struct cpu_info *cpu;
142 197 const struct fpu_info *fpu;
143 psr = get_psr(); 198
144 put_psr(psr | PSR_EF); 199 cpu = &manufacturer_info[psr_impl].cpu_info[0];
145 fpu_vers = ((get_fsr() >> 17) & 0x7); 200 while (cpu->psr_vers != -1)
146 put_psr(psr); 201 {
147 202 if (cpu->psr_vers == psr_vers) {
148 for (i = 0; i < NSPARCCHIPS; i++) { 203 sparc_cpu_type = cpu->name;
149 if (linux_sparc_chips[i].psr_impl == psr_impl) 204 sparc_fpu_type = "No FPU";
150 if (linux_sparc_chips[i].psr_vers == psr_vers) { 205 break;
151 sparc_cpu_type = linux_sparc_chips[i].cpu_name; 206 }
207 cpu++;
208 }
209 fpu = &manufacturer_info[psr_impl].fpu_info[0];
210 while (fpu->fp_vers != -1)
211 {
212 if (fpu->fp_vers == fpu_vers) {
213 sparc_fpu_type = fpu->name;
152 break; 214 break;
153 } 215 }
216 fpu++;
217 }
154 } 218 }
155 219 if (sparc_cpu_type == NULL)
156 if (i == NSPARCCHIPS)
157 { 220 {
158 printk(KERN_ERR "CPU: Unknown chip, impl[0x%x] vers[0x%x]\n", 221 printk(KERN_ERR "CPU: Unknown chip, impl[0x%x] vers[0x%x]\n",
159 psr_impl, psr_vers); 222 psr_impl, psr_vers);
160 sparc_cpu_type = "Unknown CPU"; 223 sparc_cpu_type = "Unknown CPU";
161 } 224 }
162 225 if (sparc_fpu_type == NULL)
163 for (i = 0; i < NSPARCFPU; i++) { 226 {
164 if (linux_sparc_fpu[i].psr_impl == psr_impl)
165 if (linux_sparc_fpu[i].fp_vers == fpu_vers) {
166 sparc_fpu_type = linux_sparc_fpu[i].fp_name;
167 break;
168 }
169 }
170
171 if (i == NSPARCFPU) {
172 printk(KERN_ERR "FPU: Unknown chip, impl[0x%x] vers[0x%x]\n", 227 printk(KERN_ERR "FPU: Unknown chip, impl[0x%x] vers[0x%x]\n",
173 psr_impl, fpu_vers); 228 psr_impl, fpu_vers);
174 sparc_fpu_type = "Unknown FPU"; 229 sparc_fpu_type = "Unknown FPU";
175 } 230 }
176} 231}
232
233void __cpuinit cpu_probe(void)
234{
235 int psr_impl, psr_vers, fpu_vers;
236 int psr;
237
238 psr_impl = ((get_psr() >> 28) & 0xf);
239 psr_vers = ((get_psr() >> 24) & 0xf);
240
241 psr = get_psr();
242 put_psr(psr | PSR_EF);
243 fpu_vers = ((get_fsr() >> 17) & 0x7);
244 put_psr(psr);
245
246 set_cpu_and_fpu(psr_impl, psr_vers, fpu_vers);
247}