diff options
author | Luis R. Rodriguez <lrodriguez@atheros.com> | 2009-09-14 02:04:44 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2009-10-07 16:39:29 -0400 |
commit | 25c56eec92b15fdec5be96fa1303dac3443200ae (patch) | |
tree | 950fa4d2d0afcc6499de218a84a9e3b4da9c71d7 | |
parent | 6420014ca4a6b0e853c9a19a8649d93682a5bdac (diff) |
ath9k: remove ath9k_ht_macmode
This is used just to determine how to program the MAC,
either for 20 MHz operation of 40 MHz so just use conf_is_ht40()
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r-- | drivers/net/wireless/ath/ath9k/ath9k.h | 1 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.c | 29 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.h | 2 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/mac.h | 5 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/main.c | 13 |
5 files changed, 17 insertions, 33 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h index e93ab631a091..73c2ac55937b 100644 --- a/drivers/net/wireless/ath/ath9k/ath9k.h +++ b/drivers/net/wireless/ath/ath9k/ath9k.h | |||
@@ -592,7 +592,6 @@ struct ath_softc { | |||
592 | bool ps_enabled; | 592 | bool ps_enabled; |
593 | unsigned long ps_usecount; | 593 | unsigned long ps_usecount; |
594 | enum ath9k_int imask; | 594 | enum ath9k_int imask; |
595 | enum ath9k_ht_macmode tx_chan_width; | ||
596 | 595 | ||
597 | struct ath_config config; | 596 | struct ath_config config; |
598 | struct ath_rx rx; | 597 | struct ath_rx rx; |
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c index 6d2ac33a2764..9d03d27a7dcb 100644 --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c | |||
@@ -26,8 +26,7 @@ | |||
26 | #define ATH9K_CLOCK_RATE_2GHZ_OFDM 44 | 26 | #define ATH9K_CLOCK_RATE_2GHZ_OFDM 44 |
27 | 27 | ||
28 | static bool ath9k_hw_set_reset_reg(struct ath_hw *ah, u32 type); | 28 | static bool ath9k_hw_set_reset_reg(struct ath_hw *ah, u32 type); |
29 | static void ath9k_hw_set_regs(struct ath_hw *ah, struct ath9k_channel *chan, | 29 | static void ath9k_hw_set_regs(struct ath_hw *ah, struct ath9k_channel *chan); |
30 | enum ath9k_ht_macmode macmode); | ||
31 | static u32 ath9k_hw_ini_fixup(struct ath_hw *ah, | 30 | static u32 ath9k_hw_ini_fixup(struct ath_hw *ah, |
32 | struct ar5416_eeprom_def *pEepData, | 31 | struct ar5416_eeprom_def *pEepData, |
33 | u32 reg, u32 value); | 32 | u32 reg, u32 value); |
@@ -1352,8 +1351,7 @@ static u32 ath9k_regd_get_ctl(struct ath_regulatory *reg, | |||
1352 | } | 1351 | } |
1353 | 1352 | ||
1354 | static int ath9k_hw_process_ini(struct ath_hw *ah, | 1353 | static int ath9k_hw_process_ini(struct ath_hw *ah, |
1355 | struct ath9k_channel *chan, | 1354 | struct ath9k_channel *chan) |
1356 | enum ath9k_ht_macmode macmode) | ||
1357 | { | 1355 | { |
1358 | struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); | 1356 | struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); |
1359 | int i, regWrites = 0; | 1357 | int i, regWrites = 0; |
@@ -1455,7 +1453,7 @@ static int ath9k_hw_process_ini(struct ath_hw *ah, | |||
1455 | } | 1453 | } |
1456 | 1454 | ||
1457 | ath9k_hw_override_ini(ah, chan); | 1455 | ath9k_hw_override_ini(ah, chan); |
1458 | ath9k_hw_set_regs(ah, chan, macmode); | 1456 | ath9k_hw_set_regs(ah, chan); |
1459 | ath9k_hw_init_chain_masks(ah); | 1457 | ath9k_hw_init_chain_masks(ah); |
1460 | 1458 | ||
1461 | if (OLC_FOR_AR9280_20_LATER) | 1459 | if (OLC_FOR_AR9280_20_LATER) |
@@ -1738,8 +1736,7 @@ static bool ath9k_hw_set_reset_reg(struct ath_hw *ah, u32 type) | |||
1738 | } | 1736 | } |
1739 | } | 1737 | } |
1740 | 1738 | ||
1741 | static void ath9k_hw_set_regs(struct ath_hw *ah, struct ath9k_channel *chan, | 1739 | static void ath9k_hw_set_regs(struct ath_hw *ah, struct ath9k_channel *chan) |
1742 | enum ath9k_ht_macmode macmode) | ||
1743 | { | 1740 | { |
1744 | u32 phymode; | 1741 | u32 phymode; |
1745 | u32 enableDacFifo = 0; | 1742 | u32 enableDacFifo = 0; |
@@ -1761,7 +1758,7 @@ static void ath9k_hw_set_regs(struct ath_hw *ah, struct ath9k_channel *chan, | |||
1761 | } | 1758 | } |
1762 | REG_WRITE(ah, AR_PHY_TURBO, phymode); | 1759 | REG_WRITE(ah, AR_PHY_TURBO, phymode); |
1763 | 1760 | ||
1764 | ath9k_hw_set11nmac2040(ah, macmode); | 1761 | ath9k_hw_set11nmac2040(ah); |
1765 | 1762 | ||
1766 | REG_WRITE(ah, AR_GTXTO, 25 << AR_GTXTO_TIMEOUT_LIMIT_S); | 1763 | REG_WRITE(ah, AR_GTXTO, 25 << AR_GTXTO_TIMEOUT_LIMIT_S); |
1767 | REG_WRITE(ah, AR_CST, 0xF << AR_CST_TIMEOUT_LIMIT_S); | 1764 | REG_WRITE(ah, AR_CST, 0xF << AR_CST_TIMEOUT_LIMIT_S); |
@@ -1787,8 +1784,7 @@ static bool ath9k_hw_chip_reset(struct ath_hw *ah, | |||
1787 | } | 1784 | } |
1788 | 1785 | ||
1789 | static bool ath9k_hw_channel_change(struct ath_hw *ah, | 1786 | static bool ath9k_hw_channel_change(struct ath_hw *ah, |
1790 | struct ath9k_channel *chan, | 1787 | struct ath9k_channel *chan) |
1791 | enum ath9k_ht_macmode macmode) | ||
1792 | { | 1788 | { |
1793 | struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); | 1789 | struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); |
1794 | struct ath_common *common = ath9k_hw_common(ah); | 1790 | struct ath_common *common = ath9k_hw_common(ah); |
@@ -1812,7 +1808,7 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah, | |||
1812 | return false; | 1808 | return false; |
1813 | } | 1809 | } |
1814 | 1810 | ||
1815 | ath9k_hw_set_regs(ah, chan, macmode); | 1811 | ath9k_hw_set_regs(ah, chan); |
1816 | 1812 | ||
1817 | if (AR_SREV_9280_10_OR_LATER(ah)) { | 1813 | if (AR_SREV_9280_10_OR_LATER(ah)) { |
1818 | ath9k_hw_ar9280_set_channel(ah, chan); | 1814 | ath9k_hw_ar9280_set_channel(ah, chan); |
@@ -2323,7 +2319,6 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, | |||
2323 | { | 2319 | { |
2324 | struct ath_common *common = ath9k_hw_common(ah); | 2320 | struct ath_common *common = ath9k_hw_common(ah); |
2325 | u32 saveLedState; | 2321 | u32 saveLedState; |
2326 | struct ath_softc *sc = ah->ah_sc; | ||
2327 | struct ath9k_channel *curchan = ah->curchan; | 2322 | struct ath9k_channel *curchan = ah->curchan; |
2328 | u32 saveDefAntenna; | 2323 | u32 saveDefAntenna; |
2329 | u32 macStaId1; | 2324 | u32 macStaId1; |
@@ -2348,7 +2343,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, | |||
2348 | !(AR_SREV_9280(ah) || IS_CHAN_A_5MHZ_SPACED(chan) || | 2343 | !(AR_SREV_9280(ah) || IS_CHAN_A_5MHZ_SPACED(chan) || |
2349 | IS_CHAN_A_5MHZ_SPACED(ah->curchan))) { | 2344 | IS_CHAN_A_5MHZ_SPACED(ah->curchan))) { |
2350 | 2345 | ||
2351 | if (ath9k_hw_channel_change(ah, chan, sc->tx_chan_width)) { | 2346 | if (ath9k_hw_channel_change(ah, chan)) { |
2352 | ath9k_hw_loadnf(ah, ah->curchan); | 2347 | ath9k_hw_loadnf(ah, ah->curchan); |
2353 | ath9k_hw_start_nfcal(ah); | 2348 | ath9k_hw_start_nfcal(ah); |
2354 | return 0; | 2349 | return 0; |
@@ -2408,7 +2403,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, | |||
2408 | REG_SET_BIT(ah, AR_MAC_PCU_ASYNC_FIFO_REG3, | 2403 | REG_SET_BIT(ah, AR_MAC_PCU_ASYNC_FIFO_REG3, |
2409 | AR_MAC_PCU_ASYNC_FIFO_REG3_SOFT_RESET); | 2404 | AR_MAC_PCU_ASYNC_FIFO_REG3_SOFT_RESET); |
2410 | } | 2405 | } |
2411 | r = ath9k_hw_process_ini(ah, chan, sc->tx_chan_width); | 2406 | r = ath9k_hw_process_ini(ah, chan); |
2412 | if (r) | 2407 | if (r) |
2413 | return r; | 2408 | return r; |
2414 | 2409 | ||
@@ -4063,12 +4058,12 @@ bool ath9k_hw_setslottime(struct ath_hw *ah, u32 us) | |||
4063 | } | 4058 | } |
4064 | } | 4059 | } |
4065 | 4060 | ||
4066 | void ath9k_hw_set11nmac2040(struct ath_hw *ah, enum ath9k_ht_macmode mode) | 4061 | void ath9k_hw_set11nmac2040(struct ath_hw *ah) |
4067 | { | 4062 | { |
4063 | struct ieee80211_conf *conf = &ath9k_hw_common(ah)->hw->conf; | ||
4068 | u32 macmode; | 4064 | u32 macmode; |
4069 | 4065 | ||
4070 | if (mode == ATH9K_HT_MACMODE_2040 && | 4066 | if (conf_is_ht40(conf) && !ah->config.cwm_ignore_extcca) |
4071 | !ah->config.cwm_ignore_extcca) | ||
4072 | macmode = AR_2040_JOINED_RX_CLEAR; | 4067 | macmode = AR_2040_JOINED_RX_CLEAR; |
4073 | else | 4068 | else |
4074 | macmode = 0; | 4069 | macmode = 0; |
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h index 53ffe2a9e225..92770cbc7444 100644 --- a/drivers/net/wireless/ath/ath9k/hw.h +++ b/drivers/net/wireless/ath/ath9k/hw.h | |||
@@ -662,7 +662,7 @@ void ath9k_hw_settsf64(struct ath_hw *ah, u64 tsf64); | |||
662 | void ath9k_hw_reset_tsf(struct ath_hw *ah); | 662 | void ath9k_hw_reset_tsf(struct ath_hw *ah); |
663 | void ath9k_hw_set_tsfadjust(struct ath_hw *ah, u32 setting); | 663 | void ath9k_hw_set_tsfadjust(struct ath_hw *ah, u32 setting); |
664 | bool ath9k_hw_setslottime(struct ath_hw *ah, u32 us); | 664 | bool ath9k_hw_setslottime(struct ath_hw *ah, u32 us); |
665 | void ath9k_hw_set11nmac2040(struct ath_hw *ah, enum ath9k_ht_macmode mode); | 665 | void ath9k_hw_set11nmac2040(struct ath_hw *ah); |
666 | void ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period); | 666 | void ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period); |
667 | void ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah, | 667 | void ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah, |
668 | const struct ath9k_beacon_state *bs); | 668 | const struct ath9k_beacon_state *bs); |
diff --git a/drivers/net/wireless/ath/ath9k/mac.h b/drivers/net/wireless/ath/ath9k/mac.h index 767256dccb46..9ab343151be4 100644 --- a/drivers/net/wireless/ath/ath9k/mac.h +++ b/drivers/net/wireless/ath/ath9k/mac.h | |||
@@ -614,11 +614,6 @@ enum ath9k_cipher { | |||
614 | ATH9K_CIPHER_MIC = 127 | 614 | ATH9K_CIPHER_MIC = 127 |
615 | }; | 615 | }; |
616 | 616 | ||
617 | enum ath9k_ht_macmode { | ||
618 | ATH9K_HT_MACMODE_20 = 0, | ||
619 | ATH9K_HT_MACMODE_2040 = 1, | ||
620 | }; | ||
621 | |||
622 | struct ath_hw; | 617 | struct ath_hw; |
623 | struct ath9k_channel; | 618 | struct ath9k_channel; |
624 | struct ath_rate_table; | 619 | struct ath_rate_table; |
diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c index 7906b796dea9..e9aac3cbd4de 100644 --- a/drivers/net/wireless/ath/ath9k/main.c +++ b/drivers/net/wireless/ath/ath9k/main.c | |||
@@ -299,6 +299,7 @@ int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw, | |||
299 | { | 299 | { |
300 | struct ath_hw *ah = sc->sc_ah; | 300 | struct ath_hw *ah = sc->sc_ah; |
301 | struct ath_common *common = ath9k_hw_common(ah); | 301 | struct ath_common *common = ath9k_hw_common(ah); |
302 | struct ieee80211_conf *conf = &common->hw->conf; | ||
302 | bool fastcc = true, stopped; | 303 | bool fastcc = true, stopped; |
303 | struct ieee80211_channel *channel = hw->conf.channel; | 304 | struct ieee80211_channel *channel = hw->conf.channel; |
304 | int r; | 305 | int r; |
@@ -329,9 +330,9 @@ int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw, | |||
329 | fastcc = false; | 330 | fastcc = false; |
330 | 331 | ||
331 | ath_print(common, ATH_DBG_CONFIG, | 332 | ath_print(common, ATH_DBG_CONFIG, |
332 | "(%u MHz) -> (%u MHz), chanwidth: %d\n", | 333 | "(%u MHz) -> (%u MHz), conf_is_ht40: %d\n", |
333 | sc->sc_ah->curchan->channel, | 334 | sc->sc_ah->curchan->channel, |
334 | channel->center_freq, sc->tx_chan_width); | 335 | channel->center_freq, conf_is_ht40(conf)); |
335 | 336 | ||
336 | spin_lock_bh(&sc->sc_resetlock); | 337 | spin_lock_bh(&sc->sc_resetlock); |
337 | 338 | ||
@@ -2191,15 +2192,9 @@ void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw, | |||
2191 | ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM; | 2192 | ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM; |
2192 | } | 2193 | } |
2193 | 2194 | ||
2194 | sc->tx_chan_width = ATH9K_HT_MACMODE_20; | 2195 | if (conf_is_ht(conf)) |
2195 | |||
2196 | if (conf_is_ht(conf)) { | ||
2197 | if (conf_is_ht40(conf)) | ||
2198 | sc->tx_chan_width = ATH9K_HT_MACMODE_2040; | ||
2199 | |||
2200 | ichan->chanmode = ath_get_extchanmode(sc, chan, | 2196 | ichan->chanmode = ath_get_extchanmode(sc, chan, |
2201 | conf->channel_type); | 2197 | conf->channel_type); |
2202 | } | ||
2203 | } | 2198 | } |
2204 | 2199 | ||
2205 | /**********************/ | 2200 | /**********************/ |